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Fri, 23 Jan 2026 07:39:48 GMT Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 2590A20040; Fri, 23 Jan 2026 07:39:48 +0000 (GMT) Received: from smtpav04.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id AE9EC20043; Fri, 23 Jan 2026 07:39:41 +0000 (GMT) Received: from li-1a3e774c-28e4-11b2-a85c-acc9f2883e29.ibm.com.com (unknown [9.124.222.171]) by smtpav04.fra02v.mail.ibm.com (Postfix) with ESMTP; Fri, 23 Jan 2026 07:39:41 +0000 (GMT) From: Mukesh Kumar Chaurasiya To: maddy@linux.ibm.com, mpe@ellerman.id.au, npiggin@gmail.com, chleroy@kernel.org, ryabinin.a.a@gmail.com, glider@google.com, andreyknvl@gmail.com, dvyukov@google.com, vincenzo.frascino@arm.com, oleg@redhat.com, kees@kernel.org, luto@amacapital.net, wad@chromium.org, mchauras@linux.ibm.com, thuth@redhat.com, ruanjinjie@huawei.com, sshegde@linux.ibm.com, akpm@linux-foundation.org, charlie@rivosinc.com, deller@gmx.de, ldv@strace.io, macro@orcam.me.uk, segher@kernel.crashing.org, peterz@infradead.org, bigeasy@linutronix.de, namcao@linutronix.de, tglx@linutronix.de, mark.barnett@arm.com, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, kasan-dev@googlegroups.com Subject: [PATCH v4 1/8] powerpc: rename arch_irq_disabled_regs Date: Fri, 23 Jan 2026 13:09:09 +0530 Message-ID: <20260123073916.956498-2-mkchauras@linux.ibm.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260123073916.956498-1-mkchauras@linux.ibm.com> References: <20260123073916.956498-1-mkchauras@linux.ibm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTIzMDA1NSBTYWx0ZWRfXwRQ2CGv0bRSG IyIvY0qB2QJMxumK7PFc4MZ98IcVsNRB0an/i10mk1E2EI6FTN54d0jYea4O+9s8aHEIiBfodgb jH1t97dXlZ8xxCCPz4bO+LL33b4/duV+GjTZFJxaxNmdypTKsurbi5/FLy/1w3qYvxCnGpknY59 gqQHFGmImaXB9hweGy7tBIadp//gtnF9Zr5HSi7FwJ4/g1pnHRgGkHjD+F++TVuWVIKfiKhT3m7 OteeDFzmjNRCqYQM3VNAhVJ8FAJZsAoy/6fulRnIN1F9n+N8poGG4JQNeJJBi0W0xIogFeex9eq 61Om6WAdlODYXEFMwB7QJcusYjMdefyRq4hrYMFMnAOzYVh6HcWujGLFHZkELlhkDNXd3s4aDTU G4ercLWX92nNyNSh4tR0meIzLq+Hf8D9FNAQGUckDzGLsVRMBb0lNRBsFI6N0wKP/47ThigJkt+ 865UV1BqZC4yuCegSuQ== X-Authority-Analysis: v=2.4 cv=BpSQAIX5 c=1 sm=1 tr=0 ts=697325ca cx=c_pps a=5BHTudwdYE3Te8bg5FgnPg==:117 a=5BHTudwdYE3Te8bg5FgnPg==:17 a=vUbySO9Y5rIA:10 a=VkNPw1HP01LnGYTKEx00:22 a=VnNF1IyMAAAA:8 a=i0EeH86SAAAA:8 a=8txWmKPpaVdEF_iBmVcA:9 X-Proofpoint-GUID: bzmnmhPke45yDArNZyuzxS6kuZ7viVlr X-Proofpoint-ORIG-GUID: GH71FTZ7yDcgY7miAsEKod3H72_OT0VQ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.20,FMLib:17.12.100.49 definitions=2026-01-22_06,2026-01-22_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 bulkscore=0 clxscore=1011 adultscore=0 phishscore=0 malwarescore=0 impostorscore=0 suspectscore=0 priorityscore=1501 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2601150000 definitions=main-2601230055 Content-Type: text/plain; charset="utf-8" From: Mukesh Kumar Chaurasiya Rename arch_irq_disabled_regs() to regs_irqs_disabled() to align with the naming used in the generic irqentry framework. This makes the function available for use both in the PowerPC architecture code and in the common entry/exit paths shared with other architectures. This is a preparatory change for enabling the generic irqentry framework on PowerPC. Signed-off-by: Mukesh Kumar Chaurasiya Reviewed-by: Shrikanth Hegde Reviewed-by: Jinjie Ruan --- arch/powerpc/include/asm/hw_irq.h | 4 ++-- arch/powerpc/include/asm/interrupt.h | 16 ++++++++-------- arch/powerpc/kernel/interrupt.c | 4 ++-- arch/powerpc/kernel/syscall.c | 2 +- arch/powerpc/kernel/traps.c | 2 +- arch/powerpc/kernel/watchdog.c | 2 +- arch/powerpc/perf/core-book3s.c | 2 +- 7 files changed, 16 insertions(+), 16 deletions(-) diff --git a/arch/powerpc/include/asm/hw_irq.h b/arch/powerpc/include/asm/h= w_irq.h index 9cd945f2acaf..b7eee6385ae5 100644 --- a/arch/powerpc/include/asm/hw_irq.h +++ b/arch/powerpc/include/asm/hw_irq.h @@ -393,7 +393,7 @@ static inline void do_hard_irq_enable(void) __hard_irq_enable(); } =20 -static inline bool arch_irq_disabled_regs(struct pt_regs *regs) +static inline bool regs_irqs_disabled(struct pt_regs *regs) { return (regs->softe & IRQS_DISABLED); } @@ -466,7 +466,7 @@ static inline bool arch_irqs_disabled(void) =20 #define hard_irq_disable() arch_local_irq_disable() =20 -static inline bool arch_irq_disabled_regs(struct pt_regs *regs) +static inline bool regs_irqs_disabled(struct pt_regs *regs) { return !(regs->msr & MSR_EE); } diff --git a/arch/powerpc/include/asm/interrupt.h b/arch/powerpc/include/as= m/interrupt.h index eb0e4a20b818..0e2cddf8bd21 100644 --- a/arch/powerpc/include/asm/interrupt.h +++ b/arch/powerpc/include/asm/interrupt.h @@ -172,7 +172,7 @@ static inline void interrupt_enter_prepare(struct pt_re= gs *regs) /* Enable MSR[RI] early, to support kernel SLB and hash faults */ #endif =20 - if (!arch_irq_disabled_regs(regs)) + if (!regs_irqs_disabled(regs)) trace_hardirqs_off(); =20 if (user_mode(regs)) { @@ -192,11 +192,11 @@ static inline void interrupt_enter_prepare(struct pt_= regs *regs) CT_WARN_ON(ct_state() !=3D CT_STATE_KERNEL && ct_state() !=3D CT_STATE_IDLE); INT_SOFT_MASK_BUG_ON(regs, is_implicit_soft_masked(regs)); - INT_SOFT_MASK_BUG_ON(regs, arch_irq_disabled_regs(regs) && - search_kernel_restart_table(regs->nip)); + INT_SOFT_MASK_BUG_ON(regs, regs_irqs_disabled(regs) && + search_kernel_restart_table(regs->nip)); } - INT_SOFT_MASK_BUG_ON(regs, !arch_irq_disabled_regs(regs) && - !(regs->msr & MSR_EE)); + INT_SOFT_MASK_BUG_ON(regs, !regs_irqs_disabled(regs) && + !(regs->msr & MSR_EE)); =20 booke_restore_dbcr0(); } @@ -298,7 +298,7 @@ static inline void interrupt_nmi_enter_prepare(struct p= t_regs *regs, struct inte * Adjust regs->softe to be soft-masked if it had not been * reconcied (e.g., interrupt entry with MSR[EE]=3D0 but softe * not yet set disabled), or if it was in an implicit soft - * masked state. This makes arch_irq_disabled_regs(regs) + * masked state. This makes regs_irqs_disabled(regs) * behave as expected. */ regs->softe =3D IRQS_ALL_DISABLED; @@ -372,7 +372,7 @@ static inline void interrupt_nmi_exit_prepare(struct pt= _regs *regs, struct inter =20 #ifdef CONFIG_PPC64 #ifdef CONFIG_PPC_BOOK3S - if (arch_irq_disabled_regs(regs)) { + if (regs_irqs_disabled(regs)) { unsigned long rst =3D search_kernel_restart_table(regs->nip); if (rst) regs_set_return_ip(regs, rst); @@ -661,7 +661,7 @@ void replay_soft_interrupts(void); =20 static inline void interrupt_cond_local_irq_enable(struct pt_regs *regs) { - if (!arch_irq_disabled_regs(regs)) + if (!regs_irqs_disabled(regs)) local_irq_enable(); } =20 diff --git a/arch/powerpc/kernel/interrupt.c b/arch/powerpc/kernel/interrup= t.c index e63bfde13e03..666eadb589a5 100644 --- a/arch/powerpc/kernel/interrupt.c +++ b/arch/powerpc/kernel/interrupt.c @@ -347,7 +347,7 @@ notrace unsigned long interrupt_exit_user_prepare(struc= t pt_regs *regs) unsigned long ret; =20 BUG_ON(regs_is_unrecoverable(regs)); - BUG_ON(arch_irq_disabled_regs(regs)); + BUG_ON(regs_irqs_disabled(regs)); CT_WARN_ON(ct_state() =3D=3D CT_STATE_USER); =20 /* @@ -396,7 +396,7 @@ notrace unsigned long interrupt_exit_kernel_prepare(str= uct pt_regs *regs) =20 local_irq_disable(); =20 - if (!arch_irq_disabled_regs(regs)) { + if (!regs_irqs_disabled(regs)) { /* Returning to a kernel context with local irqs enabled. */ WARN_ON_ONCE(!(regs->msr & MSR_EE)); again: diff --git a/arch/powerpc/kernel/syscall.c b/arch/powerpc/kernel/syscall.c index be159ad4b77b..9f03a6263fb4 100644 --- a/arch/powerpc/kernel/syscall.c +++ b/arch/powerpc/kernel/syscall.c @@ -32,7 +32,7 @@ notrace long system_call_exception(struct pt_regs *regs, = unsigned long r0) =20 BUG_ON(regs_is_unrecoverable(regs)); BUG_ON(!user_mode(regs)); - BUG_ON(arch_irq_disabled_regs(regs)); + BUG_ON(regs_irqs_disabled(regs)); =20 #ifdef CONFIG_PPC_PKEY if (mmu_has_feature(MMU_FTR_PKEY)) { diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c index cb8e9357383e..629f2a2d4780 100644 --- a/arch/powerpc/kernel/traps.c +++ b/arch/powerpc/kernel/traps.c @@ -1956,7 +1956,7 @@ DEFINE_INTERRUPT_HANDLER_RAW(performance_monitor_exce= ption) * prevent hash faults on user addresses when reading callchains (and * looks better from an irq tracing perspective). */ - if (IS_ENABLED(CONFIG_PPC64) && unlikely(arch_irq_disabled_regs(regs))) + if (IS_ENABLED(CONFIG_PPC64) && unlikely(regs_irqs_disabled(regs))) performance_monitor_exception_nmi(regs); else performance_monitor_exception_async(regs); diff --git a/arch/powerpc/kernel/watchdog.c b/arch/powerpc/kernel/watchdog.c index 2429cb1c7baa..6111cbbde069 100644 --- a/arch/powerpc/kernel/watchdog.c +++ b/arch/powerpc/kernel/watchdog.c @@ -373,7 +373,7 @@ DEFINE_INTERRUPT_HANDLER_NMI(soft_nmi_interrupt) u64 tb; =20 /* should only arrive from kernel, with irqs disabled */ - WARN_ON_ONCE(!arch_irq_disabled_regs(regs)); + WARN_ON_ONCE(!regs_irqs_disabled(regs)); =20 if (!cpumask_test_cpu(cpu, &wd_cpus_enabled)) return 0; diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3= s.c index 8b0081441f85..f7518b7e3055 100644 --- a/arch/powerpc/perf/core-book3s.c +++ b/arch/powerpc/perf/core-book3s.c @@ -2482,7 +2482,7 @@ static void __perf_event_interrupt(struct pt_regs *re= gs) * will trigger a PMI after waking up from idle. Since counter values are= _not_ * saved/restored in idle path, can lead to below "Can't find PMC" messag= e. */ - if (unlikely(!found) && !arch_irq_disabled_regs(regs)) + if (unlikely(!found) && !regs_irqs_disabled(regs)) printk_ratelimited(KERN_WARNING "Can't find PMC that caused IRQ\n"); =20 /* --=20 2.52.0