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X-MS-Exchange-AntiSpam-ExternalHop-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-ExternalHop-MessageData-0: 6lpkoSBO5oYFK4tE0vIkZTwbAZql8Y/2+4YvAEq/tHXUHsJZX7+45/b6nPf6IgvK91O1Z6QrTC2bfzBCpyWeOQDsksj60+Kh9oawBXaLLjVReT1+q14ie0XfAQGdJhz2QP+dU2PjEx81h6iKRHp1oOqZFzA4V82nfT8LJlPsN5jl0zZ4+KPMhJNacvw5m1vLYUNgcVtRbX2ciQTlPROhQZnxKN7os+NroQG1qC3vnOPpKSaqK5yFNGkTwKVw/83IaKYig6XrI5GWrw8N06wC7N3o49QHkmiMYYkoMdEnwiLL1/jpS089clknYKKha5KzxJNa5hhUzwUKbnDp6+7CBhL40mQ8S2/f/h94mO+UIFpAtp+caN1UfSVnuXhrmlaaDzOfuRFb/k3CJLxu8dGLrZWfeFMOUgSNkxs1Q0FE1g073s37SefUhKB6U8p+f5Vw/j3axvVf3C+b8nFPkHUcQMdklPCV8mrUZ8IuBjkqXjgaEGuxMFpjgxWVcl1EqroG2QquNYbCCdU8ZCPdFtInR7mIA9U4eltSITywSW0zUDqCbslWvYDKXSzIGGqlE/zPN4tXTYE66nrzbzHmmX95OfmNSmcYBFst9pVLFoXnPjbwLQirpblPnsOWfPcKVu621/VYC0hzrZSNl1lKI+qW0hM1E4Wr+wRp75ep4gcZbOOWzvKweeOt7384jcVFPCX6jjSvFhwX56icu8zGKZ5CEg== X-OriginatorOrg: foss.st.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Jan 2026 10:14:25.1467 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4e35597a-a91f-44d9-9755-08de5a682f76 X-MS-Exchange-CrossTenant-Id: 75e027c9-20d5-47d5-b82f-77d7cd041e8f X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=75e027c9-20d5-47d5-b82f-77d7cd041e8f;Ip=[164.130.1.59];Helo=[smtpO365.st.com] X-MS-Exchange-CrossTenant-AuthSource: DB3PEPF0000885D.eurprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI0PR10MB8354 The bootph-all flag was introduced in dt-schema (dtschema/schemas/bootph.yaml) to define node usage across different boot phases. To ensure SD boot, timer, gpio, syscfg, clock and uart nodes need to be present in all boot stages, so add missing bootph-all phase flag to these nodes to support SD boot. Signed-off-by: Patrice Chotard --- arch/arm64/boot/dts/st/stm32mp211.dtsi | 4 +- arch/arm64/boot/dts/st/stm32mp215f-dk.dts | 25 +++++++ arch/arm64/boot/dts/st/stm32mp231.dtsi | 4 +- arch/arm64/boot/dts/st/stm32mp235f-dk.dts | 95 ++++++++++++++++++++++++++ arch/arm64/boot/dts/st/stm32mp251.dtsi | 4 +- arch/arm64/boot/dts/st/stm32mp255.dtsi | 2 +- arch/arm64/boot/dts/st/stm32mp257f-dk.dts | 103 +++++++++++++++++++++++++= +++ arch/arm64/boot/dts/st/stm32mp257f-ev1.dts | 105 +++++++++++++++++++++++++= ++++ 8 files changed, 335 insertions(+), 7 deletions(-) diff --git a/arch/arm64/boot/dts/st/stm32mp211.dtsi b/arch/arm64/boot/dts/s= t/stm32mp211.dtsi index bf888d60cd4f..9e9f7f6a580f 100644 --- a/arch/arm64/boot/dts/st/stm32mp211.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp211.dtsi @@ -47,7 +47,7 @@ ck_flexgen_51: clock-200000000 { }; =20 firmware { - optee { + optee: optee { compatible =3D "linaro,optee-tz"; method =3D "smc"; }; @@ -70,7 +70,7 @@ scmi_reset: protocol@16 { }; }; =20 - psci { + psci: psci { compatible =3D "arm,psci-1.0"; method =3D "smc"; }; diff --git a/arch/arm64/boot/dts/st/stm32mp215f-dk.dts b/arch/arm64/boot/dt= s/st/stm32mp215f-dk.dts index 7bdaeaa5ab0f..2a003a7c3796 100644 --- a/arch/arm64/boot/dts/st/stm32mp215f-dk.dts +++ b/arch/arm64/boot/dts/st/stm32mp215f-dk.dts @@ -44,6 +44,31 @@ &arm_wdt { status =3D "okay"; }; =20 +&optee { + bootph-all; +}; + +&psci { + bootph-all; +}; + +&rifsc { + bootph-all; +}; + +&scmi { + bootph-all; +}; + +&scmi_clk { + bootph-all; +}; + +&scmi_reset { + bootph-all; +}; + &usart2 { + bootph-all; status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/st/stm32mp231.dtsi b/arch/arm64/boot/dts/s= t/stm32mp231.dtsi index 88e214d395ab..a2f93f6ccb84 100644 --- a/arch/arm64/boot/dts/st/stm32mp231.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp231.dtsi @@ -59,7 +59,7 @@ optee: optee { interrupts =3D ; }; =20 - scmi { + scmi: scmi { compatible =3D "linaro,scmi-optee"; #address-cells =3D <1>; #size-cells =3D <0>; @@ -111,7 +111,7 @@ scmi_vdda18adc: regulator@7 { }; }; =20 - psci { + psci: psci { compatible =3D "arm,psci-1.0"; method =3D "smc"; =20 diff --git a/arch/arm64/boot/dts/st/stm32mp235f-dk.dts b/arch/arm64/boot/dt= s/st/stm32mp235f-dk.dts index c3e688068223..a055d8a2ee99 100644 --- a/arch/arm64/boot/dts/st/stm32mp235f-dk.dts +++ b/arch/arm64/boot/dts/st/stm32mp235f-dk.dts @@ -78,6 +78,10 @@ &arm_wdt { status =3D "okay"; }; =20 +&bsec { + bootph-all; +}; + ðernet1 { pinctrl-0 =3D <ð1_rgmii_pins_b>; pinctrl-1 =3D <ð1_rgmii_sleep_pins_b>; @@ -100,6 +104,78 @@ phy1_eth1: ethernet-phy@1 { }; }; =20 +&gpioa { + bootph-all; +}; + +&gpiob { + bootph-all; +}; + +&gpioc { + bootph-all; +}; + +&gpiod { + bootph-all; +}; + +&gpioe { + bootph-all; +}; + +&gpiof { + bootph-all; +}; + +&gpiog { + bootph-all; +}; + +&gpioh { + bootph-all; +}; + +&gpioi { + bootph-all; +}; + +&gpioz { + bootph-all; +}; + +&optee { + bootph-all; +}; + +&pinctrl { + bootph-all; +}; + +&pinctrl_z { + bootph-all; +}; + +&psci { + bootph-all; +}; + +&rcc { + bootph-all; +}; + +&rifsc { + bootph-all; +}; + +&scmi { + bootph-all; +}; + +&scmi_clk { + bootph-all; +}; + &scmi_regu { scmi_vddio1: regulator@0 { regulator-min-microvolt =3D <1800000>; @@ -111,6 +187,10 @@ scmi_vdd_sdcard: regulator@23 { }; }; =20 +&scmi_reset { + bootph-all; +}; + &sdmmc1 { pinctrl-names =3D "default", "opendrain", "sleep"; pinctrl-0 =3D <&sdmmc1_b4_pins_a>; @@ -125,12 +205,27 @@ &sdmmc1 { status =3D "okay"; }; =20 +&syscfg { + bootph-all; +}; + &usart2 { pinctrl-names =3D "default", "idle", "sleep"; pinctrl-0 =3D <&usart2_pins_a>; pinctrl-1 =3D <&usart2_idle_pins_a>; pinctrl-2 =3D <&usart2_sleep_pins_a>; + bootph-all; /delete-property/dmas; /delete-property/dma-names; status =3D "okay"; }; + +&usart2_pins_a { + bootph-all; + pins1 { + bootph-all; + }; + pins2 { + bootph-all; + }; +}; diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/s= t/stm32mp251.dtsi index a8e6e0f77b83..4eaf1de3d87f 100644 --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi @@ -68,7 +68,7 @@ optee: optee { interrupts =3D ; }; =20 - scmi { + scmi: scmi { compatible =3D "linaro,scmi-optee"; #address-cells =3D <1>; #size-cells =3D <0>; @@ -139,7 +139,7 @@ v2m0: v2m@48090000 { }; }; =20 - psci { + psci: psci { compatible =3D "arm,psci-1.0"; method =3D "smc"; =20 diff --git a/arch/arm64/boot/dts/st/stm32mp255.dtsi b/arch/arm64/boot/dts/s= t/stm32mp255.dtsi index 7a598f53a2a0..3ba4e6166586 100644 --- a/arch/arm64/boot/dts/st/stm32mp255.dtsi +++ b/arch/arm64/boot/dts/st/stm32mp255.dtsi @@ -40,4 +40,4 @@ venc: venc@480e0000 { clocks =3D <&rcc CK_BUS_VENC>; access-controllers =3D <&rifsc 90>; }; -}; \ No newline at end of file +}; diff --git a/arch/arm64/boot/dts/st/stm32mp257f-dk.dts b/arch/arm64/boot/dt= s/st/stm32mp257f-dk.dts index e718d888ce21..080358b134ce 100644 --- a/arch/arm64/boot/dts/st/stm32mp257f-dk.dts +++ b/arch/arm64/boot/dts/st/stm32mp257f-dk.dts @@ -78,6 +78,10 @@ &arm_wdt { status =3D "okay"; }; =20 +&bsec { + bootph-all; +}; + ðernet1 { pinctrl-0 =3D <ð1_rgmii_pins_b>; pinctrl-1 =3D <ð1_rgmii_sleep_pins_b>; @@ -100,6 +104,86 @@ phy1_eth1: ethernet-phy@1 { }; }; =20 +&gpioa { + bootph-all; +}; + +&gpiob { + bootph-all; +}; + +&gpioc { + bootph-all; +}; + +&gpiod { + bootph-all; +}; + +&gpioe { + bootph-all; +}; + +&gpiof { + bootph-all; +}; + +&gpiog { + bootph-all; +}; + +&gpioh { + bootph-all; +}; + +&gpioi { + bootph-all; +}; + +&gpioj { + bootph-all; +}; + +&gpiok { + bootph-all; +}; + +&gpioz { + bootph-all; +}; + +&optee { + bootph-all; +}; + +&pinctrl { + bootph-all; +}; + +&pinctrl_z { + bootph-all; +}; + +&psci { + bootph-all; +}; + +&rcc { + bootph-all; +}; + +&rifsc { + bootph-all; +}; + +&scmi { + bootph-all; +}; + +&scmi_clk { + bootph-all; +}; + &scmi_regu { scmi_vddio1: regulator@0 { regulator-min-microvolt =3D <1800000>; @@ -111,6 +195,10 @@ scmi_vdd_sdcard: regulator@23 { }; }; =20 +&scmi_reset { + bootph-all; +}; + &sdmmc1 { pinctrl-names =3D "default", "opendrain", "sleep"; pinctrl-0 =3D <&sdmmc1_b4_pins_a>; @@ -125,12 +213,27 @@ &sdmmc1 { status =3D "okay"; }; =20 +&syscfg { + bootph-all; +}; + &usart2 { pinctrl-names =3D "default", "idle", "sleep"; pinctrl-0 =3D <&usart2_pins_a>; pinctrl-1 =3D <&usart2_idle_pins_a>; pinctrl-2 =3D <&usart2_sleep_pins_a>; + bootph-all; /delete-property/dmas; /delete-property/dma-names; status =3D "okay"; }; + +&usart2_pins_a { + bootph-all; + pins1 { + bootph-all; + }; + pins2 { + bootph-all; + }; +}; diff --git a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts b/arch/arm64/boot/d= ts/st/stm32mp257f-ev1.dts index 6e165073f732..61464076b8d5 100644 --- a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts +++ b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts @@ -130,6 +130,10 @@ &arm_wdt { status =3D "okay"; }; =20 +&bsec { + bootph-all; +}; + &combophy { clocks =3D <&rcc CK_BUS_USB3PCIEPHY>, <&rcc CK_KER_USB3PCIEPHY>, <&pad_cl= k>; clock-names =3D "apb", "ker", "pad"; @@ -216,6 +220,54 @@ phy0_eth2: ethernet-phy@1 { }; }; =20 +&gpioa { + bootph-all; +}; + +&gpiob { + bootph-all; +}; + +&gpioc { + bootph-all; +}; + +&gpiod { + bootph-all; +}; + +&gpioe { + bootph-all; +}; + +&gpiof { + bootph-all; +}; + +&gpiog { + bootph-all; +}; + +&gpioh { + bootph-all; +}; + +&gpioi { + bootph-all; +}; + +&gpioj { + bootph-all; +}; + +&gpiok { + bootph-all; +}; + +&gpioz { + bootph-all; +}; + &i2c2 { pinctrl-names =3D "default", "sleep"; pinctrl-0 =3D <&i2c2_pins_a>; @@ -300,6 +352,7 @@ timer { }; =20 <dc { + bootph-all; status =3D "okay"; port { ltdc_ep0_out: endpoint { @@ -309,6 +362,7 @@ ltdc_ep0_out: endpoint { }; =20 &lvds { + bootph-all; status =3D "okay"; ports { #address-cells =3D <1>; @@ -330,6 +384,10 @@ lvds_out0: endpoint { }; }; =20 +&optee { + bootph-all; +}; + &pcie_ep { pinctrl-names =3D "default", "init"; pinctrl-0 =3D <&pcie_pins_a>; @@ -351,10 +409,38 @@ pcie@0,0 { }; }; =20 +&pinctrl { + bootph-all; +}; + +&pinctrl_z { + bootph-all; +}; + +&psci { + bootph-all; +}; + +&rcc { + bootph-all; +}; + &rtc { status =3D "okay"; }; =20 +&rifsc { + bootph-all; +}; + +&scmi { + bootph-all; +}; + +&scmi_clk { + bootph-all; +}; + &scmi_regu { scmi_vddio1: regulator@0 { regulator-min-microvolt =3D <1800000>; @@ -386,6 +472,10 @@ scmi_vdd_sdcard: regulator@23 { }; }; =20 +&scmi_reset { + bootph-all; +}; + &sdmmc1 { pinctrl-names =3D "default", "opendrain", "sleep"; pinctrl-0 =3D <&sdmmc1_b4_pins_a>; @@ -400,6 +490,10 @@ &sdmmc1 { status =3D "okay"; }; =20 +&syscfg { + bootph-all; +}; + &spi3 { pinctrl-names =3D "default", "sleep"; pinctrl-0 =3D <&spi3_pins_a>; @@ -477,11 +571,22 @@ &usart2 { pinctrl-0 =3D <&usart2_pins_a>; pinctrl-1 =3D <&usart2_idle_pins_a>; pinctrl-2 =3D <&usart2_sleep_pins_a>; + bootph-all; /delete-property/dmas; /delete-property/dma-names; status =3D "okay"; }; =20 +&usart2_pins_a { + bootph-all; + pins1 { + bootph-all; + }; + pins2 { + bootph-all; + }; +}; + &usart6 { pinctrl-names =3D "default", "idle", "sleep"; pinctrl-0 =3D <&usart6_pins_a>; --=20 2.43.0