From nobody Tue Feb 10 06:44:05 2026 Received: from cstnet.cn (unknown [159.226.251.84]) (using TLSv1.2 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BC7AC396B7E; Fri, 23 Jan 2026 06:08:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=159.226.251.84 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769148494; cv=none; b=jBKJN8z96b0xKb3nfNKKWXyLO/rT2SS26hSfaXPU/Dgy3tWGnaUNCQi3TUpPABNnbBrNnEKxuRYlXDfRyb/akhXmlFX3vpkuDCsJo0DlHDFffjej5J1PdIwqDkB644y36zM6WL0UuWDml1IfnP0opnz/tlU5VkrGltbYVE0j5ks= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769148494; c=relaxed/simple; bh=UbfJ7s9JeJJ+t6LAzxlILO9VIydyAgfV4jShSImxxhs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=IamQckxFw0KHJ1OlloqZxizPe7k2ikoORvCUQh/cE5TBt0/7Wylh+V2F4hlTjF36TfsSC7qWJ40VMBSw5zDUTT++SSeG53MDExOoNB2XmFG7pMV06OMU922KBu9pLv4LniEQZX/aHyTtxmUCTWvahHeaewGn5oEDG+2MDQ9UEqc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=iscas.ac.cn; spf=pass smtp.mailfrom=iscas.ac.cn; arc=none smtp.client-ip=159.226.251.84 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=iscas.ac.cn Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=iscas.ac.cn Received: from [127.0.0.2] (unknown [210.73.43.101]) by APP-05 (Coremail) with SMTP id zQCowACnPBAiEHNp9tMuBg--.1678S5; Fri, 23 Jan 2026 14:07:32 +0800 (CST) From: Vivian Wang Date: Fri, 23 Jan 2026 14:07:30 +0800 Subject: [PATCH v3 3/4] drm/radeon: Raise msi_addr_mask to dma_bits Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260123-pci-msi-addr-mask-v3-3-9f9baa048524@iscas.ac.cn> References: <20260123-pci-msi-addr-mask-v3-0-9f9baa048524@iscas.ac.cn> In-Reply-To: <20260123-pci-msi-addr-mask-v3-0-9f9baa048524@iscas.ac.cn> To: Madhavan Srinivasan , Michael Ellerman , Nicholas Piggin , "Christophe Leroy (CS GROUP)" , Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , David Airlie , Simona Vetter , "Creeley, Brett" , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Bjorn Helgaas , Jaroslav Kysela , Takashi Iwai Cc: Han Gao , Vivian Wang , Thomas Gleixner , linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, netdev@vger.kernel.org, linux-pci@vger.kernel.org, linux-sound@vger.kernel.org, linux-riscv@lists.infradead.org, sophgo@lists.linux.dev X-Mailer: b4 0.14.3 X-CM-TRANSID: zQCowACnPBAiEHNp9tMuBg--.1678S5 X-Coremail-Antispam: 1UD129KBjvJXoW7tF4kGw13JrWxWr48KF4rKrg_yoW8ZF43pF 43GFZxtrZIy3WUKay2kay7ZF15Aa18KayrWr4DG39xua45AryUCry3Z3y3J34kXrykXr42 qr18G3y5uF1FvF7anT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUm214x267AKxVWrJVCq3wAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2048vs2IY020E87I2jVAFwI0_JrWl82xGYIkIc2 x26xkF7I0E14v26ryj6s0DM28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48ve4kI8wA2z4x0 Y4vE2Ix0cI8IcVAFwI0_Xr0_Ar1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI0_Gr1j6F4UJw A2z4x0Y4vEx4A2jsIE14v26rxl6s0DM28EF7xvwVC2z280aVCY1x0267AKxVW0oVCq3wAS 0I0E0xvYzxvE52x082IY62kv0487Mc02F40EFcxC0VAKzVAqx4xG6I80ewAv7VC0I7IYx2 IY67AKxVWUJVWUGwAv7VC2z280aVAFwI0_Gr0_Cr1lOx8S6xCaFVCjc4AY6r1j6r4UM4x0 Y48IcxkI7VAKI48JM4x0x7Aq67IIx4CEVc8vx2IErcIFxwACI402YVCY1x02628vn2kIc2 xKxwCY1x0262kKe7AKxVW8ZVWrXwCF04k20xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWU JVW8JwC20s026c02F40E14v26r1j6r18MI8I3I0E7480Y4vE14v26r106r1rMI8E67AF67 kF1VAFwI0_GFv_WrylIxkGc2Ij64vIr41lIxAIcVC0I7IYx2IY67AKxVWUJVWUCwCI42IY 6xIIjxv20xvEc7CjxVAFwI0_Gr1j6F4UJwCI42IY6xAIw20EY4v20xvaj40_Jr0_JF4lIx AIcVC2z280aVAFwI0_Jr0_Gr1lIxAIcVC2z280aVCY1x0267AKxVW8Jr0_Cr1UYxBIdaVF xhVjvjDU0xZFpf9x0pRVVbgUUUUU= X-CM-SenderInfo: pzdqw2pxlnt03j6l2u1dvotugofq/ The code was originally written using no_64bit_msi, which restricts the device to 32-bit MSI addresses. Since msi_addr_mask is introduced, use DMA_BIT_MASK(dma_bits) instead of DMA_BIT_MASK(32) here for msi_addr_mask, describing the restriction more precisely and allowing these devices to work on platforms with MSI doorbell address above 32-bit space, as long as it is within the hardware's addressable space. Signed-off-by: Vivian Wang --- v3: No changes --- drivers/gpu/drm/radeon/radeon_device.c | 1 + drivers/gpu/drm/radeon/radeon_irq_kms.c | 10 ---------- 2 files changed, 1 insertion(+), 10 deletions(-) diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeo= n/radeon_device.c index 60afaa8e56b4..5faae0361361 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c @@ -1374,6 +1374,7 @@ int radeon_device_init(struct radeon_device *rdev, pr_warn("radeon: No suitable DMA available\n"); return r; } + rdev->pdev->msi_addr_mask =3D DMA_BIT_MASK(dma_bits); rdev->need_swiotlb =3D drm_need_swiotlb(dma_bits); =20 /* Registers mapping */ diff --git a/drivers/gpu/drm/radeon/radeon_irq_kms.c b/drivers/gpu/drm/rade= on/radeon_irq_kms.c index d550554a6f3f..839d619e5602 100644 --- a/drivers/gpu/drm/radeon/radeon_irq_kms.c +++ b/drivers/gpu/drm/radeon/radeon_irq_kms.c @@ -245,16 +245,6 @@ static bool radeon_msi_ok(struct radeon_device *rdev) if (rdev->flags & RADEON_IS_AGP) return false; =20 - /* - * Older chips have a HW limitation, they can only generate 40 bits - * of address for "64-bit" MSIs which breaks on some platforms, notably - * IBM POWER servers, so we limit them - */ - if (rdev->family < CHIP_BONAIRE) { - dev_info(rdev->dev, "radeon: MSI limited to 32-bit\n"); - rdev->pdev->msi_addr_mask =3D DMA_BIT_MASK(32); - } - /* force MSI on */ if (radeon_msi =3D=3D 1) return true; --=20 2.52.0