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[93.89.165.28]) by smtp.googlemail.com with ESMTPSA id 5b1f17b1804b1-4804db7b434sm28693425e9.4.2026.01.23.10.16.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 23 Jan 2026 10:16:19 -0800 (PST) From: Gabor Juhos Date: Fri, 23 Jan 2026 19:16:05 +0100 Subject: [PATCH] arm64: dts: qcom: ipq9574: remove MP5496 regulator references from SoC dtsi Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260123-ipq9574-mp5496-cleanup-v1-1-9fa86f72b873@gmail.com> X-B4-Tracking: v=1; b=H4sIAOS6c2kC/6tWKk4tykwtVrJSqFYqSi3LLM7MzwNyDHUUlJIzE vPSU3UzU4B8JSMDIzMDQyNj3cyCQktTcxPd3AJTE0sz3eSc1MS80gLdxNRU46RUy+QUQ0sjJaD mgqLUtMwKsMHRsbW1APz8codoAAAA X-Change-ID: 20260123-ipq9574-mp5496-cleanup-aee3be9cd192 To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Gabor Juhos X-Mailer: b4 0.14.2 The 'cpu-supply' properties in the IPQ9574 SoC dtsi are referencing to a regulator provided by an MP5496 PMIC via the RPM firmware which's node is defined externally in the common RDP dtsi file. Since the PMIC is not part of the SoC it should not be referenced from the SoC specific dtsi, so remove the properties from there and define those in the common RDP dtsi instead. While at it, also change the prefix of the label from 'ipq9574' to 'mp5496' to keep it consistent with the labels of the l{2,5} regulators provided by the same PMIC. No functional changes. According to dtx_diff there are no differences between the ipq9574*.dtb files built with and without the change. Signed-off-by: Gabor Juhos Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi | 18 +++++++++++++++++- arch/arm64/boot/dts/qcom/ipq9574.dtsi | 4 ---- 2 files changed, 17 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi b/arch/arm64/= boot/dts/qcom/ipq9574-rdp-common.dtsi index bdb396afb9922a4369b4e96a09d0789cef21c046..fb398857b73d259f218f871b003= e53007eb2fdb2 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi @@ -88,11 +88,27 @@ &blsp1_uart2 { status =3D "okay"; }; =20 +&cpu0 { + cpu-supply =3D <&mp5496_s1>; +}; + +&cpu1 { + cpu-supply =3D <&mp5496_s1>; +}; + +&cpu2 { + cpu-supply =3D <&mp5496_s1>; +}; + +&cpu3 { + cpu-supply =3D <&mp5496_s1>; +}; + &rpm_requests { regulators { compatible =3D "qcom,rpm-mp5496-regulators"; =20 - ipq9574_s1: s1 { + mp5496_s1: s1 { /* * During kernel bootup, the SoC runs at 800MHz with 875mV set by the bo= otloaders. * During regulator registration, kernel not knowing the initial voltage, diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qc= om/ipq9574.dtsi index d7278f2137ac58305cc4e82c1d6c26c08bc7a405..8cc0098fc5e364f2535f3a2d403= c1745d929cbc6 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi @@ -56,7 +56,6 @@ cpu0: cpu@0 { clocks =3D <&apcs_glb APCS_ALIAS0_CORE_CLK>; clock-names =3D "cpu"; operating-points-v2 =3D <&cpu_opp_table>; - cpu-supply =3D <&ipq9574_s1>; #cooling-cells =3D <2>; }; =20 @@ -69,7 +68,6 @@ cpu1: cpu@1 { clocks =3D <&apcs_glb APCS_ALIAS0_CORE_CLK>; clock-names =3D "cpu"; operating-points-v2 =3D <&cpu_opp_table>; - cpu-supply =3D <&ipq9574_s1>; #cooling-cells =3D <2>; }; =20 @@ -82,7 +80,6 @@ cpu2: cpu@2 { clocks =3D <&apcs_glb APCS_ALIAS0_CORE_CLK>; clock-names =3D "cpu"; operating-points-v2 =3D <&cpu_opp_table>; - cpu-supply =3D <&ipq9574_s1>; #cooling-cells =3D <2>; }; =20 @@ -95,7 +92,6 @@ cpu3: cpu@3 { clocks =3D <&apcs_glb APCS_ALIAS0_CORE_CLK>; clock-names =3D "cpu"; operating-points-v2 =3D <&cpu_opp_table>; - cpu-supply =3D <&ipq9574_s1>; #cooling-cells =3D <2>; }; =20 --- base-commit: 78c13dac18cf0e6f6cbc6ea85d4f967e6cca9562 change-id: 20260123-ipq9574-mp5496-cleanup-aee3be9cd192 Best regards, --=20 Gabor Juhos