From nobody Tue Feb 10 05:09:40 2026 Received: from smtp-out3.simply.com (smtp-out3.simply.com [94.231.106.210]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3BE8F43E48B; Thu, 22 Jan 2026 12:10:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=94.231.106.210 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769083862; cv=none; b=YTMTBHQzzxIVru3bPcV6LUv2plpQZ4FbCPwO8ZIgMYNuEWB4mwBjUeausJEzM8XZyWvrzi2ut0YrodAde50q3vamAY74CErDDayul4XTl+Hyn5on27Eu15qmWc4qEXGzEgC+wWjv86kzKkAgM5g1Ken+Yp0BfwrgTtRLGQUJUa8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769083862; c=relaxed/simple; bh=ntLjzCp65tIxL92OBrl6hc1EQJAsMAfVCAnEiXcT5zM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ij9St2q1CvOXKPWbjR9nxvaqCrTnf16WDeWtazSBcf8x6QWfMu696HExUD6Vcx0ScNd9fGBJRVtub/6I4IiSaGMGY9gf57qUoEXa7rmSS6/QbsueY3d0j2WJRQ7zUrQMeLA4i0yEQTGmBggRC5QKFsR8NGMxGTQYMGoMwOt/CH4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gaisler.com; spf=pass smtp.mailfrom=gaisler.com; dkim=fail (0-bit key) header.d=gaisler.com header.i=@gaisler.com header.b=N0es4UrF reason="key not found in DNS"; arc=none smtp.client-ip=94.231.106.210 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gaisler.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gaisler.com Authentication-Results: smtp.subspace.kernel.org; dkim=fail reason="key not found in DNS" (0-bit key) header.d=gaisler.com header.i=@gaisler.com header.b="N0es4UrF" Received: from localhost (localhost [127.0.0.1]) by smtp.simply.com (Simply.com) with ESMTP id 4dxfzF5n9Qz1FgdH; Thu, 22 Jan 2026 13:10:49 +0100 (CET) Received: from d-5xj5g74.got.gaisler.com.com (h-98-128-223-123.NA.cust.bahnhof.se [98.128.223.123]) by smtp.simply.com (Simply.com) with ESMTPA id 4dxfzF1GQyz1DDC3; Thu, 22 Jan 2026 13:10:49 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gaisler.com; s=simplycom2; t=1769083849; bh=nupmb7DwN5GSSfjG2VlctIMK0Bsqy3N15mv4BCL+2aY=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=N0es4UrFjCHccec7Br0nj90q1NRZiQTOeG9CCQQq/ZT684PY5euIer2O90yjHaDZ/ fNcL2GbHP4NNxkKbuBqMcaF0Km/Ro7mk9ORg81gK4XT9Sg0BXt2tdM5+xGTwXoi8in dthvu4TKHin9HgOk/smUUzX1XoiOpLS+J/LOVRidMdwoBF+DBV7h5RW4ntWrH5gtOH IKUttCYYyMkycihydfdTM9sv9Z4TKdF7PlOwNZtnNKu83qC0DlZ62CPVz8BM1tyaNG SVn/N/C60vKHLMenNx+4cHayApLitE/mXx3C67ThFgKkfHfnzdZFwNz8KhELRx/zE8 YjtisUYR9dBZw== From: Arun Muthusamy To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, mkl@pengutronix.de, mailhol@kernel.org Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-can@vger.kernel.org, Daniel Hellstrom , Arun Muthusamy Subject: [PATCH v3 11/15] can: grcan: Reserve space between cap and next register to align with address layout Date: Thu, 22 Jan 2026 13:10:34 +0100 Message-ID: <20260122121038.7910-12-arun.muthusamy@gaisler.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260122121038.7910-1-arun.muthusamy@gaisler.com> References: <20260122121038.7910-1-arun.muthusamy@gaisler.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Daniel Hellstrom Reserves space between the capability register and the next register within the GRCAN driver to align with the hardware address layout. Signed-off-by: Daniel Hellstrom Signed-off-by: Arun Muthusamy --- drivers/net/can/grcan.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/can/grcan.c b/drivers/net/can/grcan.c index 0ee6e9bfbe7f..e99a8c2bffc6 100644 --- a/drivers/net/can/grcan.c +++ b/drivers/net/can/grcan.c @@ -49,7 +49,8 @@ struct grcan_registers { u32 conf; /* 0x00 */ u32 stat; /* 0x04 */ u32 ctrl; /* 0x08 */ - u32 __reserved1[GRCAN_RESERVE_SIZE(0x08, 0x18)]; + u32 cap; /* 0x0c */ + u32 __reserved1[GRCAN_RESERVE_SIZE(0x0c, 0x18)]; u32 smask; /* 0x18 - CanMASK */ u32 scode; /* 0x1c - CanCODE */ u32 __reserved2[GRCAN_RESERVE_SIZE(0x1c, 0x40)]; --=20 2.51.0