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AJvYcCVs1ssO4ytEYGuEVLpW3l7uLBKPwI7OKWIZ5G3uFv3xKTQX9W0ZIoDDzQcE98bSKT4brwOwIQ4Gkif08N0=@vger.kernel.org X-Gm-Message-State: AOJu0YxOjlBs7Jswr839Od1gozOumw/pfHnNkmOcbuDqWnQDooC7a8Hq ObaPCmcX7WWlSTCpNsKLT5eqNYLjpKlcXIudG2bjZVLZaruqEGVTlHBpLW46QgYvcPKLZ47ej0R XXwtoqKQNdQ== X-Received: from dybtv7.prod.google.com ([2002:a05:7300:f487:b0:2a4:612e:b41f]) (user=irogers job=prod-delivery.src-stubby-dispatcher) by 2002:a05:693c:60d6:b0:2b7:2ae8:9b0d with SMTP id 5a478bee46e88-2b72ae8a816mr511795eec.3.1769067103279; Wed, 21 Jan 2026 23:31:43 -0800 (PST) Date: Wed, 21 Jan 2026 23:31:23 -0800 In-Reply-To: <20260122073127.375139-1-irogers@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20260122073127.375139-1-irogers@google.com> X-Mailer: git-send-email 2.52.0.457.g6b5491de43-goog Message-ID: <20260122073127.375139-8-irogers@google.com> Subject: [PATCH v1 07/11] perf disasm: Don't include C files from the arch directory From: Ian Rogers To: Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , James Clark , John Garry , Will Deacon , Leo Yan , Guo Ren , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Nathan Chancellor , Nick Desaulniers , Bill Wendling , Justin Stitt , Zecheng Li , Tianyou Li , Thomas Falcon , Julia Lawall , Suchit Karunakaran , Athira Rajeev , Aditya Bodkhe , Howard Chu , "=?UTF-8?q?Krzysztof=20=C5=81opatowski?=" , "Dr. David Alan Gilbert" , Shimin Guo , Sergei Trofimovich , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-csky@vger.kernel.org, linux-riscv@lists.infradead.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Move the arch instructions.c files into appropriately named files in annotate-arch in the util directory. Don't #include to compile the code, switch to building the files and fix up the #includes accordingly. Move powerpc specific disasm code out of disasm.c and into annotate-powerpc.c. Declarations and static removed as appropriate for the code to compile as separate compilation units. The e_machine and e_flags set up is moved to the disasm.c architectures array so that later patches can sort by them. Signed-off-by: Ian Rogers --- tools/perf/util/Build | 1 + tools/perf/util/annotate-arch/Build | 11 + .../annotate-arch/annotate-arc.c} | 5 +- .../annotate-arch/annotate-arm.c} | 9 +- .../annotate-arch/annotate-arm64.c} | 14 +- .../annotate-arch/annotate-csky.c} | 11 +- .../annotate-arch/annotate-loongarch.c} | 15 +- .../annotate-arch/annotate-mips.c} | 6 +- .../annotate-arch/annotate-powerpc.c} | 105 ++++++++- .../annotate-arch/annotate-riscv64.c} | 6 +- .../annotate-arch/annotate-s390.c} | 15 +- .../annotate-arch/annotate-sparc.c} | 7 +- .../annotate-arch/annotate-x86.c} | 85 +++++--- tools/perf/util/disasm.c | 199 ++++-------------- tools/perf/util/disasm.h | 38 ++++ 15 files changed, 289 insertions(+), 238 deletions(-) create mode 100644 tools/perf/util/annotate-arch/Build rename tools/perf/{arch/arc/annotate/instructions.c =3D> util/annotate-arc= h/annotate-arc.c} (53%) rename tools/perf/{arch/arm/annotate/instructions.c =3D> util/annotate-arc= h/annotate-arm.c} (90%) rename tools/perf/{arch/arm64/annotate/instructions.c =3D> util/annotate-a= rch/annotate-arm64.c} (90%) rename tools/perf/{arch/csky/annotate/instructions.c =3D> util/annotate-ar= ch/annotate-csky.c} (83%) rename tools/perf/{arch/loongarch/annotate/instructions.c =3D> util/annota= te-arch/annotate-loongarch.c} (93%) rename tools/perf/{arch/mips/annotate/instructions.c =3D> util/annotate-ar= ch/annotate-mips.c} (94%) rename tools/perf/{arch/powerpc/annotate/instructions.c =3D> util/annotate= -arch/annotate-powerpc.c} (76%) rename tools/perf/{arch/riscv64/annotate/instructions.c =3D> util/annotate= -arch/annotate-riscv64.c} (91%) rename tools/perf/{arch/s390/annotate/instructions.c =3D> util/annotate-ar= ch/annotate-s390.c} (91%) rename tools/perf/{arch/sparc/annotate/instructions.c =3D> util/annotate-a= rch/annotate-sparc.c} (96%) rename tools/perf/{arch/x86/annotate/instructions.c =3D> util/annotate-arc= h/annotate-x86.c} (97%) diff --git a/tools/perf/util/Build b/tools/perf/util/Build index c30ff257f8b4..b9925c6902ca 100644 --- a/tools/perf/util/Build +++ b/tools/perf/util/Build @@ -1,6 +1,7 @@ include $(srctree)/tools/scripts/Makefile.include include $(srctree)/tools/scripts/utilities.mak =20 +perf-util-y +=3D annotate-arch/ perf-util-y +=3D arm64-frame-pointer-unwind-support.o perf-util-y +=3D addr2line.o perf-util-y +=3D addr_location.o diff --git a/tools/perf/util/annotate-arch/Build b/tools/perf/util/annotate= -arch/Build new file mode 100644 index 000000000000..23316743fdc5 --- /dev/null +++ b/tools/perf/util/annotate-arch/Build @@ -0,0 +1,11 @@ +perf-util-y +=3D annotate-arc.o +perf-util-y +=3D annotate-arm.o +perf-util-y +=3D annotate-arm64.o +perf-util-y +=3D annotate-csky.o +perf-util-y +=3D annotate-loongarch.o +perf-util-y +=3D annotate-mips.o +perf-util-y +=3D annotate-x86.o +perf-util-y +=3D annotate-powerpc.o +perf-util-y +=3D annotate-riscv64.o +perf-util-y +=3D annotate-s390.o +perf-util-y +=3D annotate-sparc.o diff --git a/tools/perf/arch/arc/annotate/instructions.c b/tools/perf/util/= annotate-arch/annotate-arc.c similarity index 53% rename from tools/perf/arch/arc/annotate/instructions.c rename to tools/perf/util/annotate-arch/annotate-arc.c index e5619770a1af..d7ca08ca5600 100644 --- a/tools/perf/arch/arc/annotate/instructions.c +++ b/tools/perf/util/annotate-arch/annotate-arc.c @@ -1,11 +1,10 @@ // SPDX-License-Identifier: GPL-2.0 #include +#include "../disasm.h" =20 -static int arc__annotate_init(struct arch *arch, char *cpuid __maybe_unuse= d) +int arc__annotate_init(struct arch *arch, char *cpuid __maybe_unused) { arch->initialized =3D true; arch->objdump.comment_char =3D ';'; - arch->e_machine =3D EM_ARC; - arch->e_flags =3D 0; return 0; } diff --git a/tools/perf/arch/arm/annotate/instructions.c b/tools/perf/util/= annotate-arch/annotate-arm.c similarity index 90% rename from tools/perf/arch/arm/annotate/instructions.c rename to tools/perf/util/annotate-arch/annotate-arm.c index b997d127fedd..08c49067c3c9 100644 --- a/tools/perf/arch/arm/annotate/instructions.c +++ b/tools/perf/util/annotate-arch/annotate-arm.c @@ -1,10 +1,11 @@ // SPDX-License-Identifier: GPL-2.0 +#include #include #include #include -#include #include -#include +#include "../annotate.h" +#include "../disasm.h" =20 struct arm_annotate { regex_t call_insn, @@ -28,7 +29,7 @@ static const struct ins_ops *arm__associate_instruction_o= ps(struct arch *arch, c return ops; } =20 -static int arm__annotate_init(struct arch *arch, char *cpuid __maybe_unuse= d) +int arm__annotate_init(struct arch *arch, char *cpuid __maybe_unused) { struct arm_annotate *arm; int err; @@ -54,8 +55,6 @@ static int arm__annotate_init(struct arch *arch, char *cp= uid __maybe_unused) arch->associate_instruction_ops =3D arm__associate_instruction_ops; arch->objdump.comment_char =3D ';'; arch->objdump.skip_functions_char =3D '+'; - arch->e_machine =3D EM_ARM; - arch->e_flags =3D 0; return 0; =20 out_free_call: diff --git a/tools/perf/arch/arm64/annotate/instructions.c b/tools/perf/uti= l/annotate-arch/annotate-arm64.c similarity index 90% rename from tools/perf/arch/arm64/annotate/instructions.c rename to tools/perf/util/annotate-arch/annotate-arm64.c index 44db33854dba..d2ea32984b0d 100644 --- a/tools/perf/arch/arm64/annotate/instructions.c +++ b/tools/perf/util/annotate-arch/annotate-arm64.c @@ -1,9 +1,12 @@ // SPDX-License-Identifier: GPL-2.0 #include #include -#include -#include #include +#include +#include +#include +#include "../annotate.h" +#include "../disasm.h" =20 struct arm64_annotate { regex_t call_insn, @@ -60,9 +63,6 @@ static int arm64_mov__parse(const struct arch *arch __may= be_unused, return -1; } =20 -static int mov__scnprintf(const struct ins *ins, char *bf, size_t size, - struct ins_operands *ops, int max_ins_name); - static const struct ins_ops arm64_mov_ops =3D { .parse =3D arm64_mov__parse, .scnprintf =3D mov__scnprintf, @@ -87,7 +87,7 @@ static const struct ins_ops *arm64__associate_instruction= _ops(struct arch *arch, return ops; } =20 -static int arm64__annotate_init(struct arch *arch, char *cpuid __maybe_unu= sed) +int arm64__annotate_init(struct arch *arch, char *cpuid __maybe_unused) { struct arm64_annotate *arm; int err; @@ -114,8 +114,6 @@ static int arm64__annotate_init(struct arch *arch, char= *cpuid __maybe_unused) arch->associate_instruction_ops =3D arm64__associate_instruction_ops; arch->objdump.comment_char =3D '/'; arch->objdump.skip_functions_char =3D '+'; - arch->e_machine =3D EM_AARCH64; - arch->e_flags =3D 0; return 0; =20 out_free_call: diff --git a/tools/perf/arch/csky/annotate/instructions.c b/tools/perf/util= /annotate-arch/annotate-csky.c similarity index 83% rename from tools/perf/arch/csky/annotate/instructions.c rename to tools/perf/util/annotate-arch/annotate-csky.c index 4a55c84a320a..0b0b09b068ec 100644 --- a/tools/perf/arch/csky/annotate/instructions.c +++ b/tools/perf/util/annotate-arch/annotate-csky.c @@ -1,7 +1,8 @@ // SPDX-License-Identifier: GPL-2.0 // Copyright (C) 2019 Hangzhou C-SKY Microsystems co.,ltd. - +#include #include +#include "../disasm.h" =20 static const struct ins_ops *csky__associate_ins_ops(struct arch *arch, const char *name) @@ -38,16 +39,10 @@ static const struct ins_ops *csky__associate_ins_ops(st= ruct arch *arch, return ops; } =20 -static int csky__annotate_init(struct arch *arch, char *cpuid __maybe_unus= ed) +int csky__annotate_init(struct arch *arch, char *cpuid __maybe_unused) { arch->initialized =3D true; arch->objdump.comment_char =3D '/'; arch->associate_instruction_ops =3D csky__associate_ins_ops; - arch->e_machine =3D EM_CSKY; -#if defined(__CSKYABIV2__) - arch->e_flags =3D EF_CSKY_ABIV2; -#else - arch->e_flags =3D EF_CSKY_ABIV1; -#endif return 0; } diff --git a/tools/perf/arch/loongarch/annotate/instructions.c b/tools/perf= /util/annotate-arch/annotate-loongarch.c similarity index 93% rename from tools/perf/arch/loongarch/annotate/instructions.c rename to tools/perf/util/annotate-arch/annotate-loongarch.c index ee360faad420..4bd651b63652 100644 --- a/tools/perf/arch/loongarch/annotate/instructions.c +++ b/tools/perf/util/annotate-arch/annotate-loongarch.c @@ -4,11 +4,17 @@ * * Copyright (C) 2020-2023 Loongson Technology Corporation Limited */ +#include +#include +#include +#include "../disasm.h" +#include "../map.h" +#include "../maps.h" +#include "../symbol.h" =20 static int loongarch_call__parse(const struct arch *arch, struct ins_opera= nds *ops, struct map_symbol *ms, struct disasm_line *dl __maybe_unused) - { char *c, *endptr, *tok, *name; struct map *map =3D ms->map; @@ -49,7 +55,7 @@ static int loongarch_call__parse(const struct arch *arch,= struct ins_operands *o return 0; } =20 -static const struct ins_ops loongarch_call_ops =3D { +const struct ins_ops loongarch_call_ops =3D { .parse =3D loongarch_call__parse, .scnprintf =3D call__scnprintf, }; @@ -98,7 +104,7 @@ static int loongarch_jump__parse(const struct arch *arch= , struct ins_operands *o return 0; } =20 -static const struct ins_ops loongarch_jump_ops =3D { +const struct ins_ops loongarch_jump_ops =3D { .parse =3D loongarch_jump__parse, .scnprintf =3D jump__scnprintf, }; @@ -128,15 +134,12 @@ const struct ins_ops *loongarch__associate_ins_ops(st= ruct arch *arch, const char return ops; } =20 -static int loongarch__annotate_init(struct arch *arch, char *cpuid __maybe_unused) { if (!arch->initialized) { arch->associate_instruction_ops =3D loongarch__associate_ins_ops; arch->initialized =3D true; arch->objdump.comment_char =3D '#'; - arch->e_machine =3D EM_LOONGARCH; - arch->e_flags =3D 0; } =20 return 0; diff --git a/tools/perf/arch/mips/annotate/instructions.c b/tools/perf/util= /annotate-arch/annotate-mips.c similarity index 94% rename from tools/perf/arch/mips/annotate/instructions.c rename to tools/perf/util/annotate-arch/annotate-mips.c index 0fbe0a7df95a..f14b34ed77d3 100644 --- a/tools/perf/arch/mips/annotate/instructions.c +++ b/tools/perf/util/annotate-arch/annotate-mips.c @@ -1,4 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 +#include +#include +#include "../disasm.h" =20 static const struct ins_ops *mips__associate_ins_ops(struct arch *arch, const cha= r *name) @@ -33,15 +36,12 @@ const struct ins_ops *mips__associate_ins_ops(struct ar= ch *arch, const char *nam return ops; } =20 -static int mips__annotate_init(struct arch *arch, char *cpuid __maybe_unused) { if (!arch->initialized) { arch->associate_instruction_ops =3D mips__associate_ins_ops; arch->initialized =3D true; arch->objdump.comment_char =3D '#'; - arch->e_machine =3D EM_MIPS; - arch->e_flags =3D 0; } =20 return 0; diff --git a/tools/perf/arch/powerpc/annotate/instructions.c b/tools/perf/u= til/annotate-arch/annotate-powerpc.c similarity index 76% rename from tools/perf/arch/powerpc/annotate/instructions.c rename to tools/perf/util/annotate-arch/annotate-powerpc.c index d1be55425e35..593c138c8104 100644 --- a/tools/perf/arch/powerpc/annotate/instructions.c +++ b/tools/perf/util/annotate-arch/annotate-powerpc.c @@ -1,5 +1,97 @@ // SPDX-License-Identifier: GPL-2.0 +#include #include +#include +#include "../annotate-data.h" +#include "../debug.h" +#include "../disasm.h" + +#define PPC_OP(op) (((op) >> 26) & 0x3F) +#define PPC_21_30(R) (((R) >> 1) & 0x3ff) +#define PPC_22_30(R) (((R) >> 1) & 0x1ff) + +#define MINUS_EXT_XO_FORM 234 +#define SUB_EXT_XO_FORM 232 +#define ADD_ZERO_EXT_XO_FORM 202 +#define SUB_ZERO_EXT_XO_FORM 200 + +static int arithmetic__scnprintf(const struct ins *ins, char *bf, size_t s= ize, + struct ins_operands *ops, int max_ins_name) +{ + return scnprintf(bf, size, "%-*s %s", max_ins_name, ins->name, + ops->raw); +} + +/* + * Sets the fields: multi_regs and "mem_ref". + * "mem_ref" is set for ops->source which is later used to + * fill the objdump->memory_ref-char field. This ops is currently + * used by powerpc and since binary instruction code is used to + * extract opcode, regs and offset, no other parsing is needed here. + * + * Dont set multi regs for 4 cases since it has only one operand + * for source: + * - Add to Minus One Extended XO-form ( Ex: addme, addmeo ) + * - Subtract From Minus One Extended XO-form ( Ex: subfme ) + * - Add to Zero Extended XO-form ( Ex: addze, addzeo ) + * - Subtract From Zero Extended XO-form ( Ex: subfze ) + */ +static int arithmetic__parse(const struct arch *arch __maybe_unused, struc= t ins_operands *ops, + struct map_symbol *ms __maybe_unused, struct disasm_line *dl) +{ + int opcode =3D PPC_OP(dl->raw.raw_insn); + + ops->source.mem_ref =3D false; + if (opcode =3D=3D 31) { + if ((opcode !=3D MINUS_EXT_XO_FORM) && (opcode !=3D SUB_EXT_XO_FORM) && + (opcode !=3D ADD_ZERO_EXT_XO_FORM) && (opcode !=3D SUB_ZERO_EXT_XO_F= ORM)) + ops->source.multi_regs =3D true; + } + + ops->target.mem_ref =3D false; + ops->target.multi_regs =3D false; + + return 0; +} + +static const struct ins_ops arithmetic_ops =3D { + .parse =3D arithmetic__parse, + .scnprintf =3D arithmetic__scnprintf, +}; + +static int load_store__scnprintf(const struct ins *ins, char *bf, size_t s= ize, + struct ins_operands *ops, int max_ins_name) +{ + return scnprintf(bf, size, "%-*s %s", max_ins_name, ins->name, + ops->raw); +} + +/* + * Sets the fields: multi_regs and "mem_ref". + * "mem_ref" is set for ops->source which is later used to + * fill the objdump->memory_ref-char field. This ops is currently + * used by powerpc and since binary instruction code is used to + * extract opcode, regs and offset, no other parsing is needed here + */ +static int load_store__parse(const struct arch *arch __maybe_unused, struc= t ins_operands *ops, + struct map_symbol *ms __maybe_unused, struct disasm_line *dl __maybe_unu= sed) +{ + ops->source.mem_ref =3D true; + ops->source.multi_regs =3D false; + /* opcode 31 is of X form */ + if (PPC_OP(dl->raw.raw_insn) =3D=3D 31) + ops->source.multi_regs =3D true; + + ops->target.mem_ref =3D false; + ops->target.multi_regs =3D false; + + return 0; +} + +static const struct ins_ops load_store_ops =3D { + .parse =3D load_store__parse, + .scnprintf =3D load_store__scnprintf, +}; =20 static const struct ins_ops *powerpc__associate_instruction_ops(struct arc= h *arch, const char *name) { @@ -49,10 +141,6 @@ static const struct ins_ops *powerpc__associate_instruc= tion_ops(struct arch *arc return ops; } =20 -#define PPC_OP(op) (((op) >> 26) & 0x3F) -#define PPC_21_30(R) (((R) >> 1) & 0x3ff) -#define PPC_22_30(R) (((R) >> 1) & 0x1ff) - struct insn_offset { const char *name; int value; @@ -189,7 +277,7 @@ static int cmp_offset(const void *a, const void *b) return (val1->value - val2->value); } =20 -static const struct ins_ops *check_ppc_insn(struct disasm_line *dl) +const struct ins_ops *check_ppc_insn(struct disasm_line *dl) { int raw_insn =3D dl->raw.raw_insn; int opcode =3D PPC_OP(raw_insn); @@ -302,15 +390,16 @@ static void update_insn_state_powerpc(struct type_sta= te *state, } #endif /* HAVE_LIBDW_SUPPORT */ =20 -static int powerpc__annotate_init(struct arch *arch, char *cpuid __maybe_u= nused) +int powerpc__annotate_init(struct arch *arch, char *cpuid __maybe_unused) { if (!arch->initialized) { arch->initialized =3D true; arch->associate_instruction_ops =3D powerpc__associate_instruction_ops; arch->objdump.comment_char =3D '#'; annotate_opts.show_asm_raw =3D true; - arch->e_machine =3D EM_PPC; - arch->e_flags =3D 0; +#ifdef HAVE_LIBDW_SUPPORT + arch->update_insn_state =3D update_insn_state_powerpc; +#endif } =20 return 0; diff --git a/tools/perf/arch/riscv64/annotate/instructions.c b/tools/perf/u= til/annotate-arch/annotate-riscv64.c similarity index 91% rename from tools/perf/arch/riscv64/annotate/instructions.c rename to tools/perf/util/annotate-arch/annotate-riscv64.c index a34798864fab..15526824037a 100644 --- a/tools/perf/arch/riscv64/annotate/instructions.c +++ b/tools/perf/util/annotate-arch/annotate-riscv64.c @@ -1,4 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 +#include +#include +#include "../disasm.h" =20 static const struct ins_ops *riscv64__associate_ins_ops(struct arch *arch, const = char *name) @@ -21,15 +24,12 @@ const struct ins_ops *riscv64__associate_ins_ops(struct= arch *arch, const char * return ops; } =20 -static int riscv64__annotate_init(struct arch *arch, char *cpuid __maybe_unused) { if (!arch->initialized) { arch->associate_instruction_ops =3D riscv64__associate_ins_ops; arch->initialized =3D true; arch->objdump.comment_char =3D '#'; - arch->e_machine =3D EM_RISCV; - arch->e_flags =3D 0; } =20 return 0; diff --git a/tools/perf/arch/s390/annotate/instructions.c b/tools/perf/util= /annotate-arch/annotate-s390.c similarity index 91% rename from tools/perf/arch/s390/annotate/instructions.c rename to tools/perf/util/annotate-arch/annotate-s390.c index 38f7e918ebf8..c1d06caa5f77 100644 --- a/tools/perf/arch/s390/annotate/instructions.c +++ b/tools/perf/util/annotate-arch/annotate-s390.c @@ -1,5 +1,13 @@ // SPDX-License-Identifier: GPL-2.0 +#include #include +#include "../debug.h" +#include "../disasm.h" +#include "../map.h" +#include "../maps.h" +#include "../symbol.h" +#include "../annotate.h" +#include "../annotate-data.h" =20 static int s390_call__parse(const struct arch *arch, struct ins_operands *= ops, struct map_symbol *ms, @@ -46,7 +54,7 @@ static int s390_call__parse(const struct arch *arch, stru= ct ins_operands *ops, return 0; } =20 -static const struct ins_ops s390_call_ops =3D { +const struct ins_ops s390_call_ops =3D { .parse =3D s390_call__parse, .scnprintf =3D call__scnprintf, }; @@ -156,7 +164,7 @@ static int s390__cpuid_parse(struct arch *arch, char *c= puid) return -1; } =20 -static int s390__annotate_init(struct arch *arch, char *cpuid __maybe_unus= ed) +int s390__annotate_init(struct arch *arch, char *cpuid __maybe_unused) { int err =3D 0; =20 @@ -167,8 +175,7 @@ static int s390__annotate_init(struct arch *arch, char = *cpuid __maybe_unused) if (s390__cpuid_parse(arch, cpuid)) err =3D SYMBOL_ANNOTATE_ERRNO__ARCH_INIT_CPUID_PARSING; } - arch->e_machine =3D EM_S390; - arch->e_flags =3D 0; + arch->objdump.comment_char =3D '#'; } =20 return err; diff --git a/tools/perf/arch/sparc/annotate/instructions.c b/tools/perf/uti= l/annotate-arch/annotate-sparc.c similarity index 96% rename from tools/perf/arch/sparc/annotate/instructions.c rename to tools/perf/util/annotate-arch/annotate-sparc.c index a08d8734c883..66a0174376dd 100644 --- a/tools/perf/arch/sparc/annotate/instructions.c +++ b/tools/perf/util/annotate-arch/annotate-sparc.c @@ -1,4 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 +#include +#include +#include "../../util/disasm.h" =20 static int is_branch_cond(const char *cond) { @@ -157,14 +160,12 @@ static const struct ins_ops *sparc__associate_instruc= tion_ops(struct arch *arch, return ops; } =20 -static int sparc__annotate_init(struct arch *arch, char *cpuid __maybe_unu= sed) +int sparc__annotate_init(struct arch *arch, char *cpuid __maybe_unused) { if (!arch->initialized) { arch->initialized =3D true; arch->associate_instruction_ops =3D sparc__associate_instruction_ops; arch->objdump.comment_char =3D '#'; - arch->e_machine =3D EM_SPARC; - arch->e_flags =3D 0; } =20 return 0; diff --git a/tools/perf/arch/x86/annotate/instructions.c b/tools/perf/util/= annotate-arch/annotate-x86.c similarity index 97% rename from tools/perf/arch/x86/annotate/instructions.c rename to tools/perf/util/annotate-arch/annotate-x86.c index ffca3029388b..0c7957fe60da 100644 --- a/tools/perf/arch/x86/annotate/instructions.c +++ b/tools/perf/util/annotate-arch/annotate-x86.c @@ -1,4 +1,16 @@ // SPDX-License-Identifier: GPL-2.0 +#include +#include +#include +#include +#include "../annotate-data.h" +#include "../debug.h" +#include "../disasm.h" +#include "../dso.h" +#include "../map.h" +#include "../string2.h" // strstarts +#include "../symbol.h" + /* * x86 instruction nmemonic table to parse disasm lines for annotate. * This table is searched twice - one for exact match and another for @@ -191,37 +203,6 @@ static int x86__cpuid_parse(struct arch *arch, char *c= puid) return -1; } =20 -static int x86__annotate_init(struct arch *arch, char *cpuid) -{ - int err =3D 0; - - if (arch->initialized) - return 0; - - if (cpuid) { - if (x86__cpuid_parse(arch, cpuid)) - err =3D SYMBOL_ANNOTATE_ERRNO__ARCH_INIT_CPUID_PARSING; - } - -#ifndef NDEBUG - { - static bool sorted_check; - - if (!sorted_check) { - for (size_t i =3D 0; i < arch->nr_instructions - 1; i++) { - assert(strcmp(arch->instructions[i].name, - arch->instructions[i + 1].name) <=3D 0); - } - sorted_check =3D true; - } - } -#endif - arch->e_machine =3D EM_X86_64; - arch->e_flags =3D 0; - arch->initialized =3D true; - return err; -} - #ifdef HAVE_LIBDW_SUPPORT static void update_insn_state_x86(struct type_state *state, struct data_loc_info *dloc, Dwarf_Die *cu_die, @@ -795,3 +776,45 @@ static void update_insn_state_x86(struct type_state *s= tate, /* Case 4. memory to memory transfers (not handled for now) */ } #endif + +int x86__annotate_init(struct arch *arch, char *cpuid) +{ + int err =3D 0; + + if (arch->initialized) + return 0; + + if (cpuid) { + if (x86__cpuid_parse(arch, cpuid)) + err =3D SYMBOL_ANNOTATE_ERRNO__ARCH_INIT_CPUID_PARSING; + } + + arch->instructions =3D x86__instructions; + arch->nr_instructions =3D ARRAY_SIZE(x86__instructions); +#ifndef NDEBUG + { + static bool sorted_check; + + if (!sorted_check) { + for (size_t i =3D 0; i < arch->nr_instructions - 1; i++) { + assert(strcmp(arch->instructions[i].name, + arch->instructions[i + 1].name) <=3D 0); + } + sorted_check =3D true; + } + } +#endif + arch->sorted_instructions =3D true; + arch->objdump.comment_char =3D '#'; + arch->objdump.register_char =3D '%'; + arch->objdump.memory_ref_char =3D '('; + arch->objdump.imm_char =3D '$'; + arch->insn_suffix =3D "bwlq"; + arch->e_machine =3D EM_X86_64; + arch->e_flags =3D 0; + arch->initialized =3D true; +#ifdef HAVE_LIBDW_SUPPORT + arch->update_insn_state =3D update_insn_state_x86; +#endif + return err; +} diff --git a/tools/perf/util/disasm.c b/tools/perf/util/disasm.c index bc6cc7a60e3c..c732b015f2e8 100644 --- a/tools/perf/util/disasm.c +++ b/tools/perf/util/disasm.c @@ -33,20 +33,15 @@ static regex_t file_lineno; =20 /* These can be referred from the arch-dependent code */ -static const struct ins_ops call_ops; -static const struct ins_ops dec_ops; -static const struct ins_ops jump_ops; -static const struct ins_ops mov_ops; -static const struct ins_ops nop_ops; -static const struct ins_ops lock_ops; -static const struct ins_ops ret_ops; -static const struct ins_ops load_store_ops; -static const struct ins_ops arithmetic_ops; - -static int jump__scnprintf(const struct ins *ins, char *bf, size_t size, - struct ins_operands *ops, int max_ins_name); -static int call__scnprintf(const struct ins *ins, char *bf, size_t size, - struct ins_operands *ops, int max_ins_name); +const struct ins_ops call_ops; +const struct ins_ops dec_ops; +const struct ins_ops jump_ops; +const struct ins_ops mov_ops; +const struct ins_ops nop_ops; +const struct ins_ops lock_ops; +const struct ins_ops ret_ops; +const struct ins_ops load_store_ops; +const struct ins_ops arithmetic_ops; =20 static void ins__sort(struct arch *arch); static int disasm_line__parse(char *line, const char **namep, char **rawp); @@ -86,7 +81,7 @@ static int arch__grow_instructions(struct arch *arch) goto out_update_instructions; } =20 -static int arch__associate_ins_ops(struct arch *arch, const char *name, co= nst struct ins_ops *ops) +int arch__associate_ins_ops(struct arch *arch, const char *name, const str= uct ins_ops *ops) { struct ins *ins; =20 @@ -106,90 +101,66 @@ static int arch__associate_ins_ops(struct arch *arch,= const char *name, const st return 0; } =20 -#include "arch/arc/annotate/instructions.c" -#include "arch/arm/annotate/instructions.c" -#include "arch/arm64/annotate/instructions.c" -#include "arch/csky/annotate/instructions.c" -#include "arch/loongarch/annotate/instructions.c" -#include "arch/mips/annotate/instructions.c" -#include "arch/x86/annotate/instructions.c" -#include "arch/powerpc/annotate/instructions.c" -#include "arch/riscv64/annotate/instructions.c" -#include "arch/s390/annotate/instructions.c" -#include "arch/sparc/annotate/instructions.c" - static struct arch architectures[] =3D { { .name =3D "arc", .init =3D arc__annotate_init, + .e_machine =3D EM_ARC, }, { .name =3D "arm", .init =3D arm__annotate_init, + .e_machine =3D EM_ARM, }, { .name =3D "arm64", .init =3D arm64__annotate_init, + .e_machine =3D EM_AARCH64, }, { .name =3D "csky", .init =3D csky__annotate_init, + .e_machine =3D EM_CSKY, +#if defined(__CSKYABIV2__) + .e_flags =3D EF_CSKY_ABIV2, +#else + .e_flags =3D EF_CSKY_ABIV1, +#endif }, { .name =3D "mips", .init =3D mips__annotate_init, - .objdump =3D { - .comment_char =3D '#', - }, + .e_machine =3D EM_MIPS, }, { .name =3D "x86", .init =3D x86__annotate_init, - .instructions =3D x86__instructions, - .nr_instructions =3D ARRAY_SIZE(x86__instructions), - .sorted_instructions =3D true, - .insn_suffix =3D "bwlq", - .objdump =3D { - .comment_char =3D '#', - .register_char =3D '%', - .memory_ref_char =3D '(', - .imm_char =3D '$', - }, -#ifdef HAVE_LIBDW_SUPPORT - .update_insn_state =3D update_insn_state_x86, -#endif + .e_machine =3D EM_X86_64, // TODO: EM_386 too. }, { .name =3D "powerpc", .init =3D powerpc__annotate_init, -#ifdef HAVE_LIBDW_SUPPORT - .update_insn_state =3D update_insn_state_powerpc, -#endif + .e_machine =3D EM_PPC, // TODO: EM_PPC64 too. }, { .name =3D "riscv64", .init =3D riscv64__annotate_init, + .e_machine =3D EM_RISCV, }, { .name =3D "s390", .init =3D s390__annotate_init, - .objdump =3D { - .comment_char =3D '#', - }, + .e_machine =3D EM_S390, }, { .name =3D "sparc", .init =3D sparc__annotate_init, - .objdump =3D { - .comment_char =3D '#', - }, + .e_machine =3D EM_SPARC, }, { .name =3D "loongarch", .init =3D loongarch__annotate_init, - .objdump =3D { - .comment_char =3D '#', - }, + .e_machine =3D EM_LOONGARCH, }, }; =20 @@ -248,14 +219,14 @@ static void ins_ops__delete(struct ins_operands *ops) zfree(&ops->target.name); } =20 -static int ins__raw_scnprintf(const struct ins *ins, char *bf, size_t size, - struct ins_operands *ops, int max_ins_name) +int ins__raw_scnprintf(const struct ins *ins, char *bf, size_t size, + struct ins_operands *ops, int max_ins_name) { return scnprintf(bf, size, "%-*s %s", max_ins_name, ins->name, ops->raw); } =20 -static int ins__scnprintf(const struct ins *ins, char *bf, size_t size, - struct ins_operands *ops, int max_ins_name) +int ins__scnprintf(const struct ins *ins, char *bf, size_t size, + struct ins_operands *ops, int max_ins_name) { if (ins->ops->scnprintf) return ins->ops->scnprintf(ins, bf, size, ops, max_ins_name); @@ -326,8 +297,8 @@ static int call__parse(const struct arch *arch, struct = ins_operands *ops, struct goto find_target; } =20 -static int call__scnprintf(const struct ins *ins, char *bf, size_t size, - struct ins_operands *ops, int max_ins_name) +int call__scnprintf(const struct ins *ins, char *bf, size_t size, + struct ins_operands *ops, int max_ins_name) { if (ops->target.sym) return scnprintf(bf, size, "%-*s %s", max_ins_name, ins->name, ops->targ= et.sym->name); @@ -341,7 +312,7 @@ static int call__scnprintf(const struct ins *ins, char = *bf, size_t size, return scnprintf(bf, size, "%-*s *%" PRIx64, max_ins_name, ins->name, ops= ->target.addr); } =20 -static const struct ins_ops call_ops =3D { +const struct ins_ops call_ops =3D { .parse =3D call__parse, .scnprintf =3D call__scnprintf, }; @@ -453,8 +424,8 @@ static int jump__parse(const struct arch *arch, struct = ins_operands *ops, struct return 0; } =20 -static int jump__scnprintf(const struct ins *ins, char *bf, size_t size, - struct ins_operands *ops, int max_ins_name) +int jump__scnprintf(const struct ins *ins, char *bf, size_t size, + struct ins_operands *ops, int max_ins_name) { const char *c; =20 @@ -494,7 +465,7 @@ static void jump__delete(struct ins_operands *ops __may= be_unused) */ } =20 -static const struct ins_ops jump_ops =3D { +const struct ins_ops jump_ops =3D { .free =3D jump__delete, .parse =3D jump__parse, .scnprintf =3D jump__scnprintf, @@ -586,7 +557,7 @@ static void lock__delete(struct ins_operands *ops) zfree(&ops->target.name); } =20 -static const struct ins_ops lock_ops =3D { +const struct ins_ops lock_ops =3D { .free =3D lock__delete, .parse =3D lock__parse, .scnprintf =3D lock__scnprintf, @@ -687,103 +658,19 @@ static int mov__parse(const struct arch *arch, struc= t ins_operands *ops, return -1; } =20 -static int mov__scnprintf(const struct ins *ins, char *bf, size_t size, - struct ins_operands *ops, int max_ins_name) +int mov__scnprintf(const struct ins *ins, char *bf, size_t size, + struct ins_operands *ops, int max_ins_name) { return scnprintf(bf, size, "%-*s %s,%s", max_ins_name, ins->name, ops->source.name ?: ops->source.raw, ops->target.name ?: ops->target.raw); } =20 -static const struct ins_ops mov_ops =3D { +const struct ins_ops mov_ops =3D { .parse =3D mov__parse, .scnprintf =3D mov__scnprintf, }; =20 -#define PPC_22_30(R) (((R) >> 1) & 0x1ff) -#define MINUS_EXT_XO_FORM 234 -#define SUB_EXT_XO_FORM 232 -#define ADD_ZERO_EXT_XO_FORM 202 -#define SUB_ZERO_EXT_XO_FORM 200 - -static int arithmetic__scnprintf(const struct ins *ins, char *bf, size_t s= ize, - struct ins_operands *ops, int max_ins_name) -{ - return scnprintf(bf, size, "%-*s %s", max_ins_name, ins->name, - ops->raw); -} - -/* - * Sets the fields: multi_regs and "mem_ref". - * "mem_ref" is set for ops->source which is later used to - * fill the objdump->memory_ref-char field. This ops is currently - * used by powerpc and since binary instruction code is used to - * extract opcode, regs and offset, no other parsing is needed here. - * - * Dont set multi regs for 4 cases since it has only one operand - * for source: - * - Add to Minus One Extended XO-form ( Ex: addme, addmeo ) - * - Subtract From Minus One Extended XO-form ( Ex: subfme ) - * - Add to Zero Extended XO-form ( Ex: addze, addzeo ) - * - Subtract From Zero Extended XO-form ( Ex: subfze ) - */ -static int arithmetic__parse(const struct arch *arch __maybe_unused, struc= t ins_operands *ops, - struct map_symbol *ms __maybe_unused, struct disasm_line *dl) -{ - int opcode =3D PPC_OP(dl->raw.raw_insn); - - ops->source.mem_ref =3D false; - if (opcode =3D=3D 31) { - if ((opcode !=3D MINUS_EXT_XO_FORM) && (opcode !=3D SUB_EXT_XO_FORM) \ - && (opcode !=3D ADD_ZERO_EXT_XO_FORM) && (opcode !=3D SUB_ZERO_EXT_XO_= FORM)) - ops->source.multi_regs =3D true; - } - - ops->target.mem_ref =3D false; - ops->target.multi_regs =3D false; - - return 0; -} - -static const struct ins_ops arithmetic_ops =3D { - .parse =3D arithmetic__parse, - .scnprintf =3D arithmetic__scnprintf, -}; - -static int load_store__scnprintf(const struct ins *ins, char *bf, size_t s= ize, - struct ins_operands *ops, int max_ins_name) -{ - return scnprintf(bf, size, "%-*s %s", max_ins_name, ins->name, - ops->raw); -} - -/* - * Sets the fields: multi_regs and "mem_ref". - * "mem_ref" is set for ops->source which is later used to - * fill the objdump->memory_ref-char field. This ops is currently - * used by powerpc and since binary instruction code is used to - * extract opcode, regs and offset, no other parsing is needed here - */ -static int load_store__parse(const struct arch *arch __maybe_unused, struc= t ins_operands *ops, - struct map_symbol *ms __maybe_unused, struct disasm_line *dl __maybe_unu= sed) -{ - ops->source.mem_ref =3D true; - ops->source.multi_regs =3D false; - /* opcode 31 is of X form */ - if (PPC_OP(dl->raw.raw_insn) =3D=3D 31) - ops->source.multi_regs =3D true; - - ops->target.mem_ref =3D false; - ops->target.multi_regs =3D false; - - return 0; -} - -static const struct ins_ops load_store_ops =3D { - .parse =3D load_store__parse, - .scnprintf =3D load_store__scnprintf, -}; - static int dec__parse(const struct arch *arch __maybe_unused, struct ins_o= perands *ops, struct map_symbol *ms __maybe_unused, struct disasm_line *dl __maybe_unused) @@ -820,7 +707,7 @@ static int dec__scnprintf(const struct ins *ins, char *= bf, size_t size, ops->target.name ?: ops->target.raw); } =20 -static const struct ins_ops dec_ops =3D { +const struct ins_ops dec_ops =3D { .parse =3D dec__parse, .scnprintf =3D dec__scnprintf, }; @@ -831,11 +718,11 @@ static int nop__scnprintf(const struct ins *ins __may= be_unused, char *bf, size_t return scnprintf(bf, size, "%-*s", max_ins_name, "nop"); } =20 -static const struct ins_ops nop_ops =3D { +const struct ins_ops nop_ops =3D { .scnprintf =3D nop__scnprintf, }; =20 -static const struct ins_ops ret_ops =3D { +const struct ins_ops ret_ops =3D { .scnprintf =3D ins__raw_scnprintf, }; =20 diff --git a/tools/perf/util/disasm.h b/tools/perf/util/disasm.h index db7f1ee3d8e7..83503c5075f9 100644 --- a/tools/perf/util/disasm.h +++ b/tools/perf/util/disasm.h @@ -109,6 +109,28 @@ const struct arch *arch__find(const char *name); bool arch__is_x86(const struct arch *arch); bool arch__is_powerpc(const struct arch *arch); =20 +extern const struct ins_ops call_ops; +extern const struct ins_ops dec_ops; +extern const struct ins_ops jump_ops; +extern const struct ins_ops mov_ops; +extern const struct ins_ops nop_ops; +extern const struct ins_ops lock_ops; +extern const struct ins_ops ret_ops; + +int arch__associate_ins_ops(struct arch *arch, const char *name, const str= uct ins_ops *ops); + +int arc__annotate_init(struct arch *arch, char *cpuid); +int arm__annotate_init(struct arch *arch, char *cpuid); +int arm64__annotate_init(struct arch *arch, char *cpuid); +int csky__annotate_init(struct arch *arch, char *cpuid); +int loongarch__annotate_init(struct arch *arch, char *cpuid); +int mips__annotate_init(struct arch *arch, char *cpuid); +int powerpc__annotate_init(struct arch *arch, char *cpuid); +int riscv64__annotate_init(struct arch *arch, char *cpuid); +int s390__annotate_init(struct arch *arch, char *cpuid); +int sparc__annotate_init(struct arch *arch, char *cpuid); +int x86__annotate_init(struct arch *arch, char *cpuid); + const struct ins_ops *ins__find(const struct arch *arch, const char *name,= struct disasm_line *dl); =20 bool ins__is_call(const struct ins *ins); @@ -117,12 +139,28 @@ bool ins__is_fused(const struct arch *arch, const cha= r *ins1, const char *ins2); bool ins__is_ret(const struct ins *ins); bool ins__is_lock(const struct ins *ins); =20 +extern const struct ins_ops s390_call_ops; +extern const struct ins_ops loongarch_call_ops; +extern const struct ins_ops loongarch_jump_ops; +const struct ins_ops *check_ppc_insn(struct disasm_line *dl); + struct disasm_line *disasm_line__new(struct annotate_args *args); void disasm_line__free(struct disasm_line *dl); =20 int disasm_line__scnprintf(struct disasm_line *dl, char *bf, size_t size, bool raw, int max_ins_name); =20 +int ins__raw_scnprintf(const struct ins *ins, char *bf, size_t size, + struct ins_operands *ops, int max_ins_name); +int ins__scnprintf(const struct ins *ins, char *bf, size_t size, + struct ins_operands *ops, int max_ins_name); +int call__scnprintf(const struct ins *ins, char *bf, size_t size, + struct ins_operands *ops, int max_ins_name); +int jump__scnprintf(const struct ins *ins, char *bf, size_t size, + struct ins_operands *ops, int max_ins_name); +int mov__scnprintf(const struct ins *ins, char *bf, size_t size, + struct ins_operands *ops, int max_ins_name); + int symbol__disassemble(struct symbol *sym, struct annotate_args *args); =20 char *expand_tabs(char *line, char **storage, size_t *storage_len); --=20 2.52.0.457.g6b5491de43-goog