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Wed, 21 Jan 2026 07:01:54 -0800 (PST) Received: from iku.example.org ([2a06:5906:61b:2d00:3190:c653:bb13:4ca]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-48042b6a3e2sm24787585e9.1.2026.01.21.07.01.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Jan 2026 07:01:54 -0800 (PST) From: Prabhakar X-Google-Original-From: Prabhakar To: Thomas Gleixner , Philipp Zabel , Geert Uytterhoeven , Magnus Damm Cc: linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [PATCH 4/6] irqchip/renesas-rzv2h: Add CA55 software interrupt support Date: Wed, 21 Jan 2026 15:01:35 +0000 Message-ID: <20260121150137.3364865-5-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20260121150137.3364865-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20260121150137.3364865-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Lad Prabhakar The Renesas RZ/V2H ICU provides a software interrupt register (ICU_SWINT) that allows software to explicitly assert interrupts toward individual CA55 cores. Writing BIT(n) to ICU_SWINT triggers the corresponding interrupt. Introduce a debug mechanism to trigger software interrupts on individual Cortex-A55 cores via the RZ/V2H ICU. The interface is gated behind CONFIG_DEBUG_FS and a module parameter to ensure it only exists when explicitly enabled. Signed-off-by: Lad Prabhakar --- drivers/irqchip/irq-renesas-rzv2h.c | 111 ++++++++++++++++++++++++++++ 1 file changed, 111 insertions(+) diff --git a/drivers/irqchip/irq-renesas-rzv2h.c b/drivers/irqchip/irq-rene= sas-rzv2h.c index 4aa772ba1a1f..7d3ce1d762f0 100644 --- a/drivers/irqchip/irq-renesas-rzv2h.c +++ b/drivers/irqchip/irq-renesas-rzv2h.c @@ -11,16 +11,23 @@ =20 #include #include +#include +#include #include +#include #include #include #include #include +#include +#include +#include #include #include #include #include #include +#include =20 /* DT "interrupts" indexes */ #define ICU_IRQ_START 1 @@ -40,6 +47,7 @@ #define ICU_TSCLR 0x24 #define ICU_TITSR(k) (0x28 + (k) * 4) #define ICU_TSSR(k) (0x30 + (k) * 4) +#define ICU_SWINT 0x130 #define ICU_DMkSELy(k, y) (0x420 + (k) * 0x20 + (y) * 4) #define ICU_DMACKSELk(k) (0x500 + (k) * 4) =20 @@ -90,6 +98,13 @@ #define ICU_RZG3E_TSSEL_MAX_VAL 0x8c #define ICU_RZV2H_TSSEL_MAX_VAL 0x55 =20 +#define ICU_SWINT_NUM 4 + +static bool enable_icu_debug; +module_param_named(debug, enable_icu_debug, bool, 0644); +MODULE_PARM_DESC(debug, + "Enable RZ/V2H ICU debug/diagnostic interrupts (default: false)"); + /** * struct rzv2h_irqc_reg_cache - registers cache (necessary for suspend/re= sume) * @nitsr: ICU_NITSR register @@ -550,6 +565,98 @@ static int rzv2h_icu_parse_interrupts(struct rzv2h_icu= _priv *priv, struct device return 0; } =20 +static irqreturn_t rzv2h_icu_swint_irq(int irq, void *data) +{ + u8 cpu =3D *(u8 *)data; + + pr_debug("SWINT interrupt for CA55 core %u\n", cpu); + return IRQ_HANDLED; +} + +static void rzv2h_icu_remove_debugfs(void *file) +{ + debugfs_remove(file); +} + +static ssize_t rzv2h_icu_swint_write(struct file *file, const char __user = *ubuf, + size_t len, loff_t *ppos) +{ + struct rzv2h_icu_priv *priv =3D file->private_data; + unsigned long cpu; + char buf[32]; + int ret; + + len =3D min(len, sizeof(buf) - 1); + if (copy_from_user(buf, ubuf, len)) + return -EFAULT; + buf[len] =3D '\0'; + + ret =3D kstrtoul(strim(buf), 0, &cpu); + if (ret) + return ret; + + if (cpu >=3D ICU_SWINT_NUM || cpu >=3D nr_cpu_ids) + return -EINVAL; + + if (!cpu_online(cpu)) + return -ENODEV; + + writel(BIT(cpu), priv->base + ICU_SWINT); + return len; +} + +static const struct file_operations rzv2h_icu_swint_fops =3D { + .open =3D simple_open, + .write =3D rzv2h_icu_swint_write, + .llseek =3D noop_llseek, +}; + +static int rzv2h_icu_setup_debug_irqs(struct platform_device *pdev) +{ + static const u8 swint_idx[ICU_SWINT_NUM] =3D { 0, 1, 2, 3 }; + static const char * const rzv2h_swint_names[] =3D { + "int-ca55-0", "int-ca55-1", + "int-ca55-2", "int-ca55-3", + }; + struct device *dev =3D &pdev->dev; + struct dentry *dentry; + struct dentry *dir; + unsigned int i; + int icu_irq; + int ret; + + if (!IS_ENABLED(CONFIG_DEBUG_FS) || !enable_icu_debug) + return 0; + + dev_info(dev, "RZ/V2H ICU debug interrupts enabled\n"); + + for (i =3D 0; i < ICU_SWINT_NUM; i++) { + icu_irq =3D platform_get_irq_byname(pdev, rzv2h_swint_names[i]); + if (icu_irq < 0) + return dev_err_probe(dev, icu_irq, + "Failed to get %s IRQ\n", rzv2h_swint_names[i]); + ret =3D devm_request_irq(dev, icu_irq, rzv2h_icu_swint_irq, 0, dev_name(= dev), + (void *)&swint_idx[i]); + if (ret) + return dev_err_probe(dev, ret, "Failed to request SWINT IRQ: %s\n", + rzv2h_swint_names[i]); + } + + dir =3D debugfs_create_dir("rzv2h_icu", NULL); + if (IS_ERR(dir)) + return PTR_ERR(dir); + + ret =3D devm_add_action_or_reset(dev, rzv2h_icu_remove_debugfs, dir); + if (ret) + return ret; + + dentry =3D debugfs_create_file("swint", 0200, dir, rzv2h_icu_data, &rzv2h= _icu_swint_fops); + if (IS_ERR(dentry)) + return PTR_ERR(dentry); + + return devm_add_action_or_reset(dev, rzv2h_icu_remove_debugfs, dentry); +} + static int rzv2h_icu_probe_common(struct platform_device *pdev, struct dev= ice_node *parent, const struct rzv2h_hw_info *hw_info) { @@ -605,6 +712,10 @@ static int rzv2h_icu_probe_common(struct platform_devi= ce *pdev, struct device_no =20 register_syscore(&rzv2h_irqc_syscore); =20 + ret =3D rzv2h_icu_setup_debug_irqs(pdev); + if (ret) + goto pm_put; + /* * coccicheck complains about a missing put_device call before returning,= but it's a false * positive. We still need dev after successfully returning from this fun= ction. --=20 2.52.0