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X-OriginatorOrg: ti.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Jan 2026 13:56:18.1372 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: eb04c9ce-d659-44bc-8cd9-08de58f4d9c7 X-MS-Exchange-CrossTenant-Id: e5b49634-450b-4709-8abb-1e2b19b982b7 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=e5b49634-450b-4709-8abb-1e2b19b982b7;Ip=[198.47.21.194];Helo=[flwvzet200.ext.ti.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000042AE.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR10MB7374 Content-Type: text/plain; charset="utf-8" From: Jai Luthra We already make sure to submit all available buffers to DMA in each DMA completion callback. Move that logic in a separate function, and use it during stream start as well, as most application queue all their buffers before stream on. Signed-off-by: Jai Luthra Reviewed-by: Tomi Valkeinen Reviewed-by: Yemike Abhilash Chandra Co-developed-by: Rishikesh Donadkar Signed-off-by: Rishikesh Donadkar --- .../platform/ti/j721e-csi2rx/j721e-csi2rx.c | 42 +++++++++++-------- 1 file changed, 24 insertions(+), 18 deletions(-) diff --git a/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c b/driver= s/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c index 4dabb99792d44..5bb726f7d4f44 100644 --- a/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c +++ b/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c @@ -664,11 +664,32 @@ static int ti_csi2rx_drain_dma(struct ti_csi2rx_ctx *= ctx) return ret; } =20 +static int ti_csi2rx_dma_submit_pending(struct ti_csi2rx_ctx *ctx) +{ + struct ti_csi2rx_dma *dma =3D &ctx->dma; + struct ti_csi2rx_buffer *buf; + int ret =3D 0; + + /* If there are more buffers to process then start their transfer. */ + while (!list_empty(&dma->queue)) { + buf =3D list_entry(dma->queue.next, struct ti_csi2rx_buffer, list); + ret =3D ti_csi2rx_start_dma(ctx, buf); + if (ret) { + dev_err(ctx->csi->dev, + "Failed to queue the next buffer for DMA\n"); + vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR); + list_del(&buf->list); + } else { + list_move_tail(&buf->list, &dma->submitted); + } + } + return ret; +} + static void ti_csi2rx_dma_callback(void *param) { struct ti_csi2rx_buffer *buf =3D param; struct ti_csi2rx_ctx *ctx =3D buf->ctx; - struct ti_csi2rx_dev *csi =3D ctx->csi; struct ti_csi2rx_dma *dma =3D &ctx->dma; unsigned long flags; =20 @@ -685,18 +706,7 @@ static void ti_csi2rx_dma_callback(void *param) vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_DONE); list_del(&buf->list); =20 - /* If there are more buffers to process then start their transfer. */ - while (!list_empty(&dma->queue)) { - buf =3D list_entry(dma->queue.next, struct ti_csi2rx_buffer, list); - - if (ti_csi2rx_start_dma(ctx, buf)) { - dev_err(csi->dev, "Failed to queue the next buffer for DMA\n"); - list_del(&buf->list); - vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR); - } else { - list_move_tail(&buf->list, &dma->submitted); - } - } + ti_csi2rx_dma_submit_pending(ctx); =20 if (list_empty(&dma->submitted)) dma->state =3D TI_CSI2RX_DMA_IDLE; @@ -1129,7 +1139,6 @@ static int ti_csi2rx_sd_enable_streams(struct v4l2_su= bdev *sd, struct ti_csi2rx_ctx *ctx =3D &csi->ctx[pad - TI_CSI2RX_PAD_FIRST_SOURCE]; struct ti_csi2rx_dma *dma =3D &ctx->dma; struct media_pad *remote_pad; - struct ti_csi2rx_buffer *buf; const struct ti_csi2rx_fmt *fmt; unsigned long flags; u64 sink_streams; @@ -1160,16 +1169,13 @@ static int ti_csi2rx_sd_enable_streams(struct v4l2_= subdev *sd, ctx->sequence =3D 0; =20 spin_lock_irqsave(&dma->lock, flags); - buf =3D list_entry(dma->queue.next, struct ti_csi2rx_buffer, list); =20 - ret =3D ti_csi2rx_start_dma(ctx, buf); + ret =3D ti_csi2rx_dma_submit_pending(ctx); if (ret) { - dev_err(csi->dev, "Failed to start DMA: %d\n", ret); spin_unlock_irqrestore(&dma->lock, flags); return ret; } =20 - list_move_tail(&buf->list, &dma->submitted); dma->state =3D TI_CSI2RX_DMA_ACTIVE; spin_unlock_irqrestore(&dma->lock, flags); =20 --=20 2.34.1