From nobody Sun Feb 8 00:26:35 2026 Received: from canpmsgout06.his.huawei.com (canpmsgout06.his.huawei.com [113.46.200.221]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0F3B2481AB4 for ; Wed, 21 Jan 2026 10:15:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=113.46.200.221 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768990555; cv=none; b=p95mzn26qrbAQ5i5DFxaeI89GbcFZg00gq7InV44w1caEcCA2KslXu0wq8CVPjT/IbFoE06EGyeGNP+X9QB6NAHZcy7Kjrl0moSJid1gV+bPn4AsdpsK6KNzY42Qul1vyz5UWkF5nZLFTObJhP2qkC2XjYlJ4wZkYdblEr58BYk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768990555; c=relaxed/simple; bh=Fbwjw98UWzKeNhtc5etZKJm6WwwF2LcFkrrRkc2BXRs=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=uJ/Cx2mWgFJ0u77Qffl96phCShNABNTJ4TnA03E6RpeKNzG+TGH8ElZitTFxZurVDYnXCCys2NfoEVg9PUEtJQ8MbSd7hvaQexrYxXAg/+lVXKNQChaRcTLZjrbaFYEPzsepkzGsKXAD2uhJKEkLDj/7yFTSZHqRDy5JKIDmQiY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b=P6ltT9nv; arc=none smtp.client-ip=113.46.200.221 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b="P6ltT9nv" dkim-signature: v=1; a=rsa-sha256; d=huawei.com; s=dkim; c=relaxed/relaxed; q=dns/txt; h=From; bh=joWREewfpnlp1dObxxpfeaRY0yPm74sAct58CXfc0RY=; b=P6ltT9nvrd2j1J8exCB9iVDM3LbBMxEdwS0e4afo6oXptc9V5KJaKSkl7Dvnj1zUxl+Zb7cPy wP2Fs8udpzQ6+QtOncveHkjF1j9CZe/AEE+rlUfN4iWomGdd2WKi7Ae2kZsF9Aizo6ldmM3m9Gb dWdBSg6NBLO1VZR9p+zBaFI= Received: from mail.maildlp.com (unknown [172.19.163.0]) by canpmsgout06.his.huawei.com (SkyGuard) with ESMTPS id 4dx0P10K8XzRhQm; Wed, 21 Jan 2026 18:12:21 +0800 (CST) Received: from dggemv706-chm.china.huawei.com (unknown [10.3.19.33]) by mail.maildlp.com (Postfix) with ESMTPS id 1E7BB4056B; Wed, 21 Jan 2026 18:15:45 +0800 (CST) Received: from kwepemn100008.china.huawei.com (7.202.194.111) by dggemv706-chm.china.huawei.com (10.3.19.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Wed, 21 Jan 2026 18:15:44 +0800 Received: from localhost.huawei.com (10.90.31.46) by kwepemn100008.china.huawei.com (7.202.194.111) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.36; Wed, 21 Jan 2026 18:15:44 +0800 From: Yushan Wang To: , , , , , CC: , , , , , , Subject: [PATCH v5 1/3] coresight: tmc: Add missing doc including reading and etr_mode of struct tmc_drvdata Date: Wed, 21 Jan 2026 18:15:41 +0800 Message-ID: <20260121101543.2017014-2-wangyushan12@huawei.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20260121101543.2017014-1-wangyushan12@huawei.com> References: <20260121101543.2017014-1-wangyushan12@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: kwepems500001.china.huawei.com (7.221.188.70) To kwepemn100008.china.huawei.com (7.202.194.111) Content-Type: text/plain; charset="utf-8" From: Yicong Yang tmc_drvdata::reading is used to indicate whether a reading process is performed through /dev/xyz.tmc. tmc_drvdata::etr_mode is used to store the Coresight TMC-ETR buffer mode selected by the user. Document them. Reviewed-by: James Clark Signed-off-by: Yicong Yang Reviewed-by: Leo Yan Signed-off-by: Junhao He --- drivers/hwtracing/coresight/coresight-tmc.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracin= g/coresight/coresight-tmc.h index 95473d131032..319a354ede9f 100644 --- a/drivers/hwtracing/coresight/coresight-tmc.h +++ b/drivers/hwtracing/coresight/coresight-tmc.h @@ -221,6 +221,7 @@ struct tmc_resrv_buf { * @pid: Process ID of the process that owns the session that is using * this component. For example this would be the pid of the Perf * process. + * @reading: buffer's in the reading through "/dev/xyz.tmc" entry * @stop_on_flush: Stop on flush trigger user configuration. * @buf: Snapshot of the trace data for ETF/ETB. * @etr_buf: details of buffer used in TMC-ETR @@ -233,6 +234,7 @@ struct tmc_resrv_buf { * @trigger_cntr: amount of words to store after a trigger. * @etr_caps: Bitmask of capabilities of the TMC ETR, inferred from the * device configuration register (DEVID) + * @etr_mode: User preferred mode of the ETR device, default auto mode. * @idr: Holds etr_bufs allocated for this ETR. * @idr_mutex: Access serialisation for idr. * @sysfs_buf: SYSFS buffer for ETR. --=20 2.33.0 From nobody Sun Feb 8 00:26:35 2026 Received: from canpmsgout01.his.huawei.com (canpmsgout01.his.huawei.com [113.46.200.216]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4BF1538BDD4 for ; Wed, 21 Jan 2026 10:15:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=113.46.200.216 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768990551; cv=none; b=i099wSFeZCuPJpKToqDp/Gx4gQ8kFz8V2e6cW6hKQxEib2DC5VevLZGBK3UiRmCzMEr9o0miu6kes2II0c7GrXS4PLUyOf/TPFEHnqCLcrmVjV/z3kYBDE06uQ2K080fcxnq3iJRjhfBARiCY6x4P9G8qV7PejV9e5qOOhPkLnU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768990551; c=relaxed/simple; bh=Zr0qwhORQYUYjgZ3PANC4gTKJdvlIKjy5btZ784A/Tg=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=np9YRGubG7HkYbqH63uRrI0c/blWE8WJ4CzyehmUriJ5qSZvDFThLNmSoZ8MBfftrl5f8F0JAv+pzH2db+oFqloY9+GFEfq2Vpmzg2onftr7qcZ9fOBGcuc81Ct4gSzC9xmNe+JZ0XkI6JUISlf8VWpKSDwyin69GyEYOd2y9d4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b=XxMXYMfc; arc=none smtp.client-ip=113.46.200.216 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b="XxMXYMfc" dkim-signature: v=1; a=rsa-sha256; d=huawei.com; s=dkim; c=relaxed/relaxed; q=dns/txt; h=From; bh=yNcYzRqRFOHuPxQt5oqfw0T1O8F+lbBG3hLsgKheepY=; b=XxMXYMfczr86xcNHRH2DweGacFS4mHx/YDyQM5pBEtcE7Uz9Mydu+Pg0zo/oVgtEjAB1UjJvt e+keaa/3y9/OwAxsouwX/u9L21DsluYD0TIOWcXLxlcwOH3yIWCAOmAQK1eY7oIS6teDUmyhr1c xr5VqYXfC3aL0LkXcZv7MG0= Received: from mail.maildlp.com (unknown [172.19.162.223]) by canpmsgout01.his.huawei.com (SkyGuard) with ESMTPS id 4dx0NG6HFfz1T4MS; Wed, 21 Jan 2026 18:11:42 +0800 (CST) Received: from dggemv712-chm.china.huawei.com (unknown [10.1.198.32]) by mail.maildlp.com (Postfix) with ESMTPS id 9B46440539; Wed, 21 Jan 2026 18:15:45 +0800 (CST) Received: from kwepemn100008.china.huawei.com (7.202.194.111) by dggemv712-chm.china.huawei.com (10.1.198.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Wed, 21 Jan 2026 18:15:45 +0800 Received: from localhost.huawei.com (10.90.31.46) by kwepemn100008.china.huawei.com (7.202.194.111) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.36; Wed, 21 Jan 2026 18:15:44 +0800 From: Yushan Wang To: , , , , , CC: , , , , , , Subject: [PATCH v5 2/3] coresight: tmc-etr: Fix race condition between sysfs and perf mode Date: Wed, 21 Jan 2026 18:15:42 +0800 Message-ID: <20260121101543.2017014-3-wangyushan12@huawei.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20260121101543.2017014-1-wangyushan12@huawei.com> References: <20260121101543.2017014-1-wangyushan12@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: kwepems500001.china.huawei.com (7.221.188.70) To kwepemn100008.china.huawei.com (7.202.194.111) Content-Type: text/plain; charset="utf-8" From: Yicong Yang When trying to run perf and sysfs mode simultaneously, the WARN_ON() in tmc_etr_enable_hw() is triggered sometimes: WARNING: CPU: 42 PID: 3911571 at drivers/hwtracing/coresight/coresight-tmc= -etr.c:1060 tmc_etr_enable_hw+0xc0/0xd8 [coresight_tmc] [..snip..] Call trace: tmc_etr_enable_hw+0xc0/0xd8 [coresight_tmc] (P) tmc_enable_etr_sink+0x11c/0x250 [coresight_tmc] (L) tmc_enable_etr_sink+0x11c/0x250 [coresight_tmc] coresight_enable_path+0x1c8/0x218 [coresight] coresight_enable_sysfs+0xa4/0x228 [coresight] enable_source_store+0x58/0xa8 [coresight] dev_attr_store+0x20/0x40 sysfs_kf_write+0x4c/0x68 kernfs_fop_write_iter+0x120/0x1b8 vfs_write+0x2c8/0x388 ksys_write+0x74/0x108 __arm64_sys_write+0x24/0x38 el0_svc_common.constprop.0+0x64/0x148 do_el0_svc+0x24/0x38 el0_svc+0x3c/0x130 el0t_64_sync_handler+0xc8/0xd0 el0t_64_sync+0x1ac/0x1b0 ---[ end trace 0000000000000000 ]--- Since the enablement of sysfs mode is separeted into two critical regions, one for sysfs buffer allocation and another for hardware enablement, it's possible to race with the perf mode. Fix this by double check whether the perf mode's been used before enabling the hardware in sysfs mode. mode: [sysfs mode] [perf mode] tmc_etr_get_sysfs_buffer() spin_lock(&drvdata->spinlock) [sysfs buffer allocation] spin_unlock(&drvdata->spinlock) spin_lock(&drvdata->spinlock) tmc_etr_enable_hw() drvdata->etr_buf =3D etr_perf->etr_buf spin_unlock(&drvdata->spinlock) spin_lock(&drvdata->spinlock) tmc_etr_enable_hw() WARN_ON(drvdata->etr_buf) // WARN sicne etr_buf initialized at the perf side spin_unlock(&drvdata->spinlock) With this fix, we retain the check for CS_MODE_PERF in get_etr_sysfs_buf. This ensures we verify whether the perf mode's already running before we actually allocate the buffer. Then we can save the time of allocating/freeing the sysfs buffer if race with the perf mode. Fixes: 296b01fd106e ("coresight: Refactor out buffer allocation function fo= r ETR") Signed-off-by: Yicong Yang Signed-off-by: Junhao He --- drivers/hwtracing/coresight/coresight-tmc-etr.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtr= acing/coresight/coresight-tmc-etr.c index e0d83ee01b77..fc0a946053dd 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c @@ -1306,6 +1306,19 @@ static int tmc_enable_etr_sink_sysfs(struct coresigh= t_device *csdev) =20 raw_spin_lock_irqsave(&drvdata->spinlock, flags); =20 + /* + * Since the sysfs buffer allocation and the hardware enablement is not + * in the same critical region, it's possible to race with the perf. + */ + if (coresight_get_mode(csdev) =3D=3D CS_MODE_PERF) { + drvdata->sysfs_buf =3D NULL; + raw_spin_unlock_irqrestore(&drvdata->spinlock, flags); + + /* Free allocated memory out side of the spinlock */ + tmc_etr_free_sysfs_buf(sysfs_buf); + return -EBUSY; + } + /* * In sysFS mode we can have multiple writers per sink. Since this * sink is already enabled no memory is needed and the HW need not be --=20 2.33.0 From nobody Sun Feb 8 00:26:35 2026 Received: from canpmsgout03.his.huawei.com (canpmsgout03.his.huawei.com [113.46.200.218]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CD7083BBA05 for ; Wed, 21 Jan 2026 10:15:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=113.46.200.218 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768990551; cv=none; b=PEEbJPJ6vnhxj3YsGycJx2PZpCRNyHtDzFDP//m1IK/sQB1uO0wJJNvAd/6qZr+ZeduUJLxze8Sjhp8PXnWfHjmpc4GvyX5XkFcJidQMHSzT3Yk01kH2kWlPwo/fs3w2JCC6r+R9N9AF+UleDCZ7U3OL9sCk+VXaopmqQBz10Ac= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768990551; c=relaxed/simple; bh=xERB3rGqRdPSVmkJ9/4cinH0FLt0DO1fhvMdftI4MnA=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=WtRJ2yibXHJ+Yc5tkonAwMMdaskAXl+wvu/3oWtoFmyXMRg4nmnRlEeciqCi5Js+62sDb7zL3P3q0IOYsW6bu/a2HTUuYnDCm+laeTDwiTPCgS4EvDHMz8/wIhdfkUllMR9NJE9fPxkkJjtobRm4Ti6cTIXR4yGxgAFEzPv8ir4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b=QmKS4GXs; arc=none smtp.client-ip=113.46.200.218 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b="QmKS4GXs" dkim-signature: v=1; a=rsa-sha256; d=huawei.com; s=dkim; c=relaxed/relaxed; q=dns/txt; h=From; bh=I3U1Z5r/oJQJ8Swr+0RW6Y6ntVi3pLUWh5uPNAHTjzs=; b=QmKS4GXsphZP8JN1pxgaNj7sGHSyaf1/pHLzvpLk6E6Rm7wrnZ1JAkotE9Lg72yLmPaqQvuC9 y1HR9ctRMIkL6HMc5X4NPPRm8Ms8aMKsCzFNzroHT1HjLNZ6A0lBAa1jBRSHbsLYXsYPEcKI+KW f6EVvlxuE3dtwHa4Y9vhT6Y= Received: from mail.maildlp.com (unknown [172.19.162.197]) by canpmsgout03.his.huawei.com (SkyGuard) with ESMTPS id 4dx0Nc1KF3zpStK; Wed, 21 Jan 2026 18:12:00 +0800 (CST) Received: from dggemv705-chm.china.huawei.com (unknown [10.3.19.32]) by mail.maildlp.com (Postfix) with ESMTPS id 224DD40363; Wed, 21 Jan 2026 18:15:46 +0800 (CST) Received: from kwepemn100008.china.huawei.com (7.202.194.111) by dggemv705-chm.china.huawei.com (10.3.19.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Wed, 21 Jan 2026 18:15:45 +0800 Received: from localhost.huawei.com (10.90.31.46) by kwepemn100008.china.huawei.com (7.202.194.111) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.36; Wed, 21 Jan 2026 18:15:45 +0800 From: Yushan Wang To: , , , , , CC: , , , , , , Subject: [PATCH v5 3/3] coresight: tmc: Decouple the perf buffer allocation from sysfs mode Date: Wed, 21 Jan 2026 18:15:43 +0800 Message-ID: <20260121101543.2017014-4-wangyushan12@huawei.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20260121101543.2017014-1-wangyushan12@huawei.com> References: <20260121101543.2017014-1-wangyushan12@huawei.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: kwepems500001.china.huawei.com (7.221.188.70) To kwepemn100008.china.huawei.com (7.202.194.111) Content-Type: text/plain; charset="utf-8" From: Yicong Yang Currently the perf buffer allocation follows the below logic: - if the required AUX buffer size if larger, allocate the buffer with the required size - otherwise allocate the size reference to the sysfs buffer size This is not useful as we only collect to one AUX data, so just try to allocate the buffer match the AUX buffer size. Suggested-by: Suzuki K Poulose Link: https://lore.kernel.org/linux-arm-kernel/df8967cd-2157-46a2-97d9-a1ae= a883cf63@arm.com/ Signed-off-by: Yicong Yang Signed-off-by: Junhao He --- .../hwtracing/coresight/coresight-tmc-etr.c | 30 ++++++------------- 1 file changed, 9 insertions(+), 21 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtr= acing/coresight/coresight-tmc-etr.c index fc0a946053dd..cee82e52c4ea 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c @@ -1367,9 +1367,7 @@ EXPORT_SYMBOL_GPL(tmc_etr_get_buffer); =20 /* * alloc_etr_buf: Allocate ETR buffer for use by perf. - * The size of the hardware buffer is dependent on the size configured - * via sysfs and the perf ring buffer size. We prefer to allocate the - * largest possible size, scaling down the size by half until it + * Allocate the largest possible size, scaling down the size by half until= it * reaches a minimum limit (1M), beyond which we give up. */ static struct etr_buf * @@ -1378,36 +1376,26 @@ alloc_etr_buf(struct tmc_drvdata *drvdata, struct p= erf_event *event, { int node; struct etr_buf *etr_buf; - unsigned long size; + ssize_t size; =20 node =3D (event->cpu =3D=3D -1) ? NUMA_NO_NODE : cpu_to_node(event->cpu); - /* - * Try to match the perf ring buffer size if it is larger - * than the size requested via sysfs. - */ - if ((nr_pages << PAGE_SHIFT) > drvdata->size) { - etr_buf =3D tmc_alloc_etr_buf(drvdata, ((ssize_t)nr_pages << PAGE_SHIFT), - 0, node, NULL); - if (!IS_ERR(etr_buf)) - goto done; - } + + /* Use the minimum limit if the required size is smaller */ + size =3D nr_pages << PAGE_SHIFT; + size =3D max_t(ssize_t, size, TMC_ETR_PERF_MIN_BUF_SIZE); =20 /* - * Else switch to configured size for this ETR - * and scale down until we hit the minimum limit. + * Try to allocate the required size for this ETR, if failed scale + * down until we hit the minimum limit. */ - size =3D drvdata->size; do { etr_buf =3D tmc_alloc_etr_buf(drvdata, size, 0, node, NULL); if (!IS_ERR(etr_buf)) - goto done; + return etr_buf; size /=3D 2; } while (size >=3D TMC_ETR_PERF_MIN_BUF_SIZE); =20 return ERR_PTR(-ENOMEM); - -done: - return etr_buf; } =20 static struct etr_buf * --=20 2.33.0