From nobody Sun Feb 8 05:27:02 2026 Received: from smtpbguseast3.qq.com (smtpbguseast3.qq.com [54.243.244.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A5CC43242BC; Wed, 21 Jan 2026 01:55:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=54.243.244.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768960529; cv=none; b=QndA1bOKHGBCXX8ZJNp2Xrf63heSIXrmqCJp3S7oYsS8WjGMorWiM4j0NGaoIq+1WQ+1ONXc6HzUPY60f0sYatVC33HT8BFM+CruTcflSB3tFwkkORKFPHMDgd6CVHTuz+yxHQhMg7kCBJvss7E9fYJsnmNsYxNFPtBHpW6QKZY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768960529; c=relaxed/simple; bh=ZEPov3OEOAIEIcKtxW2lTI7QTtdBS2XqusdZu0XK46c=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; b=LU1nV8hlIfNEHeWG8Bvmy1TmONQhSnn/o5QjXefk7PpRNjiYCNqHTItcOWEceyFYfxbMKVWNDc7WBa34Yg1H6uCO3CQesn3bNGxPeqI9zO+dXXj01E4iSkLnVG2s+Y6mmqEdSryQaCWkN1b5Plq9PIAls+8FihRMCGlsikoFWXc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=airkyi.com; spf=pass smtp.mailfrom=airkyi.com; dkim=pass (1024-bit key) header.d=airkyi.com header.i=@airkyi.com header.b=Xv8TvlqT; arc=none smtp.client-ip=54.243.244.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=airkyi.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=airkyi.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=airkyi.com header.i=@airkyi.com header.b="Xv8TvlqT" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=airkyi.com; s=altu2504; t=1768960464; bh=1acwQoDB0/iKDYuarRHbubrmVQsJdfIW/ps/W9sn/ws=; h=From:To:Subject:Date:Message-Id; b=Xv8TvlqTmKT1xwPVn6sVImJu6pcFsFqk7N0CCg5MGsgmca8sTK9F4hAKt9zslPoaX SEhxH7Co5zshBjTruMl8Rc9Pe77+bqASDn/wJBaxmnnfWoRQ2/4/7IjPoI2ksbYyuu 0FfQNAP5Anm6j5ozhQx8ZrfWQS7K/6t1/S6J1OzA= X-QQ-mid: zesmtpsz3t1768960458tb00cfd3e X-QQ-Originating-IP: ZWyngSw9Apt1FryXsk4QBHqdle44z411/AJqY+ObtDk= Received: from DESKTOP-8BT1A2O.localdomain ( [58.22.7.114]) by bizesmtp.qq.com (ESMTP) with id ; Wed, 21 Jan 2026 09:54:11 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 9640442501041716911 EX-QQ-RecipientCnt: 21 From: Chaoyi Chen To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Quentin Schulz , Jonas Karlman , Chaoyi Chen , Hsun Lai , John Clark , Jimmy Hon , Dragan Simic , Michael Riesch , Peter Robinson , Alexey Charkov , Shawn Lin , Sebastian Reichel , Andy Yan Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 2/2] arm64: dts: rockchip: Add rk3576 evb2 board Date: Wed, 21 Jan 2026 09:53:57 +0800 Message-Id: <20260121015357.291-3-kernel@airkyi.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20260121015357.291-1-kernel@airkyi.com> References: <20260121015357.291-1-kernel@airkyi.com> X-QQ-SENDSIZE: 520 Feedback-ID: zesmtpsz:airkyi.com:qybglogicsvrgz:qybglogicsvrgz6b-0 X-QQ-XMAILINFO: MsL7hwqo9bYs1d2kbuyKLYb13oRG6o52ZUmd4w8ZDJaylCA9f7nVra9O 67IQul5l/oG59T/maMLMXtIRslr50jFSbOSTNMPQalcKlap9VdSgOD6ht1//ra3rxNfjMxW yKcF6cs/csBlaHnv3lwGV0NhiYfqlGFzTM/ow7PARBygfwLiuAHuZuTTSQywUPjoJIE1vLl s5dZReN+bSUJmTAcbbj/PJqfkPnk/NNo0G72fg5S9rytMEjsyR2QnT1byc12bnRBi8+YuAn G7C0fhS1OpxLkfbvTf4fEtgNsRwz1GU4PkM0FaAtNHa3cAS26evHtqBVFBca+Cfsx79uMuO hsFmlMFBzaRWqb1eThxTVpbuDvAQJ6C57xJ4Hf//rKbAksT9YrLlDMOkJ6LyIYZHDqshFuF e680iHrNvzAQXLYU1DKscz059T2EANet3In4/vOPnCa1a6HigcgMs5nxgSNgDSv7UF12mkc M2Fe5q5J5SPUC9p3lmda08jgg8zi/rgJXh15YSwDmx5OQ1nardmTcRQcrWYiy5qmQP459GZ k+bLncr0puxdlE1Jh/a8DpZT54TGTuwLenHm3SrpR8L3vlXuO7hC6UAhmZt+gVWJseiR6g3 OjnWYu5v0oWdA5HAXy3yvqUnjWzL4QuFtZWwBGoba6FxtxB3N4ENBG98WDvlKfP0fDTCDK9 qaY3aVhEIVouCPua0jpjQt8EhdrWOGWw+Iravn2qJfSvlcl1nFwkpIf5gnsXgU4vDNENZrI dRhGqC7pqNDFrFJ9vCB0HydJwmaxzXoEYrIydOHAu1dqDP5uT7Rzxp3XjBa/7c42yNjAZkr JIztlZ6z4ya78xeZ7Juu+dI1zq+Yt+2PVASsw/ifYnuxqEahQ0oRDMgWEpfomVVcyin9qyh jdhr/xdhYKNS03wvHKU7M8QAm3ewY5tJdq3jsHaD1q+ZQ7OM7CMq5R+tWD0VwLDiViGByQn mdTs2aQXhkLWE33wEyUHLRjU/47TOt/BLyCWcOr90NGakLCEQek6pMl5ph3Xr8/DuWR0nez X2NGEv21lAr0iH7HLplmg6VfIkq3g= X-QQ-XMRINFO: NI4Ajvh11aEjEMj13RCX7UuhPEoou2bs1g== X-QQ-RECHKSPAM: 0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Chaoyi Chen General features for rk3576 evb2 board: - Rockchip RK3576 - LPDDR4/4X - eMMC5.1 - RK806-2x2pcs + DiscretePower - 1x HDMI2.1 TX / HDMI2.0 RX - 1x full size DP1.4 TX (Only 2 Lanes) - 2x 10/100/1000M Ethernet - 5x SATA3.0 7Pin Slot - 2x USB3.2 Gen1 Host - 3x USB2.0 Host - WIFI/BT - ... Tested with eMMC/SDMMC/HDMI/USB/Ethernet/WIFI/BT module. Signed-off-by: Chaoyi Chen Reviewed-by: Alexey Charkov --- Changes in v4: - Fix supply and reset for usb hub. - Add cd-gpios for sdmmc. Changes in v3: - Add alias for mmc. - Rename some usb vbus regulator. - Add DP regulator. - Change gmac phy-mode to rgmii-id. - Add target-supply for sata. - Change vcc-supply for ufshc. - Add usb hub. - ... Changes in v2: - Enable hdmi_sound and sai6. - Add more cpu-supply. - Use regulator to control sata power. - Remove "cap-mmc-highspeed" prop in sdmmc. - Add regulator supply for ufshc. - Add the missing vcc3v3_hubreset regulator. - Add otg capability for usb_drd0_dwc3. --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk3576-evb2-v10.dts | 1004 +++++++++++++++++ 2 files changed, 1005 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3576-evb2-v10.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/ro= ckchip/Makefile index c7617e06e1c1..cff95657d406 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -153,6 +153,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3568-wolfvision-pf5-= io-expander.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-armsom-sige5.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-armsom-sige5-v1.2-wifibt.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-evb1-v10.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-evb2-v10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-luckfox-omni3576.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-nanopi-m5.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-roc-pc.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3576-evb2-v10.dts b/arch/arm64/= boot/dts/rockchip/rk3576-evb2-v10.dts new file mode 100644 index 000000000000..078298717850 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3576-evb2-v10.dts @@ -0,0 +1,1004 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2026 Rockchip Electronics Co., Ltd. + * + */ + +/dts-v1/; + +#include +#include +#include +#include +#include "rk3576.dtsi" + +/ { + model =3D "Rockchip RK3576 EVB2 V10 Board"; + compatible =3D "rockchip,rk3576-evb2-v10", "rockchip,rk3576"; + + aliases { + ethernet0 =3D &gmac0; + ethernet1 =3D &gmac1; + mmc0 =3D &sdhci; + mmc1 =3D &sdmmc; + }; + + chosen { + stdout-path =3D "serial0:1500000n8"; + }; + + hdmi-con { + compatible =3D "hdmi-connector"; + type =3D "a"; + + port { + hdmi_con_in: endpoint { + remote-endpoint =3D <&hdmi_out_con>; + }; + }; + }; + + keys { + compatible =3D "adc-keys"; + io-channels =3D <&saradc 1>; + io-channel-names =3D "buttons"; + keyup-threshold-microvolt =3D <1800000>; + poll-interval =3D <100>; + + button-back { + label =3D "back"; + linux,code =3D ; + press-threshold-microvolt =3D <1235000>; + }; + + button-menu { + label =3D "menu"; + linux,code =3D ; + press-threshold-microvolt =3D <890000>; + }; + + button-vol-down { + label =3D "volume down"; + linux,code =3D ; + press-threshold-microvolt =3D <417000>; + }; + + button-vol-up { + label =3D "volume up"; + linux,code =3D ; + press-threshold-microvolt =3D <17000>; + }; + }; + + leds { + compatible =3D "gpio-leds"; + + work_led: led-0 { + gpios =3D <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>; + linux,default-trigger =3D "heartbeat"; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible =3D "mmc-pwrseq-simple"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&wifi_pwren>; + + /* + * On the module itself this is one of these (depending + * on the actual card populated): + * - SDIO_RESET_L_WL_REG_ON + * - PDN (power down when low) + */ + post-power-on-delay-ms =3D <200>; + reset-gpios =3D <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>; + }; + + vbus5v0_usb0: regulator-vbus5v0-usb0 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc5v0_usb3_host0"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + enable-active-high; + gpio =3D <&gpio0 RK_PD1 GPIO_ACTIVE_HIGH>; + vin-supply =3D <&vcc5v0_device>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usb_otg0_pwren>; + }; + + vbus5v0_usb1: regulator-vcc5v0-usb1 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc5v0_usb3_host1"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + enable-active-high; + gpio =3D <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>; + vin-supply =3D <&vcc5v0_device>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usb_host_pwren>; + }; + + vcc12v_dcin: regulator-vcc12v-dcin { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc12v_dcin"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <12000000>; + regulator-max-microvolt =3D <12000000>; + }; + + vcc1v2_ufs_vccq_s0: regulator-vcc1v2-ufs-vccq-s0 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc1v2_ufs_vccq_s0"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + vin-supply =3D <&vcc_sys>; + }; + + vcc1v8_ufs_vccq2_s0: regulator-vcc1v8-ufs-vccq2-s0 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc1v8_ufs_vccq2_s0"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + vin-supply =3D <&vcc_1v8_s3>; + }; + + vcc3v3_dp_port: regulator-vcc3v3-dp-port { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc3v3_dp_port"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + enable-active-high; + gpios =3D <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>; + vin-supply =3D <&vcc_3v3_s3>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&image_pwren>; + }; + + vcc3v3_pcie1: regulator-vcc3v3-pcie1 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc3v3_pcie1"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + enable-active-high; + gpios =3D <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; + startup-delay-us =3D <5000>; + vin-supply =3D <&vcc12v_dcin>; + }; + + vcc3v3_rtc_s5: regulator-vcc3v3-rtc-s5 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc3v3_rtc_s5"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&vcc_sys>; + }; + + vcc3v3_sata_pwren: vcc3v3-sata-pwren { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc3v3_satapm"; + enable-active-high; + gpio =3D <&gpio4 RK_PC7 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&satapm_pwren>; + }; + + vcc5v0_device: regulator-vcc5v0-device { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc5v0_device"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc12v_dcin>; + }; + + vcc_sys: regulator-vcc5v0-sys { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc12v_dcin>; + }; + + vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_1v1_nldo_s3"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt =3D <1100000>; + regulator-max-microvolt =3D <1100000>; + vin-supply =3D <&vcc_sys>; + }; + + vcc_1v8_s0: regulator-vcc-1v8-s0 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_1v8_s0"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + vin-supply =3D <&vcc_1v8_s3>; + }; + + vcc_2v0_pldo_s3: regulator-vcc-2v0-pldo-s3 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_2v0_pldo_s3"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt =3D <2000000>; + regulator-max-microvolt =3D <2000000>; + vin-supply =3D <&vcc_sys>; + }; + + vcc_3v3_s0: regulator-vcc-3v3-s0 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_3v3_s0"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&vcc_3v3_s3>; + }; + + vcc_ufs_s0: regulator-vcc-ufs-s0 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_ufs_s0"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&vcc_sys>; + }; +}; + +&cpu_l0 { + cpu-supply =3D <&vdd_cpu_lit_s0>; +}; + +&cpu_l1 { + cpu-supply =3D <&vdd_cpu_lit_s0>; +}; + +&cpu_l2 { + cpu-supply =3D <&vdd_cpu_lit_s0>; +}; + +&cpu_l3 { + cpu-supply =3D <&vdd_cpu_lit_s0>; +}; + +&cpu_b0 { + cpu-supply =3D <&vdd_cpu_big_s0>; +}; + +&cpu_b1 { + cpu-supply =3D <&vdd_cpu_big_s0>; +}; + +&cpu_b2 { + cpu-supply =3D <&vdd_cpu_big_s0>; +}; + +&cpu_b3 { + cpu-supply =3D <&vdd_cpu_big_s0>; +}; + +&combphy0_ps { + status =3D "okay"; +}; + +&combphy1_psu { + status =3D "okay"; +}; + +&gmac0 { + clock_in_out =3D "output"; + phy-mode =3D "rgmii-id"; + phy-handle =3D <&rgmii_phy0>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <ð0m1_miim + ð0m1_tx_bus2 + ð0m1_rx_bus2 + ð0m1_rgmii_clk + ð0m1_rgmii_bus>; + status =3D "okay"; +}; + +&gmac1 { + clock_in_out =3D "output"; + phy-handle =3D <&rgmii_phy1>; + phy-mode =3D "rgmii-id"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <ð1m0_miim + ð1m0_tx_bus2 + ð1m0_rx_bus2 + ð1m0_rgmii_clk + ð1m0_rgmii_bus>; + status =3D "okay"; +}; + +&gpu { + mali-supply =3D <&vdd_gpu_s0>; + status =3D "okay"; +}; + +&hdmi { + status =3D "okay"; +}; + +&hdmi_in { + hdmi_in_vp0: endpoint { + remote-endpoint =3D <&vp0_out_hdmi>; + }; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint =3D <&hdmi_con_in>; + }; +}; + +&hdmi_sound { + status =3D "okay"; +}; + +&hdptxphy { + status =3D "okay"; +}; + +&i2c1 { + status =3D "okay"; + + rk806: pmic@23 { + compatible =3D "rockchip,rk806"; + reg =3D <0x23>; + interrupt-parent =3D <&gpio0>; + interrupts =3D <6 IRQ_TYPE_LEVEL_LOW>; + gpio-controller; + #gpio-cells =3D <2>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pmic_pins>, <&rk806_dvs1_null>, + <&rk806_dvs2_null>, <&rk806_dvs3_null>; + system-power-controller; + + vcc1-supply =3D <&vcc_sys>; + vcc2-supply =3D <&vcc_sys>; + vcc3-supply =3D <&vcc_sys>; + vcc4-supply =3D <&vcc_sys>; + vcc5-supply =3D <&vcc_sys>; + vcc6-supply =3D <&vcc_sys>; + vcc7-supply =3D <&vcc_sys>; + vcc8-supply =3D <&vcc_sys>; + vcc9-supply =3D <&vcc_sys>; + vcc10-supply =3D <&vcc_sys>; + vcc11-supply =3D <&vcc_2v0_pldo_s3>; + vcc12-supply =3D <&vcc_sys>; + vcc13-supply =3D <&vcc_1v1_nldo_s3>; + vcc14-supply =3D <&vcc_1v1_nldo_s3>; + vcca-supply =3D <&vcc_sys>; + + rk806_dvs1_null: dvs1-null-pins { + pins =3D "gpio_pwrctrl1"; + function =3D "pin_fun0"; + }; + + rk806_dvs2_null: dvs2-null-pins { + pins =3D "gpio_pwrctrl2"; + function =3D "pin_fun0"; + }; + + rk806_dvs3_null: dvs3-null-pins { + pins =3D "gpio_pwrctrl3"; + function =3D "pin_fun0"; + }; + + rk806_dvs1_slp: dvs1-slp-pins { + pins =3D "gpio_pwrctrl1"; + function =3D "pin_fun1"; + }; + + rk806_dvs1_pwrdn: dvs1-pwrdn-pins { + pins =3D "gpio_pwrctrl1"; + function =3D "pin_fun2"; + }; + + rk806_dvs1_rst: dvs1-rst-pins { + pins =3D "gpio_pwrctrl1"; + function =3D "pin_fun3"; + }; + + rk806_dvs2_slp: dvs2-slp-pins { + pins =3D "gpio_pwrctrl2"; + function =3D "pin_fun1"; + }; + + rk806_dvs2_pwrdn: dvs2-pwrdn-pins { + pins =3D "gpio_pwrctrl2"; + function =3D "pin_fun2"; + }; + + rk806_dvs2_rst: dvs2-rst-pins { + pins =3D "gpio_pwrctrl2"; + function =3D "pin_fun3"; + }; + + rk806_dvs2_dvs: dvs2-dvs-pins { + pins =3D "gpio_pwrctrl2"; + function =3D "pin_fun4"; + }; + + rk806_dvs2_gpio: dvs2-gpio-pins { + pins =3D "gpio_pwrctrl2"; + function =3D "pin_fun5"; + }; + + rk806_dvs3_slp: dvs3-slp-pins { + pins =3D "gpio_pwrctrl3"; + function =3D "pin_fun1"; + }; + + rk806_dvs3_pwrdn: dvs3-pwrdn-pins { + pins =3D "gpio_pwrctrl3"; + function =3D "pin_fun2"; + }; + + rk806_dvs3_rst: dvs3-rst-pins { + pins =3D "gpio_pwrctrl3"; + function =3D "pin_fun3"; + }; + + rk806_dvs3_dvs: dvs3-dvs-pins { + pins =3D "gpio_pwrctrl3"; + function =3D "pin_fun4"; + }; + + rk806_dvs3_gpio: dvs3-gpio-pins { + pins =3D "gpio_pwrctrl3"; + function =3D "pin_fun5"; + }; + + regulators { + vdd_cpu_big_s0: dcdc-reg1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <550000>; + regulator-max-microvolt =3D <950000>; + regulator-ramp-delay =3D <12500>; + regulator-name =3D "vdd_cpu_big_s0"; + regulator-enable-ramp-delay =3D <400>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_npu_s0: dcdc-reg2 { + regulator-boot-on; + regulator-min-microvolt =3D <550000>; + regulator-max-microvolt =3D <950000>; + regulator-ramp-delay =3D <12500>; + regulator-name =3D "vdd_npu_s0"; + regulator-enable-ramp-delay =3D <400>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_lit_s0: dcdc-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <550000>; + regulator-max-microvolt =3D <950000>; + regulator-ramp-delay =3D <12500>; + regulator-name =3D "vdd_cpu_lit_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt =3D <750000>; + }; + }; + + vcc_3v3_s3: dcdc-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-name =3D "vcc_3v3_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <3300000>; + }; + }; + + vdd_gpu_s0: dcdc-reg5 { + regulator-boot-on; + regulator-min-microvolt =3D <550000>; + regulator-max-microvolt =3D <900000>; + regulator-ramp-delay =3D <12500>; + regulator-name =3D "vdd_gpu_s0"; + regulator-enable-ramp-delay =3D <400>; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt =3D <850000>; + }; + }; + + vddq_ddr_s0: dcdc-reg6 { + regulator-always-on; + regulator-boot-on; + regulator-name =3D "vddq_ddr_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_logic_s0: dcdc-reg7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <550000>; + regulator-max-microvolt =3D <800000>; + regulator-name =3D "vdd_logic_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8_s3: dcdc-reg8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-name =3D "vcc_1v8_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <1800000>; + }; + }; + + vdd2_ddr_s3: dcdc-reg9 { + regulator-always-on; + regulator-boot-on; + regulator-name =3D "vdd2_ddr_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vdd_ddr_s0: dcdc-reg10 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <550000>; + regulator-max-microvolt =3D <1200000>; + regulator-name =3D "vdd_ddr_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca_1v8_s0: pldo-reg1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-name =3D "vcca_1v8_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pldo2_s0: pldo-reg2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-name =3D "vcca1v8_pldo2_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_1v2_s0: pldo-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + regulator-name =3D "vdda_1v2_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca_3v3_s0: pldo-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-name =3D "vcca_3v3_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd_s0: pldo-reg5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3300000>; + regulator-name =3D "vccio_sd_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pldo6_s3: pldo-reg6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-name =3D "vcca1v8_pldo6_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <1800000>; + }; + }; + + vdd_0v75_s3: nldo-reg1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <550000>; + regulator-max-microvolt =3D <750000>; + regulator-name =3D "vdd_0v75_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <750000>; + }; + }; + + vdda_ddr_pll_s0: nldo-reg2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <850000>; + regulator-max-microvolt =3D <850000>; + regulator-name =3D "vdda_ddr_pll_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v75_hdmi_s0: nldo-reg3 { + regulator-boot-on; + regulator-min-microvolt =3D <837500>; + regulator-max-microvolt =3D <837500>; + regulator-name =3D "vdda0v75_hdmi_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v85_s0: nldo-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <850000>; + regulator-max-microvolt =3D <850000>; + regulator-name =3D "vdda_0v85_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v75_s0: nldo-reg5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <750000>; + regulator-max-microvolt =3D <750000>; + regulator-name =3D "vdda_0v75_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; +}; + +&i2c2 { + status =3D "okay"; + + hym8563: rtc@51 { + compatible =3D "haoyu,hym8563"; + reg =3D <0x51>; + clock-output-names =3D "hym8563"; + interrupt-parent =3D <&gpio0>; + interrupts =3D ; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&rtc_int>; + wakeup-source; + #clock-cells =3D <0>; + }; +}; + +&mdio0 { + rgmii_phy0: ethernet-phy@1 { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <0x1>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&rgmii_phy0_rst>; + reset-assert-us =3D <20000>; + reset-deassert-us =3D <100000>; + reset-gpios =3D <&gpio3 RK_PD3 GPIO_ACTIVE_LOW>; + tx-internal-delay-ps =3D <1900>; + }; +}; + +&mdio1 { + rgmii_phy1: ethernet-phy@1 { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <0x1>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&rgmii_phy1_rst>; + reset-assert-us =3D <20000>; + reset-deassert-us =3D <100000>; + reset-gpios =3D <&gpio3 RK_PD6 GPIO_ACTIVE_LOW>; + tx-internal-delay-ps =3D <1900>; + }; +}; + +&pinctrl { + bluetooth { + bt_reg_on: bt-reg-on { + rockchip,pins =3D <1 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + bt_wake_host: bt-wake-host { + rockchip,pins =3D <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_down>; + }; + + host_wake_bt: host-wake-bt { + rockchip,pins =3D <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + dp { + image_pwren: image-pwren { + rockchip,pins =3D <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + hym8563 { + rtc_int: rtc-int { + rockchip,pins =3D <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + network { + rgmii_phy0_rst: rgmii-phy0-rst { + rockchip,pins =3D <3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + rgmii_phy1_rst: rgmii-phy1-rst { + rockchip,pins =3D <3 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pcie1 { + pcie1_rst: pcie1-rst { + rockchip,pins =3D <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + sata { + satapm_pwren: satapm-pwren { + rockchip,pins =3D <4 RK_PC7 RK_FUNC_GPIO &pcfg_output_high>; + }; + }; + + usb { + usb_host_pwren: usb-host-pwren { + rockchip,pins =3D <0 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + usb_hub_reset: usb-hub-reset { + rockchip,pins =3D <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + usb_otg0_pwren: usb-otg0-pwren { + rockchip,pins =3D <0 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + wifi { + wifi_host_wake: wifi-host-wake { + rockchip,pins =3D <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>; + }; + + wifi_pwren: wifi-pwren { + rockchip,pins =3D <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; +}; + +&sai6 { + status =3D "okay"; +}; + +&saradc { + vref-supply =3D <&vcca_1v8_s0>; + status =3D "okay"; +}; + +&sata0 { + target-supply =3D <&vcc3v3_sata_pwren>; + status =3D "okay"; +}; + +&sdio { + #address-cells =3D <1>; + #size-cells =3D <0>; + bus-width =3D <4>; + cap-sd-highspeed; + cap-sdio-irq; + disable-wp; + keep-power-in-suspend; + max-frequency =3D <150000000>; + mmc-pwrseq =3D <&sdio_pwrseq>; + no-sd; + no-mmc; + non-removable; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&sdmmc1m0_bus4 &sdmmc1m0_clk &sdmmc1m0_cmd>; + sd-uhs-sdr104; + status =3D "okay"; + + brcmf: wifi@1 { + compatible =3D "brcm,bcm4329-fmac"; + reg =3D <1>; + interrupt-parent =3D <&gpio0>; + interrupts =3D ; + interrupt-names =3D "host-wake"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&wifi_host_wake>; + }; +}; + +&sdhci { + bus-width =3D <8>; + full-pwr-cycle-in-suspend; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + no-sdio; + no-sd; + non-removable; + status =3D "okay"; +}; + +&sdmmc { + bus-width =3D <4>; + cap-sd-highspeed; + cd-gpios =3D <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; + disable-wp; + no-sdio; + no-mmc; + sd-uhs-sdr104; + vqmmc-supply =3D <&vccio_sd_s0>; + status =3D "okay"; +}; + +&u2phy0 { + status =3D "okay"; +}; + +&u2phy0_otg { + phy-supply =3D <&vbus5v0_usb0>; + status =3D "okay"; +}; + +&u2phy1 { + status =3D "okay"; +}; + +&u2phy1_otg { + phy-supply =3D <&vbus5v0_usb1>; + status =3D "okay"; +}; + +&uart0 { + status =3D "okay"; +}; + +&uart4 { + pinctrl-0 =3D <&uart4m1_xfer &uart4m1_ctsn &uart4m1_rtsn>; + pinctrl-names =3D "default"; + uart-has-rtscts; + status =3D "okay"; + + bluetooth { + compatible =3D "brcm,bcm43438-bt"; + clocks =3D <&hym8563>; + clock-names =3D "lpo"; + device-wakeup-gpios =3D <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>; + interrupt-parent =3D <&gpio0>; + interrupts =3D ; + pinctrl-0 =3D <&bt_reg_on &bt_wake_host &host_wake_bt>; + pinctrl-names =3D "default"; + shutdown-gpios =3D <&gpio1 RK_PC7 GPIO_ACTIVE_HIGH>; + vbat-supply =3D <&vcc_3v3_s3>; + vddio-supply =3D <&vcc_1v8_s3>; + }; +}; + +&ufshc { + vcc-supply =3D <&vcc_ufs_s0>; + vccq-supply =3D <&vcc1v2_ufs_vccq_s0>; + vccq2-supply =3D <&vcc1v8_ufs_vccq2_s0>; + status =3D "okay"; +}; + +&usbdp_phy { + rockchip,dp-lane-mux =3D <2 3>; + status =3D "okay"; +}; + +&usb_drd0_dwc3 { + dr_mode =3D "otg"; + extcon =3D <&u2phy0>; + status =3D "okay"; +}; + +&usb_drd1_dwc3 { + dr_mode =3D "host"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usb_hub_reset>; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "okay"; + + hub_2_0: hub@1 { + compatible =3D "usb1a86,8091"; + reg =3D <1>; + reset-gpio =3D <&gpio0 RK_PC5 GPIO_ACTIVE_LOW>; + v5-supply =3D <&vcc_3v3_s0>; + vdd33-supply =3D <&vcc_3v3_s0>; + }; +}; + +&vop { + status =3D "okay"; +}; + +&vop_mmu { + status =3D "okay"; +}; + +&vp0 { + vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { + reg =3D ; + remote-endpoint =3D <&hdmi_in_vp0>; + }; +}; -- 2.51.1