From nobody Tue Feb 10 23:55:25 2026 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 79F154D8D84; Wed, 21 Jan 2026 17:05:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.171.202.116 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769015130; cv=none; b=f1cU8HrZP9kZpTQ5UtjgSlRCzeHtc+IX+3dPtKIdpi0h6ZZNagraHu+Q1qG8tMXSZwDTs+Z417b6dQvz2a0oE8mjTdmr3x3u9/GOQhAR7RQF1Df64lmIIttTeViEr/hw7gCUIYjXBccokM0hug1A/FoO9MDl+HM4fMuG7EitRis= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769015130; c=relaxed/simple; bh=559NB4IOTgnH1uJ0ZdWt70Ud/UBZ6oL2OyETCCjV31k=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=pIC2d75WNw8CDYKvOTRHlsLlmjBW24T+0t4iat5G5TTPmX1CihLG3YzZosRgSzkac4rcx+l5IPmJrUeNAOEzBJQ6Oq4hFUJgpjTAhiZTWXm6bZeXvCU6rOmpTb+9DbcX/LkhirQtJlIGgdmRg/WKmDYBlJgDqBoAHoZZOvUdJF8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=g9yrjLCZ; arc=none smtp.client-ip=185.171.202.116 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="g9yrjLCZ" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-04.galae.net (Postfix) with ESMTPS id E40F2C21A8F; Wed, 21 Jan 2026 17:04:59 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 2557D6070A; Wed, 21 Jan 2026 17:05:27 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 7A0FB119B17F5; Wed, 21 Jan 2026 18:05:24 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1769015126; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=viq42YFuPmM9zMZsx8Z+unGAElfNEyain450dehUnTs=; b=g9yrjLCZaMcpYTgmSyN+a4pE8PPKLlqxvxpIcvpUL5iACBLZvATo3Er5ZbKeQOPej4Ho7W Yo2+eYU8z81QbYhcuGnjd7Oj4Hd4eKqreBlHBk7X/lSeCEgVTcN1f71Z++rIHYX3r2zKda X0rFc9gNeAfVpIN3nNu8EbnyiCopTmKo/kWXwRaUjSimrHKlQsVplNniglSZjXrSKHdrlB 4IEm/gLxr87hGzdz4CGrdfja3QDADslRWHriUslO2/e3KgBgqfJhY9NfdD7gLlURBEwTjV pFMXUsY+IhP9swCRVzymTlL0OU5WuZdBDHimFzDszVK+LyN04BOu/gtdYX1RcA== From: "Miquel Raynal (Schneider Electric)" Date: Wed, 21 Jan 2026 18:05:04 +0100 Subject: [PATCH v3 08/17] spi: cadence-qspi: Remove an useless operation Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260121-schneider-6-19-rc1-qspi-v3-8-43e70fab4444@bootlin.com> References: <20260121-schneider-6-19-rc1-qspi-v3-0-43e70fab4444@bootlin.com> In-Reply-To: <20260121-schneider-6-19-rc1-qspi-v3-0-43e70fab4444@bootlin.com> To: Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Vaishnav Achath Cc: Thomas Petazzoni , =?utf-8?q?Herv=C3=A9_Codina?= , Wolfram Sang , Vignesh Raghavendra , Santhosh Kumar K , Pratyush Yadav , Pascal Eberhard , linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, "Miquel Raynal (Schneider Electric)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Right above writing the register value back based on 'div' value, there is the following check: if (div > CQSPI_REG_CONFIG_BAUD_MASK) div =3D CQSPI_REG_CONFIG_BAUD_MASK; which means div does not need to be AND'ed against the bitfield mask. Remove this redundant operation. Reviewed-by: Pratyush Yadav Tested-by: Wolfram Sang Signed-off-by: Miquel Raynal (Schneider Electric) --- drivers/spi/spi-cadence-quadspi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-qu= adspi.c index 8eb80b4b76eb..06f6c5979229 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -1258,7 +1258,7 @@ static void cqspi_config_baudrate_div(struct cqspi_st= *cqspi) =20 reg =3D readl(reg_base + CQSPI_REG_CONFIG); reg &=3D ~(CQSPI_REG_CONFIG_BAUD_MASK << CQSPI_REG_CONFIG_BAUD_LSB); - reg |=3D (div & CQSPI_REG_CONFIG_BAUD_MASK) << CQSPI_REG_CONFIG_BAUD_LSB; + reg |=3D div << CQSPI_REG_CONFIG_BAUD_LSB; writel(reg, reg_base + CQSPI_REG_CONFIG); } =20 --=20 2.51.1