From nobody Tue Feb 10 12:58:58 2026 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 74366495532; Wed, 21 Jan 2026 17:05:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.171.202.116 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769015124; cv=none; b=Ao2TGOJNlWuFg0luSUChFj996lzkbZACV4DZnCwkesJtnmL5JKeLvp8bHHbhsT0eYn7UQTpVUyB2JtpPcYWknK9Uh8eUJRU3jxXxaqqh1jVUtJTHX9eDaydFbH7mbRio4imnXcHOodYvCUpteLAhqnRnuIk4sHw6EPsDWgJAKKA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1769015124; c=relaxed/simple; bh=hVZFluRZ9aIsCPx5D6aaUpTyU1txgrMGDGVXFg02iu0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=G8H8PjCenKzWae8/6KNysHN4yQB6BtNg3f9EK0jjdkDEaYO4ExGIBBWdblc3l8GcHlCB+EbN+PR4XNuEad7d+x+n/v+aXwXuOl36FIHfuHnJa6bOsJlDbSrg4pf0c5AgMfTDIUANdMW3BfPpMVXWfrhgXWPmGv+bBzbsCuXm1g4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=Ga9FdecA; arc=none smtp.client-ip=185.171.202.116 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="Ga9FdecA" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-04.galae.net (Postfix) with ESMTPS id ED010C21A91; Wed, 21 Jan 2026 17:04:53 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 2E18F6070A; Wed, 21 Jan 2026 17:05:21 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 0A5B5119B1884; Wed, 21 Jan 2026 18:05:18 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1769015120; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=kXE2QNu4DkvbYU2g9MAcoHt1LXhYlHoQoJg0JPWeVww=; b=Ga9FdecAVBHW+GeYwqf1pCkSClSEKmjJZTbx1W7zvFowvjPhksbHuzNt32V6zY61x6zoU9 qijwTsRFx0upS/1dAtz6seQRox0bx4uh1xnp0Oqb0UNGjWqbJAc4QQAZYUikDlZXefW0OU VtbCr6mw13KcaYGWMPcdSXN28dKS1MBVYHVoBrlWZI/Vsk4nfduV9aHnrYyeqNxzZRRK/D zjP0PwHf7PUq3UjWs2heXTW3gJIKzRyk51u00vXNj5EPzS8kKqS9Pyjpvh1q7sKOjXziFY uKIf1lE2NEmDiA08z/QUuBqJPP0+EMJ/Z/UEFY5g9Mc/yxdjpauhCWqL0g7QLA== From: "Miquel Raynal (Schneider Electric)" Date: Wed, 21 Jan 2026 18:05:01 +0100 Subject: [PATCH v3 05/17] spi: cadence-qspi: Align definitions Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260121-schneider-6-19-rc1-qspi-v3-5-43e70fab4444@bootlin.com> References: <20260121-schneider-6-19-rc1-qspi-v3-0-43e70fab4444@bootlin.com> In-Reply-To: <20260121-schneider-6-19-rc1-qspi-v3-0-43e70fab4444@bootlin.com> To: Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Vaishnav Achath Cc: Thomas Petazzoni , =?utf-8?q?Herv=C3=A9_Codina?= , Wolfram Sang , Vignesh Raghavendra , Santhosh Kumar K , Pratyush Yadav , Pascal Eberhard , linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, "Miquel Raynal (Schneider Electric)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Fix alignment on the #defines. Reviewed-by: Pratyush Yadav Tested-by: Wolfram Sang Signed-off-by: Miquel Raynal (Schneider Electric) --- drivers/spi/spi-cadence-quadspi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-qu= adspi.c index b1cf182d6566..cc28da7fc686 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -40,7 +40,7 @@ static_assert(CQSPI_MAX_CHIPSELECT <=3D SPI_DEVICE_CS_CNT= _MAX); #define CQSPI_DISABLE_DAC_MODE BIT(1) #define CQSPI_SUPPORT_EXTERNAL_DMA BIT(2) #define CQSPI_NO_SUPPORT_WR_COMPLETION BIT(3) -#define CQSPI_SLOW_SRAM BIT(4) +#define CQSPI_SLOW_SRAM BIT(4) #define CQSPI_NEEDS_APB_AHB_HAZARD_WAR BIT(5) #define CQSPI_RD_NO_IRQ BIT(6) #define CQSPI_DMA_SET_MASK BIT(7) --=20 2.51.1