From nobody Mon Feb 9 16:45:16 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 26A81481221 for ; Wed, 21 Jan 2026 10:15:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768990555; cv=none; b=RwkGFXnv3Uh2xUI7OgefvSB4pnxXkHoEbSgo+tvUQXKV02Dyo3TLGsq0EmQEytFYKhOFN3WoWzotDuItEG+P4Hxmg98eMjv63/T0msMasUzhNk4TQgm0fY1Z9lDsaRI8t//bn7Q7VHFXUYv4DiID1Brr433T5DShkBwgws0Y1RU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768990555; c=relaxed/simple; bh=030jphXscriwHQLoSXlSrjsNzVEBqnZzXewHZtj1eL8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=fKAX7MbZJstcRSVZclZ7eN8UuiPNKOJrprmiE+uJ4ii4ZiXYW7qDHOkDyBVFoBqsD0gxdO+3ROjUt64C5NH+QNfh3O+w6Z+vgMbEgExgBaVG9+zTu22y1ABk5aFeYIEDcOI5bEWnXLlyLmq5oeW0KWf/5n/9NYdJtDJeVyme52I= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=OgLoGsDJ; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=RSbFJx6k; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="OgLoGsDJ"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="RSbFJx6k" Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 60L9ofWQ2840494 for ; Wed, 21 Jan 2026 10:15:51 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= 4vcfsLd7iQ6cPaiGJNN7blnxYZsf9LKmcSLtSOyoSjk=; b=OgLoGsDJBqXucNAA 2SgXa5MRxCXbB2r5pGEYabLOnGiKug/k3e3c1QSRMQGgcJgFZkj4YYy2BzPfF+aM EDgYGZI9dgKCSHuRPrPV9elXr1ae1nJmELHogeZUMIHaKYHBTaZR6EhzisryJH3u hfIwcV6sOZPfeZrS6TWH/6lnx/ZXWw2LY90wyfys7VQNPdV+fj95YHRJBs+hgZuF 9nB9Bfwpjxakcwlt3ey2GiOtoU+/kKbM8Hr4jGeikGn+dWNMgSlX5j8fzIeailGO 4/5bVFUnK5Pc9HbgweaLY8lGHXXjLWFTx8VbuizOVWmUO3st1leVZIWmwFslf6W6 yW3oGw== Received: from mail-qk1-f198.google.com (mail-qk1-f198.google.com [209.85.222.198]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4btqm1shfy-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Wed, 21 Jan 2026 10:15:51 +0000 (GMT) Received: by mail-qk1-f198.google.com with SMTP id af79cd13be357-8c52f89b415so376214485a.0 for ; Wed, 21 Jan 2026 02:15:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1768990550; x=1769595350; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=4vcfsLd7iQ6cPaiGJNN7blnxYZsf9LKmcSLtSOyoSjk=; b=RSbFJx6ksSvY0C3OSMk2wbRg7xs//8AE5FfnqHt+hkPOPrsDc+yF1zOIwKNCqf/vi9 +deX9F24voy6CfCAu7bhC5CMCY7/pHyFeeqFlhGYquOh5TBN96Ll0Q00kQI2WHkJXxnU fLc7wJOJ0OZu0OhB597//PNqHZ//TYSqy+Tgm8e4NfunLt03z4NPx9+lbQHMFlTlOuBU tIieJxmpugrFJ1wtg5xrSKaDVJwScO2zqkwLyLEwxGQQmD9qFDyFtWnF5tLNdhXCA46n 7xvPZFK+J6pf0ZflBrsfUSinLwrMhM1qAiD7r5/ZyJKPqgcSqHxOarO6LTBGRH0lKLSc BbCQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1768990550; x=1769595350; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=4vcfsLd7iQ6cPaiGJNN7blnxYZsf9LKmcSLtSOyoSjk=; b=bfKOhFsKyMOmqOHotGSpSooMUSSMan8zano9KF+KQu7g65TL7hh6x8LE+5C/0K2VlY dP5ZUCFZap5xua0wecvc3zCvQKnf58EScHqkFBRy22DI/7S/Tbme4BCFpf1RMxLn9PFN 8HLra+04tyYTCF8ssxQr9eKevcc9HKAzvx1ERxVEtNz5b7akRmB6EutGtr6LViCVwQTe LM6xEWcQlbIufY5N6yB27X6BUEyeskDfKMCxxF2c6156ldxjSKHQxhhlqJi/AML0Avzi DVjilUhY5j53CyPPvJb7KYE8hcUnBnzKkFTAMw2FPqN2ta9jCrO2TQVn9Q0EgsObbytb E72g== X-Forwarded-Encrypted: i=1; AJvYcCX/MUntBfEWzT8lQcMZnfTrsS7+ET8d4kbAYMlVmyNpXfSOEU5G6WKZLSFLcIGtoayo85Mz3lJQFbz5T1M=@vger.kernel.org X-Gm-Message-State: AOJu0Yy+RLcZBDcfjUXKJyO8ClT16OMHEEIetIvT/32LaJt/UPUxwvWd AzPEFWfozOSED5bsDmZoR1uZiCm4cixWbi5XGtUq/KAHk+FO3SRo1Rle6P6+cpM0p2mvEVnKy5y XKPP+82dHzB4KYnMfyJHbs9XR252Rk3hO30vI9rf+z2FkccmJRsDJYnYUFh+XPEy1WBo= X-Gm-Gg: AZuq6aIcy15+MD6ZQb2m4z9qNz0QXfC69vjqJv6rn/urYcCgtnOexC7ILIxfRm1Y/yu W+whkBQPmTywmY8A63uvE+EmeeeB56VPgFnX6gbt1g9fkRM7SqYOcS5w9eLeJ9m9OGZIjvyEJ2B 2PdQVFCx3qQPj3e6AbFa6jLdGpBfiRzZ/Egi5xZPpJjn5SJ4TGQcD0RA69Otr73I+nu2LQdTGO7 CaGsw5P1SzHE6bi3IwAxTNIIsd72BaW3QihjYfZYE5ei3swqLXWwDytMYBIfjuz1BnPIHURI444 YDjJ4hzThxOG5EvkKbPqB92n0rWG/mX3qfPgHoe9Eu7t4y/LMfOgeYXt1ymufyhAE208uH1Gnm8 sPxACj93wOWSixDNBnnAY8O41cXl8j1Cm7Aj/lMQc6c9Z88CN1x+JlpDmKd6INVMoOAjLlzsNWX MqeRNNHHp65qMNRs7GXnsMl2E= X-Received: by 2002:a05:620a:4709:b0:8b1:5f62:a5d5 with SMTP id af79cd13be357-8c6cce3b4e0mr597666885a.62.1768990550003; Wed, 21 Jan 2026 02:15:50 -0800 (PST) X-Received: by 2002:a05:620a:4709:b0:8b1:5f62:a5d5 with SMTP id af79cd13be357-8c6cce3b4e0mr597662985a.62.1768990549420; Wed, 21 Jan 2026 02:15:49 -0800 (PST) Received: from umbar.lan (2001-14ba-a073-af00-264b-feff-fe8b-be8a.rev.dnainternet.fi. [2001:14ba:a073:af00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-59baf397785sm4720733e87.51.2026.01.21.02.15.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Jan 2026 02:15:48 -0800 (PST) From: Dmitry Baryshkov Date: Wed, 21 Jan 2026 12:15:46 +0200 Subject: [PATCH v2 2/3] drm: bridge: anx7625: implement minimal Type-C support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260121-anx7625-typec-v2-2-d14f31256a17@oss.qualcomm.com> References: <20260121-anx7625-typec-v2-0-d14f31256a17@oss.qualcomm.com> In-Reply-To: <20260121-anx7625-typec-v2-0-d14f31256a17@oss.qualcomm.com> To: Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Xin Ji , Heikki Krogerus , Greg Kroah-Hartman Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-usb@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=10293; i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id; bh=030jphXscriwHQLoSXlSrjsNzVEBqnZzXewHZtj1eL8=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBpcKdRCnJSOhd06BkSPaadnxegpK2SsA4X9ebla xUOOgLTGMeJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCaXCnUQAKCRCLPIo+Aiko 1df/B/9GadOcj5rVesVEmUuaeq7OBGGnx3B4o4bnSgVAr7T0tZCtDH8AUvJEhtb7nhBsYY/1R5a Cw5uUmkNSg+Zsn45P+9gG7RCYoktkyHRuNPhUUG9bgx9znTgAm7mdO+5B9QfS+1SnPOafAXsFl+ 0YCjlEyuLIary/SyNLUUr1iPVFrjA83XOihPUZlgDSrfLr2rlLjBvbJzJP9w1Pwt21BPlzv2eIX oZ0leHPbtMsoq/yF1MdCL7MtaVrmWGAB+RKj5hjCM3xXIJswXxlW1MJLQVx3/2ec9+EKNHq0dOu liCFl/BISeYNs9gUdo0mB8JEaofQ3KyWyTBmkUd5pMVTEHL+ X-Developer-Key: i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTIxMDA4NiBTYWx0ZWRfX2GyVFJI7vVIE tA9L/RM+47EQ8DtVBaHezZWp173fWKzfR2p1pEXA1+ao2Ta1yAhPFToyOJU683KN8xFfWx6GZvk 3JdjW6JbzFfJpkbU9xLWzca1mnRYTh1NFkfw7yWrKB+3citKODf39m/tWWXC0iVI1AULeGeXIjH ifBs1zgXEbvwgIiDUCxC0iqRJn3X12o2Y3LLpxmUKFQvlKWTp3zAEzyBXhFvCIJbayGda70URMQ XqYaDQBRCJWL/8zVHFj+BWwfnUAGoE0EyMiP45/50DMlz9+ZLcN/Fsbsr4UxMHLEEt9W5j3ZLy3 gkuun+bF0dRyRD/cmsqzOTrG855CvqeNLePgKVm5m/DEL4MfbiigO8oIQdW9DU9SQoeSfPaBtPs C0Cr8aAFVBXiUyl3C9otx3sV3RoXXyAILh+jAm2ON2NDY7zkDjPXkledRwkx/II8megWQrnyQUk R5OmgNi+NKh8PaPs+0Q== X-Proofpoint-ORIG-GUID: 0P42SHj9EPUmd3tLudTFR0O70ov3l8dg X-Authority-Analysis: v=2.4 cv=dtnWylg4 c=1 sm=1 tr=0 ts=6970a757 cx=c_pps a=qKBjSQ1v91RyAK45QCPf5w==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=vUbySO9Y5rIA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=bbNUuHX0AAAA:8 a=QyXUC8HyAAAA:8 a=EUspDBNiAAAA:8 a=N6laaNus9HEbtwgti6QA:9 a=QEXdDO2ut3YA:10 a=NFOGd7dJGGMPyQGDc5-O:22 a=3b-t3vAtY4IUXy2q2Ylb:22 X-Proofpoint-GUID: 0P42SHj9EPUmd3tLudTFR0O70ov3l8dg X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.20,FMLib:17.12.100.49 definitions=2026-01-21_01,2026-01-20_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 clxscore=1015 impostorscore=0 spamscore=0 priorityscore=1501 suspectscore=0 malwarescore=0 adultscore=0 lowpriorityscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2601210086 ANX7625 can be used as a USB-C controller, handling USB and DP data streams. Provide minimal Type-C support necessary for ANX7625 to register the Type-C port device and properly respond to data / power role events from the Type-C partner. While ANX7625 provides TCPCI interface, using it would circumvent the on-chip running firmware. Analogix recommended using the higher-level interface instead of TCPCI. Reviewed-by: Xin Ji Reviewed-by: Heikki Krogerus Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/bridge/analogix/Kconfig | 1 + drivers/gpu/drm/bridge/analogix/anx7625.c | 155 ++++++++++++++++++++++++++= ++-- drivers/gpu/drm/bridge/analogix/anx7625.h | 22 ++++- 3 files changed, 168 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/bridge/analogix/Kconfig b/drivers/gpu/drm/brid= ge/analogix/Kconfig index 4846b2e9be7c..f3448b0631fe 100644 --- a/drivers/gpu/drm/bridge/analogix/Kconfig +++ b/drivers/gpu/drm/bridge/analogix/Kconfig @@ -34,6 +34,7 @@ config DRM_ANALOGIX_ANX7625 tristate "Analogix Anx7625 MIPI to DP interface support" depends on DRM depends on OF + depends on TYPEC || !TYPEC select DRM_DISPLAY_DP_HELPER select DRM_DISPLAY_HDCP_HELPER select DRM_DISPLAY_HELPER diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c b/drivers/gpu/drm/br= idge/analogix/anx7625.c index 4e49e4f28d55..8dc6e3b16968 100644 --- a/drivers/gpu/drm/bridge/analogix/anx7625.c +++ b/drivers/gpu/drm/bridge/analogix/anx7625.c @@ -3,6 +3,7 @@ * Copyright(c) 2020, Analogix Semiconductor. All rights reserved. * */ +#include #include #include #include @@ -15,6 +16,9 @@ #include #include #include +#include +#include +#include #include =20 #include @@ -1325,7 +1329,7 @@ static int anx7625_read_hpd_gpio_config_status(struct= anx7625_data *ctx) static void anx7625_disable_pd_protocol(struct anx7625_data *ctx) { struct device *dev =3D ctx->dev; - int ret, val; + int ret; =20 /* Reset main ocm */ ret =3D anx7625_reg_write(ctx, ctx->i2c.rx_p0_client, 0x88, 0x40); @@ -1339,6 +1343,11 @@ static void anx7625_disable_pd_protocol(struct anx76= 25_data *ctx) DRM_DEV_DEBUG_DRIVER(dev, "disable PD feature fail.\n"); else DRM_DEV_DEBUG_DRIVER(dev, "disable PD feature succeeded.\n"); +} + +static void anx7625_configure_hpd(struct anx7625_data *ctx) +{ + int val; =20 /* * Make sure the HPD GPIO already be configured after OCM release before @@ -1369,7 +1378,9 @@ static int anx7625_ocm_loading_check(struct anx7625_d= ata *ctx) if ((ret & FLASH_LOAD_STA_CHK) !=3D FLASH_LOAD_STA_CHK) return -ENODEV; =20 - anx7625_disable_pd_protocol(ctx); + if (!ctx->typec_port) + anx7625_disable_pd_protocol(ctx); + anx7625_configure_hpd(ctx); =20 DRM_DEV_DEBUG_DRIVER(dev, "Firmware ver %02x%02x,", anx7625_reg_read(ctx, @@ -1472,6 +1483,107 @@ static void anx7625_start_dp_work(struct anx7625_da= ta *ctx) DRM_DEV_DEBUG_DRIVER(dev, "Secure OCM version=3D%02x\n", ret); } =20 +#if IS_REACHABLE(CONFIG_TYPEC) +static void anx7625_typec_set_orientation(struct anx7625_data *ctx) +{ + u32 val =3D anx7625_reg_read(ctx, ctx->i2c.rx_p0_client, SYSTEM_STSTUS); + + if (val & (CC1_RP | CC1_RD)) + typec_set_orientation(ctx->typec_port, TYPEC_ORIENTATION_NORMAL); + else if (val & (CC2_RP | CC2_RD)) + typec_set_orientation(ctx->typec_port, TYPEC_ORIENTATION_REVERSE); + else + typec_set_orientation(ctx->typec_port, TYPEC_ORIENTATION_NONE); +} + +static void anx7625_typec_set_status(struct anx7625_data *ctx, + unsigned int intr_status, + unsigned int intr_vector) +{ + if (intr_vector & CC_STATUS) + anx7625_typec_set_orientation(ctx); + if (intr_vector & DATA_ROLE_STATUS) { + enum typec_data_role data_role =3D (intr_status & DATA_ROLE_STATUS) ? + TYPEC_HOST : TYPEC_DEVICE; + usb_role_switch_set_role(ctx->role_sw, + (intr_status & DATA_ROLE_STATUS) ? + USB_ROLE_HOST : USB_ROLE_DEVICE); + typec_set_data_role(ctx->typec_port, data_role); + ctx->typec_data_role =3D data_role; + } + if (intr_vector & VBUS_STATUS) + typec_set_pwr_role(ctx->typec_port, + (intr_status & VBUS_STATUS) ? + TYPEC_SOURCE : TYPEC_SINK); + if (intr_vector & VCONN_STATUS) + typec_set_vconn_role(ctx->typec_port, + (intr_status & VCONN_STATUS) ? + TYPEC_SOURCE : TYPEC_SINK); +} + +static int anx7625_typec_register(struct anx7625_data *ctx) +{ + struct typec_capability typec_cap =3D { }; + struct fwnode_handle *fwnode __free(fwnode_handle) =3D + device_get_named_child_node(ctx->dev, "connector"); + u32 val; + int ret; + + if (!fwnode) + return 0; + + ret =3D typec_get_fw_cap(&typec_cap, fwnode); + if (ret < 0) + return ret; + + typec_cap.revision =3D 0x0120; + typec_cap.pd_revision =3D 0x0300; + typec_cap.usb_capability =3D USB_CAPABILITY_USB2 | USB_CAPABILITY_USB3; + typec_cap.orientation_aware =3D true; + + typec_cap.driver_data =3D ctx; + + ctx->typec_port =3D typec_register_port(ctx->dev, &typec_cap); + if (IS_ERR(ctx->typec_port)) + return PTR_ERR(ctx->typec_port); + + ctx->role_sw =3D fwnode_usb_role_switch_get(fwnode); + if (IS_ERR(ctx->role_sw)) { + typec_unregister_port(ctx->typec_port); + return PTR_ERR(ctx->role_sw); + } + + val =3D anx7625_reg_read(ctx, ctx->i2c.rx_p0_client, SYSTEM_STSTUS); + + anx7625_typec_set_status(ctx, val, + CC_STATUS | DATA_ROLE_STATUS | + VBUS_STATUS | VCONN_STATUS); + + return 0; +} + +static void anx7625_typec_unregister(struct anx7625_data *ctx) +{ + usb_role_switch_put(ctx->role_sw); + typec_unregister_port(ctx->typec_port); +} +#else +static void anx7625_typec_set_status(struct anx7625_data *ctx, + unsigned int intr_status, + unsigned int intr_vector) +{ +} + +static int anx7625_typec_register(struct anx7625_data *ctx) +{ + return 0; +} + +static void anx7625_typec_unregister(struct anx7625_data *ctx) +{ +} +#endif + static int anx7625_read_hpd_status_p0(struct anx7625_data *ctx) { return anx7625_reg_read(ctx, ctx->i2c.rx_p0_client, SYSTEM_STSTUS); @@ -1566,7 +1678,7 @@ static void dp_hpd_change_handler(struct anx7625_data= *ctx, bool on) } } =20 -static int anx7625_hpd_change_detect(struct anx7625_data *ctx) +static int anx7625_intr_status(struct anx7625_data *ctx) { int intr_vector, status; struct device *dev =3D ctx->dev; @@ -1593,9 +1705,6 @@ static int anx7625_hpd_change_detect(struct anx7625_d= ata *ctx) return status; } =20 - if (!(intr_vector & HPD_STATUS_CHANGE)) - return -ENOENT; - status =3D anx7625_reg_read(ctx, ctx->i2c.rx_p0_client, SYSTEM_STSTUS); if (status < 0) { @@ -1604,6 +1713,12 @@ static int anx7625_hpd_change_detect(struct anx7625_= data *ctx) } =20 DRM_DEV_DEBUG_DRIVER(dev, "0x7e:0x45=3D%x\n", status); + + anx7625_typec_set_status(ctx, status, intr_vector); + + if (!(intr_vector & HPD_STATUS)) + return -ENOENT; + dp_hpd_change_handler(ctx, status & HPD_STATUS); =20 return 0; @@ -1622,7 +1737,7 @@ static void anx7625_work_func(struct work_struct *wor= k) return; } =20 - event =3D anx7625_hpd_change_detect(ctx); + event =3D anx7625_intr_status(ctx); =20 mutex_unlock(&ctx->lock); =20 @@ -2741,11 +2856,29 @@ static int anx7625_i2c_probe(struct i2c_client *cli= ent) } =20 if (!platform->pdata.low_power_mode) { - anx7625_disable_pd_protocol(platform); + struct fwnode_handle *fwnode; + + fwnode =3D device_get_named_child_node(dev, "connector"); + if (fwnode) + fwnode_handle_put(fwnode); + else + anx7625_disable_pd_protocol(platform); + + anx7625_configure_hpd(platform); + pm_runtime_get_sync(dev); _anx7625_hpd_polling(platform, 5000 * 100); } =20 + if (platform->pdata.intp_irq) + anx7625_reg_write(platform, platform->i2c.rx_p0_client, + INTERFACE_CHANGE_INT_MASK, 0); + + /* After getting runtime handle */ + ret =3D anx7625_typec_register(platform); + if (ret) + goto pm_suspend; + /* Add work function */ if (platform->pdata.intp_irq) { enable_irq(platform->pdata.intp_irq); @@ -2759,6 +2892,10 @@ static int anx7625_i2c_probe(struct i2c_client *clie= nt) =20 return 0; =20 +pm_suspend: + if (!platform->pdata.low_power_mode) + pm_runtime_put_sync_suspend(&client->dev); + free_wq: if (platform->workqueue) destroy_workqueue(platform->workqueue); @@ -2774,6 +2911,8 @@ static void anx7625_i2c_remove(struct i2c_client *cli= ent) { struct anx7625_data *platform =3D i2c_get_clientdata(client); =20 + anx7625_typec_unregister(platform); + drm_bridge_remove(&platform->bridge); =20 if (platform->pdata.intp_irq) diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.h b/drivers/gpu/drm/br= idge/analogix/anx7625.h index eb5580f1ab2f..a18561c213af 100644 --- a/drivers/gpu/drm/bridge/analogix/anx7625.h +++ b/drivers/gpu/drm/bridge/analogix/anx7625.h @@ -51,9 +51,21 @@ #define INTR_RECEIVED_MSG BIT(5) =20 #define SYSTEM_STSTUS 0x45 +#define INTERFACE_CHANGE_INT_MASK 0x43 #define INTERFACE_CHANGE_INT 0x44 -#define HPD_STATUS_CHANGE 0x80 -#define HPD_STATUS 0x80 +#define VCONN_STATUS BIT(2) +#define VBUS_STATUS BIT(3) +#define CC_STATUS BIT(4) +#define DATA_ROLE_STATUS BIT(5) +#define HPD_STATUS BIT(7) + +#define NEW_CC_STATUS 0x46 +#define CC1_RD BIT(0) +#define CC1_RA BIT(1) +#define CC1_RP (BIT(2) | BIT(3)) +#define CC2_RD BIT(4) +#define CC2_RA BIT(5) +#define CC2_RP (BIT(6) | BIT(7)) =20 /******** END of I2C Address 0x58 ********/ =20 @@ -447,9 +459,15 @@ struct anx7625_i2c_client { struct i2c_client *tcpc_client; }; =20 +struct typec_port; +struct usb_role_switch; + struct anx7625_data { struct anx7625_platform_data pdata; struct platform_device *audio_pdev; + struct typec_port *typec_port; + struct usb_role_switch *role_sw; + int typec_data_role; int hpd_status; int hpd_high_cnt; int dp_en; --=20 2.47.3