From nobody Tue Feb 10 01:19:22 2026 Received: from TWMBX01.aspeed.com (mail.aspeedtech.com [211.20.114.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2BBF44266B8; Tue, 20 Jan 2026 12:30:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.20.114.72 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768912212; cv=none; b=fOQm2I8bbfvLo2B89Y15dNKRFqQNCUXzGYO/lj1/0/tGxa9pU/p1MjhI4yyxeD7uaAtiXHRidufe/AE4uOXUJ9kOb3rI2rq91IrVVHMXc0huYGy8b7KMoGNhCdJW+IzC4jmLvg4lEZB6iJasdeMsv9Gwb/dm5JeQnfSUHQsNq+k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768912212; c=relaxed/simple; bh=kazIy+1QIMcxqpyxoVHvN9xkLhu67bFVz+excxkCPYs=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=MjFQ+nvgTvwbWyKn81ffLJnd7OlTKLF9LRoadUuuSGl1RBjoRPt/D1T72rsV77tfm5iaW4ugFcmp0EmF6Wexqqg1N4AxlxqRxQlNTA2volz08ywSoJGVErUbNpM98vVfo81KwnctqQTkNHqXwPcnmpn4ghdIKO0m0+MH+fHMSa8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com; spf=pass smtp.mailfrom=aspeedtech.com; arc=none smtp.client-ip=211.20.114.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=aspeedtech.com Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Tue, 20 Jan 2026 20:30:05 +0800 Received: from aspeedtech.com (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Tue, 20 Jan 2026 20:30:05 +0800 From: Chin-Ting Kuo To: , , , , , , , , , , , Subject: [PATCH v3 1/2] spi: spi-mem: Protect dirmap_create() with spi_mem_access_start/end Date: Tue, 20 Jan 2026 20:30:04 +0800 Message-ID: <20260120123005.1392071-2-chin-ting_kuo@aspeedtech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260120123005.1392071-1-chin-ting_kuo@aspeedtech.com> References: <20260120123005.1392071-1-chin-ting_kuo@aspeedtech.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" spi_mem_dirmap_create() may reconfigure controller-wide settings, which can interfere with concurrent transfers to other devices sharing the same SPI controller but using different chip selects. Wrap the ->dirmap_create() callback with spi_mem_access_start() and spi_mem_access_end() to serialize access and prevent cross-CS interference during dirmap creation. This patch has been verified on a setup where a SPI TPM is connected to CS0 of a SPI controller, while a SPI NOR flash is connected to CS1 of the same controller. Without this patch, spi_mem_dirmap_create() for the SPI NOR flash interferes with ongoing SPI TPM data transfers, resulting in failure to create the TPM device. This was tested on an ASPEED AST2700 EVB. Signed-off-by: Chin-Ting Kuo Reviewed-by: Paul Menzel --- drivers/spi/spi-mem.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c index c8b2add2640e..85702a77b3c8 100644 --- a/drivers/spi/spi-mem.c +++ b/drivers/spi/spi-mem.c @@ -708,9 +708,18 @@ spi_mem_dirmap_create(struct spi_mem *mem, =20 desc->mem =3D mem; desc->info =3D *info; - if (ctlr->mem_ops && ctlr->mem_ops->dirmap_create) + if (ctlr->mem_ops && ctlr->mem_ops->dirmap_create) { + ret =3D spi_mem_access_start(mem); + if (ret) { + kfree(desc); + return ERR_PTR(ret); + } + ret =3D ctlr->mem_ops->dirmap_create(desc); =20 + spi_mem_access_end(mem); + } + if (ret) { desc->nodirmap =3D true; if (!spi_mem_supports_op(desc->mem, &desc->info.op_tmpl)) --=20 2.34.1