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charset="utf-8" From: Andrei Stefanescu Change dev_err&return statements into dev_err_probe throughout the driver on the probing path. Moreover, add/fix some comments and print statements. Signed-off-by: Andrei Stefanescu --- drivers/pinctrl/nxp/pinctrl-s32cc.c | 106 +++++++++++++++------------- 1 file changed, 55 insertions(+), 51 deletions(-) diff --git a/drivers/pinctrl/nxp/pinctrl-s32cc.c b/drivers/pinctrl/nxp/pinc= trl-s32cc.c index 35511f83d056..a98f8e7c2768 100644 --- a/drivers/pinctrl/nxp/pinctrl-s32cc.c +++ b/drivers/pinctrl/nxp/pinctrl-s32cc.c @@ -2,7 +2,7 @@ /* * Core driver for the S32 CC (Common Chassis) pin controller * - * Copyright 2017-2022,2024 NXP + * Copyright 2017-2022,2024-2025 NXP * Copyright (C) 2022 SUSE LLC * Copyright 2015-2016 Freescale Semiconductor, Inc. */ @@ -60,14 +60,20 @@ static u32 get_pin_func(u32 pinmux) return pinmux & GENMASK(3, 0); } =20 +/** + * struct s32_pinctrl_mem_region - memory region for a set of SIUL2 regist= ers + * @map: regmap used for this range + * @pin_range: the pins controlled by these registers + * @name: name of the current range + */ struct s32_pinctrl_mem_region { struct regmap *map; const struct s32_pin_range *pin_range; char name[8]; }; =20 -/* - * Holds pin configuration for GPIO's. +/** + * struct gpio_pin_config - holds pin configuration for GPIO's * @pin_id: Pin ID for this GPIO * @config: Pin settings * @list: Linked list entry for each gpio pin @@ -78,21 +84,23 @@ struct gpio_pin_config { struct list_head list; }; =20 -/* - * Pad config save/restore for power suspend/resume. +/** + * struct s32_pinctrl_context - pad config save/restore for suspend/resume + * @pads: saved values for the pards */ struct s32_pinctrl_context { unsigned int *pads; }; =20 -/* +/** + * struct s32_pinctrl - private driver data * @dev: a pointer back to containing device * @pctl: a pointer to the pinctrl device structure * @regions: reserved memory regions with start/end pin * @info: structure containing information about the pin - * @gpio_configs: Saved configurations for GPIO pins - * @gpiop_configs_lock: lock for the `gpio_configs` list - * @s32_pinctrl_context: Configuration saved over system sleep + * @gpio_configs: saved configurations for GPIO pins + * @gpio_configs_lock: lock for the `gpio_configs` list + * @saved_context: configuration saved over system sleep */ struct s32_pinctrl { struct device *dev; @@ -123,13 +131,13 @@ s32_get_region(struct pinctrl_dev *pctldev, unsigned = int pin) return NULL; } =20 -static inline int s32_check_pin(struct pinctrl_dev *pctldev, - unsigned int pin) +static int s32_check_pin(struct pinctrl_dev *pctldev, + unsigned int pin) { return s32_get_region(pctldev, pin) ? 0 : -EINVAL; } =20 -static inline int s32_regmap_read(struct pinctrl_dev *pctldev, +static int s32_regmap_read(struct pinctrl_dev *pctldev, unsigned int pin, unsigned int *val) { struct s32_pinctrl_mem_region *region; @@ -145,7 +153,7 @@ static inline int s32_regmap_read(struct pinctrl_dev *p= ctldev, return regmap_read(region->map, offset, val); } =20 -static inline int s32_regmap_write(struct pinctrl_dev *pctldev, +static int s32_regmap_write(struct pinctrl_dev *pctldev, unsigned int pin, unsigned int val) { @@ -163,7 +171,7 @@ static inline int s32_regmap_write(struct pinctrl_dev *= pctldev, =20 } =20 -static inline int s32_regmap_update(struct pinctrl_dev *pctldev, unsigned = int pin, +static int s32_regmap_update(struct pinctrl_dev *pctldev, unsigned int pin, unsigned int mask, unsigned int val) { struct s32_pinctrl_mem_region *region; @@ -236,10 +244,10 @@ static int s32_dt_group_node_to_map(struct pinctrl_de= v *pctldev, } =20 ret =3D pinconf_generic_parse_dt_config(np, pctldev, &cfgs, &n_cfgs); - if (ret) { - dev_err(dev, "%pOF: could not parse node property\n", np); - return ret; - } + if (ret) + return dev_err_probe(dev, ret, + "%pOF: could not parse node property\n", + np); =20 if (n_cfgs) reserve++; @@ -321,7 +329,7 @@ static int s32_pmx_set(struct pinctrl_dev *pctldev, uns= igned int selector, /* Check beforehand so we don't have a partial config. */ for (i =3D 0; i < grp->data.npins; i++) { if (s32_check_pin(pctldev, grp->data.pins[i]) !=3D 0) { - dev_err(info->dev, "invalid pin: %u in group: %u\n", + dev_err(info->dev, "Invalid pin: %u in group: %u\n", grp->data.pins[i], group); return -EINVAL; } @@ -476,8 +484,8 @@ static int s32_get_slew_regval(int arg) return -EINVAL; } =20 -static inline void s32_pin_set_pull(enum pin_config_param param, - unsigned int *mask, unsigned int *config) +static void s32_pin_set_pull(enum pin_config_param param, + unsigned int *mask, unsigned int *config) { switch (param) { case PIN_CONFIG_BIAS_DISABLE: @@ -763,15 +771,15 @@ static int s32_pinctrl_parse_groups(struct device_nod= e *np, grp->data.name =3D np->name; =20 npins =3D of_property_count_elems_of_size(np, "pinmux", sizeof(u32)); - if (npins < 0) { - dev_err(dev, "Failed to read 'pinmux' property in node %s.\n", - grp->data.name); - return -EINVAL; - } - if (!npins) { - dev_err(dev, "The group %s has no pins.\n", grp->data.name); - return -EINVAL; - } + if (npins < 0) + return dev_err_probe(dev, -EINVAL, + "Failed to read 'pinmux' in node %s\n", + grp->data.name); + + if (!npins) + return dev_err_probe(dev, -EINVAL, + "The group %s has no pins\n", + grp->data.name); =20 grp->data.npins =3D npins; =20 @@ -812,10 +820,9 @@ static int s32_pinctrl_parse_functions(struct device_n= ode *np, /* Initialise function */ func->name =3D np->name; func->ngroups =3D of_get_child_count(np); - if (func->ngroups =3D=3D 0) { - dev_err(info->dev, "no groups defined in %pOF\n", np); - return -EINVAL; - } + if (func->ngroups =3D=3D 0) + return dev_err_probe(info->dev, -EINVAL, + "No groups defined in %pOF\n", np); =20 groups =3D devm_kcalloc(info->dev, func->ngroups, sizeof(*func->groups), GFP_KERNEL); @@ -886,10 +893,9 @@ static int s32_pinctrl_probe_dt(struct platform_device= *pdev, } =20 nfuncs =3D of_get_child_count(np); - if (nfuncs <=3D 0) { - dev_err(&pdev->dev, "no functions defined\n"); - return -EINVAL; - } + if (nfuncs <=3D 0) + return dev_err_probe(&pdev->dev, -EINVAL, + "No functions defined\n"); =20 info->nfunctions =3D nfuncs; info->functions =3D devm_kcalloc(&pdev->dev, nfuncs, @@ -919,18 +925,17 @@ static int s32_pinctrl_probe_dt(struct platform_devic= e *pdev, int s32_pinctrl_probe(struct platform_device *pdev, const struct s32_pinctrl_soc_data *soc_data) { - struct s32_pinctrl *ipctl; - int ret; - struct pinctrl_desc *s32_pinctrl_desc; - struct s32_pinctrl_soc_info *info; #ifdef CONFIG_PM_SLEEP struct s32_pinctrl_context *saved_context; #endif + struct pinctrl_desc *s32_pinctrl_desc; + struct s32_pinctrl_soc_info *info; + struct s32_pinctrl *ipctl; + int ret; =20 - if (!soc_data || !soc_data->pins || !soc_data->npins) { - dev_err(&pdev->dev, "wrong pinctrl info\n"); - return -EINVAL; - } + if (!soc_data || !soc_data->pins || !soc_data->npins) + return dev_err_probe(&pdev->dev, -EINVAL, + "Wrong pinctrl info\n"); =20 info =3D devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL); if (!info) @@ -965,16 +970,15 @@ int s32_pinctrl_probe(struct platform_device *pdev, s32_pinctrl_desc->owner =3D THIS_MODULE; =20 ret =3D s32_pinctrl_probe_dt(pdev, ipctl); - if (ret) { - dev_err(&pdev->dev, "fail to probe dt properties\n"); - return ret; - } + if (ret) + return dev_err_probe(&pdev->dev, ret, + "Fail to probe dt properties\n"); =20 ipctl->pctl =3D devm_pinctrl_register(&pdev->dev, s32_pinctrl_desc, ipctl); if (IS_ERR(ipctl->pctl)) return dev_err_probe(&pdev->dev, PTR_ERR(ipctl->pctl), - "could not register s32 pinctrl driver\n"); + "Could not register s32 pinctrl driver\n"); =20 #ifdef CONFIG_PM_SLEEP saved_context =3D &ipctl->saved_context; --=20 2.50.1