From nobody Sun Feb 8 20:34:17 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 97D1B3D6497 for ; Tue, 20 Jan 2026 09:28:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768901304; cv=none; b=A4vb1wrIhCrBBbeMTw8o92cudnsrh1iQPXpC37njPLQlS4UCffvjWpf+OKferZNvbQrp4brLFUupecaAc4IEAESqg9y7gz7oHLxClkVPOblCb63xRunvbV6dI748XOolW3LCPXX+lcOWk8508iuXegQR5BcVz7O7IwRYl0FP8wo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768901304; c=relaxed/simple; bh=tF+/Q1zpGPKP7S1gEkff+3mK4nJPCY1uhXiIUOb24yM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=vAi1gfQlYTAIbfAam+CGvrgqWH5orJsD3ytOBXnNnHASj8Ws/Rx0m+g6mLhtQiowa2PZo0xPMSPd4g8ZyKJJ2UoemQ+koTFtlany9hgs3UR8Q0YQWXlcAcVII/bhkWov7xocpPzWC7LrGlICRHdJLXQXpk5W9vV7mSk0khQwLDM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=Bxk19jXH; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="Bxk19jXH" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 0A75C4E421A7; Tue, 20 Jan 2026 09:28:21 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id D1C49606AB; Tue, 20 Jan 2026 09:28:20 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 6696A10B6B33B; Tue, 20 Jan 2026 10:28:18 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1768901299; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=kfKKpvlYqdhVG1MSbcOkt2TctRFDQWBk7FAh8gTzIEA=; b=Bxk19jXHSvMkrFaV7gkDBGi2SEyv8Y1BFRjI9oIQubMADjPilvp8FrfWeFhJX8YPgmsLPH 5Tm+i/Nu9dfnau1YPgGY87OmKnLv2wk6f9Y4qwGd420JLwPnexBrPKRmMte+b6uhte4iHd J0/tbcHnIuSDwdMEY7mLFzd66w46HA2qvRAapibeHMLOJVFpg0qgQwdQJuNJ2z03C2MFr7 qcTbk20m55ILHZoumNubl58BE+0t1XUuU76d1WmNPv2UUdcpJ+r8k1L7k/5krq7DGHY1CH sFhp912BQ7qzh8PpIcYxS2vk57ElasZC/KQG2kibOPoYW3+BRV9DO5MmIutkcw== From: =?utf-8?q?Beno=C3=AEt_Monin?= Date: Tue, 20 Jan 2026 10:28:01 +0100 Subject: [PATCH v5 1/6] i2c: designware: Optimize flag reading in i2c_dw_read() Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260120-i2c-dw-v5-1-0e34d6d9455c@bootlin.com> References: <20260120-i2c-dw-v5-0-0e34d6d9455c@bootlin.com> In-Reply-To: <20260120-i2c-dw-v5-0-0e34d6d9455c@bootlin.com> To: Andi Shyti , Mika Westerberg , Andy Shevchenko , Jan Dabros , Sebastian Andrzej Siewior , Clark Williams , Steven Rostedt Cc: Thomas Petazzoni , Gregory CLEMENT , =?utf-8?q?Th=C3=A9o_Lebrun?= , Tawfik Bayouk , Vladimir Kondratiev , Dmitry Guzman , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, =?utf-8?q?Beno=C3=AEt_Monin?= X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Optimize the i2c_dw_read() function by reading the message flags only once per message, rather than for every byte. The message flags are accessed both in the outer loop and the inner loop, so move the declaration of the local flags variable to the outer loop. The message index is only modified by the outer loop, so reading the flags in the inner loop was always getting the same value. Reviewed-by: Andy Shevchenko Signed-off-by: Beno=C3=AEt Monin Acked-by: Mika Westerberg --- drivers/i2c/busses/i2c-designware-master.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/i2c/busses/i2c-designware-master.c b/drivers/i2c/busse= s/i2c-designware-master.c index 45bfca05bb30..4493568e2fa3 100644 --- a/drivers/i2c/busses/i2c-designware-master.c +++ b/drivers/i2c/busses/i2c-designware-master.c @@ -593,11 +593,12 @@ i2c_dw_read(struct dw_i2c_dev *dev) unsigned int rx_valid; =20 for (; dev->msg_read_idx < dev->msgs_num; dev->msg_read_idx++) { + u32 flags =3D msgs[dev->msg_read_idx].flags; unsigned int tmp; u32 len; u8 *buf; =20 - if (!(msgs[dev->msg_read_idx].flags & I2C_M_RD)) + if (!(flags & I2C_M_RD)) continue; =20 if (!(dev->status & STATUS_READ_IN_PROGRESS)) { @@ -611,8 +612,6 @@ i2c_dw_read(struct dw_i2c_dev *dev) regmap_read(dev->map, DW_IC_RXFLR, &rx_valid); =20 for (; len > 0 && rx_valid > 0; len--, rx_valid--) { - u32 flags =3D msgs[dev->msg_read_idx].flags; - regmap_read(dev->map, DW_IC_DATA_CMD, &tmp); tmp &=3D DW_IC_DATA_CMD_DAT; /* Ensure length byte is a valid value */ --=20 2.52.0 From nobody Sun Feb 8 20:34:17 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 175563D3303; Tue, 20 Jan 2026 09:28:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768901305; cv=none; b=AHDlU+z41E4Y+i1RR8Hl8vcnloKJIvtFcJwIWRmhr5koeUyvgbI1/FUUxVV/VMz2J4J2VyQnXozqKhGuvUMYf1LaHNuw1ujnYKKfh8RYW3J41DfqZemOkFOdRlkmO7Y2nw0iU312DZMO4DUUDrpBx70MUWDT43v5stgS9vj78Ys= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768901305; c=relaxed/simple; bh=z5Ko/ExEh98qd7kZ1S+3qdSHtO2lq0STn0aXtdw+tmw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=J7wITJm5ODjaheGYA2MH02NlYnBD/hr91H8L/oVU2UHe3QkM7SNqRw8zBzocW67O6hd/iL16jWZ7JDnDi9X4NMNPc9iRKhTzmaZT+pPxNlc/LknMEe7Rn0fTKvxCsCIFITkGoYe5BKwv+Q9z5ahJeWAYURtvX24hwAIsn87Tecw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=Av//vgTm; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="Av//vgTm" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 8CFEA4E421A8; Tue, 20 Jan 2026 09:28:22 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 61859606AB; Tue, 20 Jan 2026 09:28:22 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id EED7F10B6B33E; Tue, 20 Jan 2026 10:28:19 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1768901301; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=MnieqBRze2TAjPgWGtxbjIVY/nC24DFNtyWoe7rx3/A=; b=Av//vgTmkyV9sg2PGTop1v7mdQW9NNVfQ+t3glLXgvx53PAyHppU9p+zBl1cx8JPMPofIW p5FQRuVcwtsPIxHJua5D+MsTHdDI8X5e7hkvYdlxN+ovRmBEdkLR0lldrZOr2YY+P/MVOi Mo93A7knjN5dV15grHH8ciYYYRj4U1Bzr6aSEQjVYn7qyASFMna4wRFywElQSaVoWNqzy0 UI0eaQzEWco3vu49/R+YfD2pNw+jN8tJ1pxCvOtZLYViqRgAVk4mt+bNkEtwFa/bwK5xV0 n72RIVPtI5Ykoov0go3WHdMb8mPJzTb8c7HBf6hSMnP0oi4Odqg9WUaGjiUEIA== From: =?utf-8?q?Beno=C3=AEt_Monin?= Date: Tue, 20 Jan 2026 10:28:02 +0100 Subject: [PATCH v5 2/6] i2c: designware: Sort compatible strings in alphabetical order Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260120-i2c-dw-v5-2-0e34d6d9455c@bootlin.com> References: <20260120-i2c-dw-v5-0-0e34d6d9455c@bootlin.com> In-Reply-To: <20260120-i2c-dw-v5-0-0e34d6d9455c@bootlin.com> To: Andi Shyti , Mika Westerberg , Andy Shevchenko , Jan Dabros , Sebastian Andrzej Siewior , Clark Williams , Steven Rostedt Cc: Thomas Petazzoni , Gregory CLEMENT , =?utf-8?q?Th=C3=A9o_Lebrun?= , Tawfik Bayouk , Vladimir Kondratiev , Dmitry Guzman , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, =?utf-8?q?Beno=C3=AEt_Monin?= X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Reorder the of_device_id structures so that they are in alphabetical order. Also drop the unneeded inner trailing comma in the "snps,designware-i2c" struct. Reviewed-by: Andy Shevchenko Signed-off-by: Beno=C3=AEt Monin Acked-by: Mika Westerberg --- drivers/i2c/busses/i2c-designware-platdrv.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/buss= es/i2c-designware-platdrv.c index 7be99656a67d..077b34535ec7 100644 --- a/drivers/i2c/busses/i2c-designware-platdrv.c +++ b/drivers/i2c/busses/i2c-designware-platdrv.c @@ -334,9 +334,9 @@ static void dw_i2c_plat_remove(struct platform_device *= pdev) } =20 static const struct of_device_id dw_i2c_of_match[] =3D { - { .compatible =3D "snps,designware-i2c", }, - { .compatible =3D "mscc,ocelot-i2c", .data =3D (void *)MODEL_MSCC_OCELOT = }, { .compatible =3D "baikal,bt1-sys-i2c", .data =3D (void *)MODEL_BAIKAL_BT= 1 }, + { .compatible =3D "mscc,ocelot-i2c", .data =3D (void *)MODEL_MSCC_OCELOT = }, + { .compatible =3D "snps,designware-i2c" }, {} }; MODULE_DEVICE_TABLE(of, dw_i2c_of_match); --=20 2.52.0 From nobody Sun Feb 8 20:34:17 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E1F1C3D666D for ; Tue, 20 Jan 2026 09:28:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768901308; cv=none; b=JDK8WzQh/SfkmYqgDtwKZdLgczCt8wk73ayJgaRlGyeGKBVWHaU5oqRU9YyVeHLKLWf3PqoW2JHD7CzReDgzcaeGWOOYn2q13AOw5E6nlbsvczjnpJblFL5C6g88LJAVhaVGXjvZ+tWghZJjET6Kni3V2a8jZ8aCfkAIZ5sLyRk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768901308; c=relaxed/simple; bh=QMqioJoP80Iu3/5uGtxuCFsLXp9UlfrL0fqbcQmIhZs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=HnVKC5O3exD3yMrqz0IxVuVohvXTs1YveBBSzoyHescmqQYyiZO01Fh8WPsF359Bc8cf13iGq1OEIMEQyjr/3jwLYQq8Vt/cbVNUSMoBs4GgwLfDzQoOQpcdE+Sxa9pqTYwkSQVVQcyZHhHOaQadZvWMHWfqTXMQiiAGFsShSk0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=od+Wp3ma; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="od+Wp3ma" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 485104E421A9; Tue, 20 Jan 2026 09:28:24 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 1F625606AB; Tue, 20 Jan 2026 09:28:24 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id B35D510B68378; Tue, 20 Jan 2026 10:28:21 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1768901303; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=jc6Cz28LDEeuob4AY0w3tlBij8P56e1G48BsjZWXPos=; b=od+Wp3maJgYXGKdoZr3NVTPJPcB3dHL6xN9MvjtZyVmJ2BbcYiYiqQbNhB3jQ1BTRwx+E1 2ig10LrHGWjus9Wo9KceMyqUwFoQs2fxsYlhwzHQlYr1mwXj82JYAsUPOUclTURZUOJ+i3 5NPk7G8KSbVuW72bPKSrrQv3kZc73Ril0p2/FxTgQOZUp0QrYU4MTlIIPukAnjpEopLneE dMnAJI5EjdtXBmtvgjMQITokW3JWuaLP3x8feKBtJrYof0ZOOp96xw0zYkoFSU0sqqiWAd GSu+s2ju6MP0TaeyJR97aHQPy709PSTendbERGbVQlDYb9l12tnfee1SsiKVdA== From: =?utf-8?q?Beno=C3=AEt_Monin?= Date: Tue, 20 Jan 2026 10:28:03 +0100 Subject: [PATCH v5 3/6] i2c: designware: Add dedicated algorithm for AMD NAVI Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260120-i2c-dw-v5-3-0e34d6d9455c@bootlin.com> References: <20260120-i2c-dw-v5-0-0e34d6d9455c@bootlin.com> In-Reply-To: <20260120-i2c-dw-v5-0-0e34d6d9455c@bootlin.com> To: Andi Shyti , Mika Westerberg , Andy Shevchenko , Jan Dabros , Sebastian Andrzej Siewior , Clark Williams , Steven Rostedt Cc: Thomas Petazzoni , Gregory CLEMENT , =?utf-8?q?Th=C3=A9o_Lebrun?= , Tawfik Bayouk , Vladimir Kondratiev , Dmitry Guzman , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, =?utf-8?q?Beno=C3=AEt_Monin?= X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Apart from runtime PM, there is nothing in common between i2c_dw_xfer() and amd_i2c_dw_xfer_quirk(), so give AMD NAVI controller its own algorithm instead of calling the quirk from i2c_dw_xfer(). Add runtime PM handling to amd_i2c_dw_xfer_quirk() and a dedicated i2c_algorithm for AMD NAVI controllers. The adapter algorithm is set during probe based on the device model. This way we avoid checking for the device model at the start of every transfer. Reviewed-by: Andy Shevchenko Signed-off-by: Beno=C3=AEt Monin Acked-by: Mika Westerberg --- drivers/i2c/busses/i2c-designware-master.c | 22 +++++++++++++--------- 1 file changed, 13 insertions(+), 9 deletions(-) diff --git a/drivers/i2c/busses/i2c-designware-master.c b/drivers/i2c/busse= s/i2c-designware-master.c index 4493568e2fa3..f247cf323207 100644 --- a/drivers/i2c/busses/i2c-designware-master.c +++ b/drivers/i2c/busses/i2c-designware-master.c @@ -361,6 +361,10 @@ static int amd_i2c_dw_xfer_quirk(struct i2c_adapter *a= dap, struct i2c_msg *msgs, u8 *tx_buf; unsigned int val; =20 + ACQUIRE(pm_runtime_active_auto_try, pm)(dev->dev); + if (ACQUIRE_ERR(pm_runtime_active_auto_try, &pm)) + return -ENXIO; + /* * In order to enable the interrupt for UCSI i.e. AMD NAVI GPU card, * it is mandatory to set the right value in specific register @@ -820,14 +824,6 @@ i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg m= sgs[], int num) =20 pm_runtime_get_sync(dev->dev); =20 - switch (dev->flags & MODEL_MASK) { - case MODEL_AMD_NAVI_GPU: - ret =3D amd_i2c_dw_xfer_quirk(adap, msgs, num); - goto done_nolock; - default: - break; - } - reinit_completion(&dev->cmd_complete); dev->msgs =3D msgs; dev->msgs_num =3D num; @@ -917,6 +913,11 @@ static const struct i2c_algorithm i2c_dw_algo =3D { .functionality =3D i2c_dw_func, }; =20 +static const struct i2c_algorithm amd_i2c_dw_algo =3D { + .xfer =3D amd_i2c_dw_xfer_quirk, + .functionality =3D i2c_dw_func, +}; + static const struct i2c_adapter_quirks i2c_dw_quirks =3D { .flags =3D I2C_AQ_NO_ZERO_LEN, }; @@ -1052,7 +1053,10 @@ int i2c_dw_probe_master(struct dw_i2c_dev *dev) scnprintf(adap->name, sizeof(adap->name), "Synopsys DesignWare I2C adapter"); adap->retries =3D 3; - adap->algo =3D &i2c_dw_algo; + if ((dev->flags & MODEL_MASK) =3D=3D MODEL_AMD_NAVI_GPU) + adap->algo =3D &amd_i2c_dw_algo; + else + adap->algo =3D &i2c_dw_algo; adap->quirks =3D &i2c_dw_quirks; adap->dev.parent =3D dev->dev; i2c_set_adapdata(adap, dev); --=20 2.52.0 From nobody Sun Feb 8 20:34:17 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 84B833D6696 for ; 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arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="vr0QiMye" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id 2AC041A295A; Tue, 20 Jan 2026 09:28:26 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id F35F0606AB; Tue, 20 Jan 2026 09:28:25 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 7DD2E10B6B33F; Tue, 20 Jan 2026 10:28:23 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1768901305; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=VcDY1DMa5WZj4t7vaFnd7v1qfU+Z1R4oGDmY6pbA5G4=; b=vr0QiMyeU+tRE/6u7rMNqDNR42nRXB5zB+AoIIwK6bf6/UYdO0hZZ4Xq0dTukp2uPU1QqJ XCLbC0bsD9z6vcQmIsORY88/iLAIxtwmqkfOgQn/8fsgAR3cCjkgeWM77CQN+dIZwFJPyc 9U5Bb1vFfaPgIGXhZnA0XwlDa/ZmzKrOW0c5ST15bBW00V/z2gA3aBp/c2+6BiDqLD0POc eE2ACzFkCb2XO6I1/VWkkAbyleL9GRqbmeFmA0LYGEZTdQowS0KJUdLk+wTHI21PBO2ZX9 I/jjKRHKc9VeJLMH2+K4f7M2aKTRRrQI17BwvhK2sYPe8WEUw/nh9hHUX5CZ1g== From: =?utf-8?q?Beno=C3=AEt_Monin?= Date: Tue, 20 Jan 2026 10:28:04 +0100 Subject: [PATCH v5 4/6] i2c: designware: Implement I2C_M_STOP support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260120-i2c-dw-v5-4-0e34d6d9455c@bootlin.com> References: <20260120-i2c-dw-v5-0-0e34d6d9455c@bootlin.com> In-Reply-To: <20260120-i2c-dw-v5-0-0e34d6d9455c@bootlin.com> To: Andi Shyti , Mika Westerberg , Andy Shevchenko , Jan Dabros , Sebastian Andrzej Siewior , Clark Williams , Steven Rostedt Cc: Thomas Petazzoni , Gregory CLEMENT , =?utf-8?q?Th=C3=A9o_Lebrun?= , Tawfik Bayouk , Vladimir Kondratiev , Dmitry Guzman , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, =?utf-8?q?Beno=C3=AEt_Monin?= X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Add the support of the I2C_M_STOP flag in i2c_msg by splitting i2c_dw_xfer() in two: __i2c_dw_xfer_one_part() for the core transfer logic and i2c_dw_xfer() for handling the high-level transaction management. In detail __i2c_dw_xfer_one_part() starts a transaction and wait for its completion, either with a STOP on the bus or an error. i2c_dw_xfer() loops over the messages to search for the I2C_M_STOP flag and calls __i2c_dw_xfer_one_part() for each part of the messages up to a STOP or the end of the messages array. i2c_dw_xfer() takes care of runtime PM and holds the hardware lock on the bus while calling __i2c_dw_xfer_one_part(), this allows grouping multiple accesses to device that support a STOP in a transaction when done via i2c_dev I2C_RDWR ioctl. Also, now that we have a lookup of the messages in i2c_dw_xfer() prior to each transaction, we use it to make sure the messages are valid for the transaction, via a new function i2c_dw_msg_is_valid(). We check that the target address does not change before starting the transaction instead of aborting the transfer while it is happening, as it was done in i2c_dw_xfer_msg(). The target address can only be changed after an I2C_M_STOP flag, i.e after a STOP on the i2c bus. The I2C_FUNC_PROTOCOL_MANGLING flag is added to the list of functionalities supported by the controller, except for the AMD NAVI i2c controller which uses its own xfer() function and is left untouched. Signed-off-by: Beno=C3=AEt Monin Acked-by: Mika Westerberg --- drivers/i2c/busses/i2c-designware-master.c | 130 ++++++++++++++++++++-----= ---- 1 file changed, 90 insertions(+), 40 deletions(-) diff --git a/drivers/i2c/busses/i2c-designware-master.c b/drivers/i2c/busse= s/i2c-designware-master.c index f247cf323207..a0ff0e2db065 100644 --- a/drivers/i2c/busses/i2c-designware-master.c +++ b/drivers/i2c/busses/i2c-designware-master.c @@ -442,7 +442,6 @@ i2c_dw_xfer_msg(struct dw_i2c_dev *dev) struct i2c_msg *msgs =3D dev->msgs; u32 intr_mask; int tx_limit, rx_limit; - u32 addr =3D msgs[dev->msg_write_idx].addr; u32 buf_len =3D dev->tx_buf_len; u8 *buf =3D dev->tx_buf; bool need_restart =3D false; @@ -453,18 +452,6 @@ i2c_dw_xfer_msg(struct dw_i2c_dev *dev) for (; dev->msg_write_idx < dev->msgs_num; dev->msg_write_idx++) { u32 flags =3D msgs[dev->msg_write_idx].flags; =20 - /* - * If target address has changed, we need to - * reprogram the target address in the I2C - * adapter when we are done with this transfer. - */ - if (msgs[dev->msg_write_idx].addr !=3D addr) { - dev_err(dev->dev, - "%s: invalid target address\n", __func__); - dev->msg_err =3D -EINVAL; - break; - } - if (!(dev->status & STATUS_WRITE_IN_PROGRESS)) { /* new i2c_msg */ buf =3D msgs[dev->msg_write_idx].buf; @@ -812,18 +799,15 @@ static int i2c_dw_wait_transfer(struct dw_i2c_dev *de= v) } =20 /* - * Prepare controller for a transaction and call i2c_dw_xfer_msg. + * Prepare controller for a transaction, start the transfer of the msgs + * and wait for completion, either a STOP or a error. + * Return 0 or a negative error code. */ static int -i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) +__i2c_dw_xfer_one_part(struct dw_i2c_dev *dev, struct i2c_msg *msgs, size_= t num) { - struct dw_i2c_dev *dev =3D i2c_get_adapdata(adap); int ret; =20 - dev_dbg(dev->dev, "%s: msgs: %d\n", __func__, num); - - pm_runtime_get_sync(dev->dev); - reinit_completion(&dev->cmd_complete); dev->msgs =3D msgs; dev->msgs_num =3D num; @@ -835,13 +819,9 @@ i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg m= sgs[], int num) dev->abort_source =3D 0; dev->rx_outstanding =3D 0; =20 - ret =3D i2c_dw_acquire_lock(dev); - if (ret) - goto done_nolock; - ret =3D i2c_dw_wait_bus_not_busy(dev); if (ret < 0) - goto done; + return ret; =20 /* Start the transfers */ i2c_dw_xfer_init(dev); @@ -853,7 +833,7 @@ i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg ms= gs[], int num) /* i2c_dw_init_master() implicitly disables the adapter */ i2c_recover_bus(&dev->adapter); i2c_dw_init_master(dev); - goto done; + return ret; } =20 /* @@ -876,28 +856,93 @@ i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg = msgs[], int num) */ __i2c_dw_disable_nowait(dev); =20 - if (dev->msg_err) { - ret =3D dev->msg_err; - goto done; - } + if (dev->msg_err) + return dev->msg_err; =20 /* No error */ - if (likely(!dev->cmd_err && !dev->status)) { - ret =3D num; - goto done; - } + if (likely(!dev->cmd_err && !dev->status)) + return 0; =20 /* We have an error */ - if (dev->cmd_err =3D=3D DW_IC_ERR_TX_ABRT) { - ret =3D i2c_dw_handle_tx_abort(dev); - goto done; - } + if (dev->cmd_err =3D=3D DW_IC_ERR_TX_ABRT) + return i2c_dw_handle_tx_abort(dev); =20 if (dev->status) dev_err(dev->dev, "transfer terminated early - interrupt latency too high?\n"); =20 - ret =3D -EIO; + return -EIO; +} + +/* + * Verify that the message at index @idx can be processed as part + * of a single transaction. The @msgs array contains the messages + * of the transaction. The message is checked against its predecessor + * to ensure that it respects the limitation of the controller. + */ +static bool +i2c_dw_msg_is_valid(struct dw_i2c_dev *dev, const struct i2c_msg *msgs, si= ze_t idx) +{ + /* + * The first message of a transaction is valid, + * no constraint from a previous message. + */ + if (!idx) + return true; + + /* + * We cannot change the target address during a transaction, so make + * sure the address is identical to the one of the previous message. + */ + if (msgs[idx - 1].addr !=3D msgs[idx].addr) { + dev_err(dev->dev, "invalid target address\n"); + return false; + } + + return true; +} + +static int +i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) +{ + struct dw_i2c_dev *dev =3D i2c_get_adapdata(adap); + struct i2c_msg *msgs_part; + size_t cnt; + int ret; + + dev_dbg(dev->dev, "msgs: %d\n", num); + + pm_runtime_get_sync(dev->dev); + + ret =3D i2c_dw_acquire_lock(dev); + if (ret) + goto done_nolock; + + /* + * If the I2C_M_STOP is present in some the messages, + * we do one transaction for each part up to the STOP. + */ + for (msgs_part =3D msgs; msgs_part < msgs + num; msgs_part +=3D cnt) { + /* + * Count the messages in a transaction, up to a STOP + * or the end of the msgs. + */ + for (cnt =3D 1; ; cnt++) { + if (!i2c_dw_msg_is_valid(dev, msgs_part, cnt - 1)) { + ret =3D -EINVAL; + goto done; + } + + if ((msgs_part[cnt - 1].flags & I2C_M_STOP) || + (msgs_part + cnt =3D=3D msgs + num)) + break; + } + + /* transfer one part up to a STOP */ + ret =3D __i2c_dw_xfer_one_part(dev, msgs_part, cnt); + if (ret < 0) + break; + } =20 done: i2c_dw_release_lock(dev); @@ -905,7 +950,9 @@ i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg ms= gs[], int num) done_nolock: pm_runtime_put_autosuspend(dev->dev); =20 - return ret; + if (ret < 0) + return ret; + return num; } =20 static const struct i2c_algorithm i2c_dw_algo =3D { @@ -928,6 +975,9 @@ void i2c_dw_configure_master(struct dw_i2c_dev *dev) =20 dev->functionality =3D I2C_FUNC_10BIT_ADDR | DW_IC_DEFAULT_FUNCTIONALITY; =20 + if ((dev->flags & MODEL_MASK) !=3D MODEL_AMD_NAVI_GPU) + dev->functionality |=3D I2C_FUNC_PROTOCOL_MANGLING; + dev->master_cfg =3D DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE | DW_IC_CON_RESTART_EN; =20 --=20 2.52.0 From nobody Sun Feb 8 20:34:17 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1DFED3D7D87 for ; Tue, 20 Jan 2026 09:28:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768901311; cv=none; b=ttpw40Lm4WNNaK+k4TqvOXr9No3IOhkL7at8iqXE7pL5JCNEwA70mNqj6HlE5pqGoOGcBCH6cTsOXV3honFHqWfETBQys+SHy6ryyb30jVDn2MP9z4F/5wFJJ0E5z0o2uEejggUFqxPM94pH4L++JO1PQZpomYHKA8p98yeh96s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768901311; c=relaxed/simple; bh=PVjM2PNzXGXwoYiSLYJT3sWx9HO/aEYFc1+gwEBuGe4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260120-i2c-dw-v5-5-0e34d6d9455c@bootlin.com> References: <20260120-i2c-dw-v5-0-0e34d6d9455c@bootlin.com> In-Reply-To: <20260120-i2c-dw-v5-0-0e34d6d9455c@bootlin.com> To: Andi Shyti , Mika Westerberg , Andy Shevchenko , Jan Dabros , Sebastian Andrzej Siewior , Clark Williams , Steven Rostedt Cc: Thomas Petazzoni , Gregory CLEMENT , =?utf-8?q?Th=C3=A9o_Lebrun?= , Tawfik Bayouk , Vladimir Kondratiev , Dmitry Guzman , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, =?utf-8?q?Beno=C3=AEt_Monin?= X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Simplify runtime PM handling in i2c_dw_xfer() by using the pm_runtime_active_auto_try guard. This adds the proper handling for runtime PM resume errors and allows us to get rid of the done and done_nolock labels. Signed-off-by: Beno=C3=AEt Monin Reviewed-by: Andy Shevchenko Acked-by: Mika Westerberg --- drivers/i2c/busses/i2c-designware-master.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/i2c/busses/i2c-designware-master.c b/drivers/i2c/busse= s/i2c-designware-master.c index a0ff0e2db065..ebebd8e0409c 100644 --- a/drivers/i2c/busses/i2c-designware-master.c +++ b/drivers/i2c/busses/i2c-designware-master.c @@ -912,11 +912,13 @@ i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg = *msgs, int num) =20 dev_dbg(dev->dev, "msgs: %d\n", num); =20 - pm_runtime_get_sync(dev->dev); + ACQUIRE(pm_runtime_active_auto_try, pm)(dev->dev); + if (ACQUIRE_ERR(pm_runtime_active_auto_try, &pm)) + return -ENXIO; =20 ret =3D i2c_dw_acquire_lock(dev); if (ret) - goto done_nolock; + return ret; =20 /* * If the I2C_M_STOP is present in some the messages, @@ -930,13 +932,15 @@ i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg = *msgs, int num) for (cnt =3D 1; ; cnt++) { if (!i2c_dw_msg_is_valid(dev, msgs_part, cnt - 1)) { ret =3D -EINVAL; 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Tue, 20 Jan 2026 09:28:02 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 13AE9606AB; Tue, 20 Jan 2026 09:28:29 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id D984210B6B33E; Tue, 20 Jan 2026 10:28:26 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1768901308; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=H05iW0kzIWEOui1ZiKX8TzTjaxK0Vd5WNaHAzBzB53I=; b=eIRWKPHy4GwABI4jjUZTCJJAhLEGtM9T/jQXeHU+qXYl7JuUDUlNltdRzYVBFCrqfxhYTe cAl3K/+cTu3QodFUELXkuQ/d8l9oHZFG9y0XkiW3yPio6Fdn2R1O51Tld1PVHkegkRcOl9 nsnrn6Oy53ZEFQLRlG8Hu7vLRVw9R35FCYWJ4TgFnMrtjnverMA3Xl+cCwLcgO3lDAu7CO HaPUqHcIyE3SheY3fnmGxeIE+11GWFDKJXzD3VekWueTdfD9bWJTFypLU2iwCT3bDim6+E uAGG7Zso4NgZpXWM3xN1ulkge7YcczJSbZVsjisYZ1tE6iDQyhZmhL9JafE/mw== From: =?utf-8?q?Beno=C3=AEt_Monin?= Date: Tue, 20 Jan 2026 10:28:06 +0100 Subject: [PATCH v5 6/6] i2c: designware: Support of controller with IC_EMPTYFIFO_HOLD_MASTER disabled Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260120-i2c-dw-v5-6-0e34d6d9455c@bootlin.com> References: <20260120-i2c-dw-v5-0-0e34d6d9455c@bootlin.com> In-Reply-To: <20260120-i2c-dw-v5-0-0e34d6d9455c@bootlin.com> To: Andi Shyti , Mika Westerberg , Andy Shevchenko , Jan Dabros , Sebastian Andrzej Siewior , Clark Williams , Steven Rostedt Cc: Thomas Petazzoni , Gregory CLEMENT , =?utf-8?q?Th=C3=A9o_Lebrun?= , Tawfik Bayouk , Vladimir Kondratiev , Dmitry Guzman , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, =?utf-8?q?Beno=C3=AEt_Monin?= X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 If IC_EMPTYFIFO_HOLD_MASTER_EN parameter is 0, "Stop" and "Repeated Start" bits in command register does not exist, thus it is impossible to send several consecutive write messages in a single hardware batch. The existing implementation worked with such configuration incorrectly: all consecutive write messages are joined into a single message without any Start/Stop or Repeated Start conditions. For example, the following command: i2ctransfer -y 0 w1@0x55 0x00 w1@0x55 0x01 does the same as i2ctransfer -y 0 w2@0x55 0x00 0x01 In i2c_dw_msg_is_valid(), we ensure that we do not have such sequence of messages requiring a RESTART, aborting the transfer on controller that cannot emit them explicitly. This behavior is activated by compatible entries because the state of the IC_EMPTYFIFO_HOLD_MASTER_EN parameter cannot be detected at runtime. The new flag emptyfifo_hold_master reflects the state of the parameter, it is set to true for all controllers except those found in Mobileye SoCs. For now, the controllers in Mobileye SoCs are the only ones known to need the workaround. The behavior of the driver is left unmodified for other controllers. There is another possible problem with this controller configuration: When the CPU is putting commands to the FIFO, this process must not be interrupted because if FIFO buffer gets empty, the controller finishes the I2C transaction and generates STOP condition on the bus. If we continue writing the remainder of the message to the FIFO, the controller will start emitting a new transaction with those data. This turns a single a single message into multiple I2C transactions. To protect against FIFO underrun, two changes are done: First we flag the interrupt with IRQF_NO_THREAD, to prevent it from running in a thread on PREEMPT-RT kernel. This ensures that we are not interrupted when filling the FIFO as it is very time-senstive. For example, being preempted after writing a single byte in the FIFO with a 1MHz bus gives us only 18=C2=B5s before an underrun. Second in i2c_dw_process_transfer(), we abort if a STOP is detected while a read or a write is in progress. This can occur when processing a message larger than the FIFO. In that case the message is processed in parts, and rely on the TX EMPTY interrupt to refill the FIFO when it gets below a threshold. If servicing this interrupt is delayed for too long, it can trigger a FIFO underrun, thus an unwanted STOP. Originally-by: Dmitry Guzman Signed-off-by: Beno=C3=AEt Monin Acked-by: Mika Westerberg --- drivers/i2c/busses/i2c-designware-common.c | 6 ++++++ drivers/i2c/busses/i2c-designware-core.h | 3 +++ drivers/i2c/busses/i2c-designware-master.c | 32 +++++++++++++++++++++++++= ++++ drivers/i2c/busses/i2c-designware-platdrv.c | 1 + 4 files changed, 42 insertions(+) diff --git a/drivers/i2c/busses/i2c-designware-common.c b/drivers/i2c/busse= s/i2c-designware-common.c index 5b1e8f74c4ac..446d567eafeb 100644 --- a/drivers/i2c/busses/i2c-designware-common.c +++ b/drivers/i2c/busses/i2c-designware-common.c @@ -388,6 +388,12 @@ int i2c_dw_fw_parse_and_configure(struct dw_i2c_dev *d= ev) =20 dev->clk_freq_optimized =3D device_property_read_bool(device, "snps,clk-f= req-optimized"); =20 + /* Mobileye controllers do not hold the clock on empty FIFO */ + if (device_is_compatible(device, "mobileye,eyeq6lplus-i2c")) + dev->emptyfifo_hold_master =3D false; + else + dev->emptyfifo_hold_master =3D true; + i2c_dw_adjust_bus_speed(dev); =20 if (is_of_node(fwnode)) diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/= i2c-designware-core.h index bb5ce0a382f9..215b6161f242 100644 --- a/drivers/i2c/busses/i2c-designware-core.h +++ b/drivers/i2c/busses/i2c-designware-core.h @@ -247,6 +247,8 @@ struct reset_control; * @clk_freq_optimized: if this value is true, it means the hardware reduc= es * its internal clock frequency by reducing the internal latency required * to generate the high period and low period of SCL line. + * @emptyfifo_hold_master: true if the controller acting as master holds + * the clock when the Tx FIFO is empty instead of emitting a stop. * * HCNT and LCNT parameters can be used if the platform knows more accurate * values than the one computed based only on the input clock frequency. @@ -306,6 +308,7 @@ struct dw_i2c_dev { struct i2c_bus_recovery_info rinfo; u32 bus_capacitance_pF; bool clk_freq_optimized; + bool emptyfifo_hold_master; }; =20 #define ACCESS_INTR_MASK BIT(0) diff --git a/drivers/i2c/busses/i2c-designware-master.c b/drivers/i2c/busse= s/i2c-designware-master.c index ebebd8e0409c..ac4fbb6aa6ab 100644 --- a/drivers/i2c/busses/i2c-designware-master.c +++ b/drivers/i2c/busses/i2c-designware-master.c @@ -717,6 +717,14 @@ static void i2c_dw_process_transfer(struct dw_i2c_dev = *dev, unsigned int stat) if (stat & DW_IC_INTR_TX_EMPTY) i2c_dw_xfer_msg(dev); =20 + /* Abort if we detect a STOP in the middle of a read or a write */ + if ((stat & DW_IC_INTR_STOP_DET) && + (dev->status & (STATUS_READ_IN_PROGRESS | STATUS_WRITE_IN_PROGRESS)))= { + dev_err(dev->dev, "spurious STOP detected\n"); + dev->rx_outstanding =3D 0; + dev->msg_err =3D -EIO; + } + /* * No need to modify or disable the interrupt mask here. * i2c_dw_xfer_msg() will take care of it according to @@ -899,6 +907,16 @@ i2c_dw_msg_is_valid(struct dw_i2c_dev *dev, const stru= ct i2c_msg *msgs, size_t i return false; } =20 + /* + * Make sure we don't need explicit RESTART between two messages + * in the same direction for controllers that cannot emit them. + */ + if (!dev->emptyfifo_hold_master && + (msgs[idx - 1].flags & I2C_M_RD) =3D=3D (msgs[idx].flags & I2C_M_RD))= { + dev_err(dev->dev, "cannot emit RESTART\n"); + return false; + } + return true; } =20 @@ -1117,6 +1135,20 @@ int i2c_dw_probe_master(struct dw_i2c_dev *dev) irq_flags =3D IRQF_SHARED | IRQF_COND_SUSPEND; } =20 + /* + * The first writing to TX FIFO buffer causes transmission start. + * If IC_EMPTYFIFO_HOLD_MASTER_EN is not set, when TX FIFO gets + * empty, I2C controller finishes the transaction. If writing to + * FIFO is interrupted, FIFO can get empty and the transaction will + * be finished prematurely. FIFO buffer is filled in IRQ handler, + * but in PREEMPT_RT kernel IRQ handler by default is executed + * in thread that can be preempted with another higher priority + * thread or an interrupt. So, IRQF_NO_THREAD flag is required in + * order to prevent any preemption when filling the FIFO. + */ + if (!dev->emptyfifo_hold_master) + irq_flags |=3D IRQF_NO_THREAD; + ret =3D i2c_dw_acquire_lock(dev); if (ret) return ret; diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/buss= es/i2c-designware-platdrv.c index 077b34535ec7..0fe6f10a14c0 100644 --- a/drivers/i2c/busses/i2c-designware-platdrv.c +++ b/drivers/i2c/busses/i2c-designware-platdrv.c @@ -335,6 +335,7 @@ static void dw_i2c_plat_remove(struct platform_device *= pdev) =20 static const struct of_device_id dw_i2c_of_match[] =3D { { .compatible =3D "baikal,bt1-sys-i2c", .data =3D (void *)MODEL_BAIKAL_BT= 1 }, + { .compatible =3D "mobileye,eyeq6lplus-i2c" }, { .compatible =3D "mscc,ocelot-i2c", .data =3D (void *)MODEL_MSCC_OCELOT = }, { .compatible =3D "snps,designware-i2c" }, {} --=20 2.52.0