From nobody Mon Feb 9 10:32:51 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.16]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3D115283C89 for ; Mon, 19 Jan 2026 19:50:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.16 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768852256; cv=none; b=JOvy1GsDRSvizY+4ETsiTEFPIwoyCffLO9t4Ri1eJ5OBSQakaVpRGFCLuMzcxeMMd2GcE+m6ECWR/Q0+PRt5oRYq28ZMvJfT5xL7692dpss3EqpqxLBiKYM5XgurWD1VW6C4gQsXVHyn0wuSCbkH1ls5KP7N3gC9n+rv/vGo10o= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768852256; c=relaxed/simple; bh=js/tbUrWHL1+HK8ri0RL7x8munS7AvU/zHUUf643g/8=; h=Subject:To:Cc:From:Date:References:In-Reply-To:Message-Id; b=LfeV979vxTDcpdAnsEeaRtUTbVGAZdbO06CZHdeB6E5LJVRr6OxUjjWwQH2D+POsOzqjKv7SR+vS/0h2MqOszDp6CnzGg35hcFporSvEb7I0QwQWUEp9N9Osk+1cWkuzjd5K1HsY4bgrHvStruxF10SG1l1UeF6epekTHKe2a+Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=ZFkghx8h; arc=none smtp.client-ip=192.198.163.16 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="ZFkghx8h" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1768852255; x=1800388255; h=subject:to:cc:from:date:references:in-reply-to: message-id; bh=js/tbUrWHL1+HK8ri0RL7x8munS7AvU/zHUUf643g/8=; b=ZFkghx8hhbngnpoYO48IFb0Q68rsj3qTD52eFbuUFMqLo4EXNcE8XaCO Wbq4E3ICwkZolx2w1pr3eIYIBuDAHRVOEHmVdeFpLpXnYDONdzJ4dH1dr dMbD1JJIYOZL00nn9SzHeQAa0iBqrW+UFyWugccYxZHMcthFjswb3Q8NW Z52ztEVgwSUZYkEM+ZG51frmKZYokAdwGTwak7fnyc2U9jpPdbVk4P67X kPFKjYEfuc46mVYUr+V5ttpi26itw1GJKZV0T3c95Fvb7mq0fcXWsimuG kzzAcRsnInXp/T/GCLrnAQ0E46MCvn7nsrBFO8psiqqEVVbRPWWZRKsfK w==; X-CSE-ConnectionGUID: OB17eZn6QnWuF6VndshgXA== X-CSE-MsgGUID: wbai5N7gS1WILeCbeAJWLg== X-IronPort-AV: E=McAfee;i="6800,10657,11676"; a="57623072" X-IronPort-AV: E=Sophos;i="6.21,238,1763452800"; d="scan'208";a="57623072" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by fmvoesa110.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Jan 2026 11:50:55 -0800 X-CSE-ConnectionGUID: Gj3aadFLTzGKE83a7RyF+A== X-CSE-MsgGUID: 5DapstgWT1e1UK1e6L26Xw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,238,1763452800"; d="scan'208";a="210786572" Received: from davehans-spike.ostc.intel.com (HELO localhost.localdomain) ([10.165.164.11]) by fmviesa004.fm.intel.com with ESMTP; 19 Jan 2026 11:50:54 -0800 Subject: [PATCH 3/6] x86/microcode: Refactor platform ID enumeration into a helper To: linux-kernel@vger.kernel.org Cc: sohil.mehta@intel.com, Dave Hansen , Borislav Petkov , "H. Peter Anvin" , Ingo Molnar , Jon Kohler , Pawan Gupta , "Peter Zijlstra (Intel)" , Thomas Gleixner , Tony Luck , x86@kernel.org From: Dave Hansen Date: Mon, 19 Jan 2026 11:50:53 -0800 References: <20260119195047.86E3C696@davehans-spike.ostc.intel.com> In-Reply-To: <20260119195047.86E3C696@davehans-spike.ostc.intel.com> Message-Id: <20260119195053.E0850F99@davehans-spike.ostc.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Dave Hansen The only code that cares about the platform ID is the microcode update code itself. To facilitate storing the platform ID in a more generic place and using it outside of the microcode update itself, put the enumeration into a helper function in a header. Mirror intel_get_microcode_revision()'s naming and location. But, moving away from intel_collect_cpu_info() means that the model and family information in CPUID is not readily available. Just call CPUID again. Signed-off-by: Dave Hansen Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Borislav Petkov Cc: Dave Hansen Cc: "H. Peter Anvin" Cc: Tony Luck Cc: Pawan Gupta Cc: "Peter Zijlstra (Intel)" Cc: x86@kernel.org Cc: Jon Kohler --- b/arch/x86/include/asm/microcode.h | 31 +++++++++++++++++++++++++++= ++++ b/arch/x86/kernel/cpu/microcode/intel.c | 10 +--------- 2 files changed, 32 insertions(+), 9 deletions(-) diff -puN arch/x86/include/asm/microcode.h~refactor-get-processor-flags arc= h/x86/include/asm/microcode.h --- a/arch/x86/include/asm/microcode.h~refactor-get-processor-flags 2026-01= -19 11:38:08.775892390 -0800 +++ b/arch/x86/include/asm/microcode.h 2026-01-19 11:38:08.783892696 -0800 @@ -2,7 +2,9 @@ #ifndef _ASM_X86_MICROCODE_H #define _ASM_X86_MICROCODE_H =20 +#include #include +#include =20 struct cpu_signature { unsigned int sig; @@ -75,6 +77,35 @@ static inline u32 intel_get_microcode_re =20 return rev; } + +/* + * Use CPUID to generate a "vfm" value. Useful + * before 'cpuinfo_x86' structures are populated. + */ +static inline u32 intel_cpuid_vfm(void) +{ + u32 eax =3D cpuid_eax(1); + u32 fam =3D x86_family(eax); + u32 model =3D x86_model(eax); + + return IFM(fam, model); +} + +static inline u32 intel_get_platform_id(void) +{ + unsigned int val[2]; + + /* + * This can be called early. Use CPUID directly to + * generate the VFM value for this CPU. + */ + if (intel_cpuid_vfm() < INTEL_PENTIUM_III_DESCHUTES) + return 0; + + /* get processor flags from MSR 0x17 */ + native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]); + return 1 << ((val[1] >> 18) & 7); +} #endif /* !CONFIG_CPU_SUP_INTEL */ =20 bool microcode_nmi_handler(void); diff -puN arch/x86/kernel/cpu/microcode/intel.c~refactor-get-processor-flag= s arch/x86/kernel/cpu/microcode/intel.c --- a/arch/x86/kernel/cpu/microcode/intel.c~refactor-get-processor-flags 20= 26-01-19 11:38:08.780892582 -0800 +++ b/arch/x86/kernel/cpu/microcode/intel.c 2026-01-19 11:38:08.783892696 -= 0800 @@ -123,16 +123,8 @@ static inline unsigned int exttable_size void intel_collect_cpu_info(struct cpu_signature *sig) { sig->sig =3D cpuid_eax(1); - sig->pf =3D 0; sig->rev =3D intel_get_microcode_revision(); - - if (IFM(x86_family(sig->sig), x86_model(sig->sig)) >=3D INTEL_PENTIUM_III= _DESCHUTES) { - unsigned int val[2]; - - /* get processor flags from MSR 0x17 */ - native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]); - sig->pf =3D 1 << ((val[1] >> 18) & 7); - } + sig->pf =3D intel_get_platform_id(); } EXPORT_SYMBOL_GPL(intel_collect_cpu_info); =20 _