From nobody Tue Feb 10 01:31:20 2026 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [185.203.201.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 573D236C5A5 for ; Mon, 19 Jan 2026 18:24:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.203.201.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768847076; cv=none; b=R7scPPJghmT9DOVlSD9SQ2IDV94dD526DOFxhy4TJLnXg5DW3pEqfgVHc5l4xPwDbluM+LR3nlebpRoVZGK0R4KxcWWqDuUgJnjj5yqVLVqf64dj8PGbl+AUV7cRkTRZ2ufO48VcdGxYVxOeVZs+3MZoP8pkdXBDAqowFTzCci8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768847076; c=relaxed/simple; bh=WTzdsTpYNInqLGPOOUqeJAkoZ9UkVda5LqW9qOOCN/0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Zgi5Jyu8Wz1kfeT0ijN2tXq2eFq1XGCjKtthR+fHjLDc5Oa//GScK8Y68236/ka/VSqPFanLOcojxfu4K+q6fXuvavbp7o/BQzKgNjMJe63xqwY9EKG0dFF0DEndWZHe/yWKKCeezrmaYYy3o/aSQguJd2oei6zPXyug/xpxsLI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de; spf=pass smtp.mailfrom=pengutronix.de; arc=none smtp.client-ip=185.203.201.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pengutronix.de Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.whiteo.stw.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1vhtvO-0004SP-7e; Mon, 19 Jan 2026 19:24:26 +0100 Received: from dude04.red.stw.pengutronix.de ([2a0a:edc0:0:1101:1d::ac] helo=dude04) by drehscheibe.grey.stw.pengutronix.de with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1vhtvO-001SUl-1L; Mon, 19 Jan 2026 19:24:25 +0100 Received: from ore by dude04 with local (Exim 4.98.2) (envelope-from ) id 1vhtvN-00000006y29-2gQi; Mon, 19 Jan 2026 19:24:25 +0100 From: Oleksij Rempel To: Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Oleksij Rempel , kernel@pengutronix.de, linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, Andy Shevchenko , David Lechner , =?UTF-8?q?Nuno=20S=C3=A1?= , David Jander Subject: [PATCH v1 5/8] iio: dac: ds4424: add Rfs-based scale and per-variant limits Date: Mon, 19 Jan 2026 19:24:21 +0100 Message-ID: <20260119182424.1660601-6-o.rempel@pengutronix.de> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260119182424.1660601-1-o.rempel@pengutronix.de> References: <20260119182424.1660601-1-o.rempel@pengutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: ore@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Parse optional maxim,rfs-ohms values to derive the per-channel output current scale (mA per step) for the IIO current ABI. Select per-variant parameters to match the shared register map while handling different data widths and full-scale current calculations. Behavior changes: - If maxim,rfs-ohms is present, IIO_CHAN_INFO_SCALE becomes available and reports mA/step derived from Rfs. - If maxim,rfs-ohms is missing, SCALE is not exposed to keep older DTs working without requiring updates. - RAW writes are now limited to the representable sign-magnitude range of the detected variant to avoid silent truncation (e.g. +/-31 on DS440x). Signed-off-by: Oleksij Rempel --- drivers/iio/dac/ds4424.c | 137 +++++++++++++++++++++++++++++++++++++-- 1 file changed, 132 insertions(+), 5 deletions(-) diff --git a/drivers/iio/dac/ds4424.c b/drivers/iio/dac/ds4424.c index 9c24c37d3c42..a0c60eb89717 100644 --- a/drivers/iio/dac/ds4424.c +++ b/drivers/iio/dac/ds4424.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include @@ -54,12 +55,41 @@ enum ds4424_device_ids { ID_DS4424, }; =20 +/* + * Two variant groups share the same register map but differ in: + * - resolution/data mask (DS4402/DS4404: 5-bit, DS4422/DS4424: 7-bit) + * - full-scale current calculation (different Vref and divider) + * Addressing also differs (DS440x tri-level, DS442x bi-level), but is + * handled via board configuration, not driver logic. + */ +struct ds4424_chip_info { + u8 result_mask; + int vref_mv; + int scale_denom; +}; + +static const struct ds4424_chip_info ds4424_info =3D { + .result_mask =3D 0x7F, + .vref_mv =3D 976, + .scale_denom =3D 16, +}; + +/* DS4402 is handled like DS4404 (same resolution and scale formula). */ +static const struct ds4424_chip_info ds4404_info =3D { + .result_mask =3D 0x1F, + .vref_mv =3D 1230, + .scale_denom =3D 4, +}; + struct ds4424_data { struct i2c_client *client; struct mutex lock; uint8_t save[DS4424_MAX_DAC_CHANNELS]; struct regulator *vcc_reg; uint8_t raw[DS4424_MAX_DAC_CHANNELS]; + const struct ds4424_chip_info *chip_info; + u32 rfs_ohms[DS4424_MAX_DAC_CHANNELS]; + bool has_rfs; }; =20 static const struct iio_chan_spec ds4424_channels[] =3D { @@ -111,6 +141,7 @@ static int ds4424_read_raw(struct iio_dev *indio_dev, int *val, int *val2, long mask) { union ds4424_raw_data raw; + struct ds4424_data *data =3D iio_priv(indio_dev); int ret; =20 switch (mask) { @@ -122,10 +153,19 @@ static int ds4424_read_raw(struct iio_dev *indio_dev, return ret; } raw.bits =3D *val; - *val =3D raw.dx; + *val =3D raw.dx & data->chip_info->result_mask; if (raw.source_bit =3D=3D DS4424_SINK_I) *val =3D -*val; return IIO_VAL_INT; + case IIO_CHAN_INFO_SCALE: + if (!data->has_rfs) + return -EINVAL; + + /* SCALE is mA/step: mV / Ohm =3D mA. */ + *val =3D data->chip_info->vref_mv; + *val2 =3D data->rfs_ohms[chan->channel] * + data->chip_info->scale_denom; + return IIO_VAL_FRACTIONAL; =20 default: return -EINVAL; @@ -136,6 +176,8 @@ static int ds4424_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int val, int val2, long mask) { + struct ds4424_data *data =3D iio_priv(indio_dev); + int max_val =3D data->chip_info->result_mask; union ds4424_raw_data raw; =20 if (val2 !=3D 0) @@ -143,7 +185,12 @@ static int ds4424_write_raw(struct iio_dev *indio_dev, =20 switch (mask) { case IIO_CHAN_INFO_RAW: - if (val <=3D S8_MIN || val > S8_MAX) + /* + * The hardware uses sign-magnitude representation (not + * two's complement). Therefore, the range is symmetric: + * [-max_val, +max_val]. + */ + if (val < -max_val || val > max_val) return -EINVAL; =20 if (val > 0) { @@ -173,6 +220,74 @@ static int ds4424_verify_chip(struct iio_dev *indio_de= v) return ret; } =20 +static int ds4424_setup_channels(struct i2c_client *client, + struct ds4424_data *data, + struct iio_dev *indio_dev) +{ + struct iio_chan_spec channels[DS4424_MAX_DAC_CHANNELS]; + size_t channels_size; + int i; + + channels_size =3D indio_dev->num_channels * sizeof(*channels); + memcpy(channels, ds4424_channels, channels_size); + + /* Enable scale only when rfs is available. */ + if (data->has_rfs) { + for (i =3D 0; i < indio_dev->num_channels; i++) + channels[i].info_mask_separate |=3D + BIT(IIO_CHAN_INFO_SCALE); + } + + indio_dev->channels =3D devm_kmemdup(&client->dev, channels, + channels_size, GFP_KERNEL); + if (!indio_dev->channels) + return -ENOMEM; + + return 0; +} + +static int ds4424_parse_rfs(struct i2c_client *client, + struct ds4424_data *data, + struct iio_dev *indio_dev) +{ + int count, i, ret; + + if (!device_property_present(&client->dev, "maxim,rfs-ohms")) { + dev_info_once(&client->dev, "maxim,rfs-ohms missing, scale not supported= \n"); + return 0; + } + + count =3D device_property_count_u32(&client->dev, "maxim,rfs-ohms"); + if (count !=3D indio_dev->num_channels) { + dev_err(&client->dev, + "maxim,rfs-ohms must have %u entries\n", + indio_dev->num_channels); + return -EINVAL; + } + + ret =3D device_property_read_u32_array(&client->dev, + "maxim,rfs-ohms", + data->rfs_ohms, + indio_dev->num_channels); + if (ret) { + dev_err(&client->dev, + "Failed to read maxim,rfs-ohms property\n"); + return ret; + } + + for (i =3D 0; i < indio_dev->num_channels; i++) { + if (!data->rfs_ohms[i]) { + dev_err(&client->dev, + "maxim,rfs-ohms entry %d is zero\n", + i); + return -EINVAL; + } + } + + data->has_rfs =3D true; + return 0; +} + static int ds4424_suspend(struct device *dev) { struct i2c_client *client =3D to_i2c_client(dev); @@ -210,7 +325,7 @@ static int ds4424_resume(struct device *dev) =20 static DEFINE_SIMPLE_DEV_PM_OPS(ds4424_pm_ops, ds4424_suspend, ds4424_resu= me); =20 -static const struct iio_info ds4424_info =3D { +static const struct iio_info ds4424_iio_info =3D { .read_raw =3D ds4424_read_raw, .write_raw =3D ds4424_write_raw, }; @@ -252,15 +367,20 @@ static int ds4424_probe(struct i2c_client *client) switch (id->driver_data) { case ID_DS4402: indio_dev->num_channels =3D DS4422_MAX_DAC_CHANNELS; + /* See ds4404_info comment above. */ + data->chip_info =3D &ds4404_info; break; case ID_DS4404: indio_dev->num_channels =3D DS4424_MAX_DAC_CHANNELS; + data->chip_info =3D &ds4404_info; break; case ID_DS4422: indio_dev->num_channels =3D DS4422_MAX_DAC_CHANNELS; + data->chip_info =3D &ds4424_info; break; case ID_DS4424: indio_dev->num_channels =3D DS4424_MAX_DAC_CHANNELS; + data->chip_info =3D &ds4424_info; break; default: dev_err(&client->dev, @@ -269,9 +389,16 @@ static int ds4424_probe(struct i2c_client *client) goto fail; } =20 - indio_dev->channels =3D ds4424_channels; + ret =3D ds4424_parse_rfs(client, data, indio_dev); + if (ret) + goto fail; + + ret =3D ds4424_setup_channels(client, data, indio_dev); + if (ret) + goto fail; + indio_dev->modes =3D INDIO_DIRECT_MODE; - indio_dev->info =3D &ds4424_info; + indio_dev->info =3D &ds4424_iio_info; =20 ret =3D iio_device_register(indio_dev); if (ret < 0) { --=20 2.47.3