From nobody Sun Feb 8 23:42:17 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5FDB3246782 for ; Sun, 18 Jan 2026 18:14:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768760058; cv=none; b=I3MVVy6EULKueDdofgTTresg8e4ycaI+kp5m8GffuUuPy7qrQAhA2LlvHov41/GdFGRTbCa+jflWcV+vicuJBfnM+UbBG7OIXWR2aXjC76pz2fgvw0dNUnGREmiI1S9mYBebflHQM8lV15/Py34jkeUZh7N316TpHaMPgJDG9OU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768760058; c=relaxed/simple; bh=vkcDznwWj/qjFMBulKmjQOCoF8Ar2DR3hx4Aku8xDU0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Dk1IeDkrLVs6igkXgjXxpchRRMRj+uby6tqN0tLZ6+PZdJltf5NxsqwXPPuCxoK1HhsNvr1EjffHVmFOnQdlJsF43gqFR29856+yvkw0sjBFWUWyF96HtkSeUyiHJiZJamvLSuAbbVQkjH7D4ao33KPDQh9cyyy++bhivT1eRAk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=EzN+2k4N; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=DLbf2Pms; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="EzN+2k4N"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="DLbf2Pms" Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 60IHNstQ2915997 for ; Sun, 18 Jan 2026 18:14:16 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=qcppdkim1; bh=67t6RAhLzyt rgRuVauxjrKxLIpAZrpKmZdGn8t+btIA=; b=EzN+2k4NrM7LuXrWo7G1bUIbumD OTNAK1l+TrY4gyVn7XnIgQyU6eyUGdOGjlFjAIfHm6sBAITz/2HEUTI99W8gWt/r B8ZmG4egbpUH/U7hy5A6xnxplPWDsLrfJVnZ8C5utr+ktLXkrtfIZN55IqC5vg5n JY0pWIUNo23UDKTY5IY6A2kEAx71yWE7ZI5stIsu1FUTEdSFBn77123+rZnbRrBu ueX7ztwOcBiuiO/dzRGkqOofKnm+Id2r4CgAE8HN4NJ19vHlx5hoDB1FbpNMAqVU gSlWjTLdG55FQBiXMu7HWOrYANMCnS1qb9l/GkHQdHaBUJKdripqciSWV1w== Received: from mail-pf1-f199.google.com (mail-pf1-f199.google.com [209.85.210.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4br3q9an3m-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Sun, 18 Jan 2026 18:14:16 +0000 (GMT) Received: by mail-pf1-f199.google.com with SMTP id d2e1a72fcca58-81f2481ab87so2341580b3a.0 for ; Sun, 18 Jan 2026 10:14:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1768760056; x=1769364856; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=67t6RAhLzytrgRuVauxjrKxLIpAZrpKmZdGn8t+btIA=; b=DLbf2PmsCbMDaYG5Cu79N3Uybj+o+8mjgheKZ+szVELuu9z+snCY6r8s0q/N90dH2b ul9jIn1Nqjb/m3seMtKB7BBp31y5B37F2Xx1Zjn61QILqsScYJaG1UQP/A59ZnX6w+dH ARbgtLMushjLx+iJqoC/3fU3vwpsYCGDiXafYzRWY8Lzi3k7ODn4nXrFcjwND9Xxma5A 1/bo8sSSBw7i1JUP/2YpwQGele6dXwnW+8dKo4BcSbhWyCXSfP7E8abmhd1q9ydC7ru2 TGe2NrNjbPJvB4YxNxo6WkPu7nIIcRvZKrFGZtWG6mZ4KWFHErrdNfZ/fp3gJjZFA8++ wsAg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1768760056; x=1769364856; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=67t6RAhLzytrgRuVauxjrKxLIpAZrpKmZdGn8t+btIA=; b=b8eEJLjZ7UNL3+lo/szJcfkFzwqO2bTjKsve1p5IyI17YKw2WgFhcuX5jwdzCc1vUB kY1pDEU7glM3J1a2wmdrdW8t28PVMXDz7MFGoaAQjTOhQlK2yeLk1cqJlADI643/LR9j AargLPLvcjy1XKl9JqGJJordieu70Stmv5Edb+n1vUykOeFP7bMW7x+Gi1v9PFE4LXmM 0ZP+WyZFjbfV+7+7RjI9lZUqSNzVYhadZoRO8vRwOc8MBJoUzNpwcieSaeLmXCv+1aSS mlGg4vCNOS/9t34wZhLDhrc/Fyv3Axh8W/xOcafVsf3Nxd6FyfK6KYkxTwqUj52IXKrn lxQw== X-Forwarded-Encrypted: i=1; AJvYcCXsoLX7RdjPTTQG7klu2o0FwWe9bN0naW5Nh0TIAQjSI+Ox1o6zfK2vFKO5zgMxsnXRqIeC4XBJC62agcU=@vger.kernel.org X-Gm-Message-State: AOJu0Yyg+gczDX86auB0GEbSgCkwJg8npa60pPfsW7jA8HdLn6V6FW6V IEUbdVZcWm9HAEKbjNn5IqL7fnRiKnsfBdGm18zIW/PS58QOKYixcepl+gPlsEyLv+gjPHrSoks 9wh8AUDiq8yoOOykWzpks6v4xw7r/ColgTOQJbD+mvD8mBqwH31plJo0NuaYoM4ymeFU= X-Gm-Gg: AY/fxX74+7Ob83h1nJP5E1CpWDSWJI8DWZ/d5aCs5kCKWGkq1faK/qpMhIZ4MKJJlhI I1uNP0j6Tf63nWVDRQ9eMELZxb/bQbOMMBK16CXJcc0zy6sBunOypM06yJJlf4+VxbRn6uUF7Ie MNlFYum621KF26YSKTZmGxF4P1z1r0vx8/Epkys/foozEUhQDGbZUJh0vm5by3TS2mKgJTjWFLF SZOzfhqiBsMb5iJ1US8oniSW2m+aXKInmGtqEueeVbVUNQQy2gQDSQ7l3jxg22Q+yRnBnfddVzn 7GkXh1yjpMsEbDMKSOQIqJxEN50Hk6uOpgNePpiRS/lyuEQUKFkgUMpcvLuIrJGOGnUmFP55l8k LUK2jo7BZrulMxoLJVMUVdxEOU6t4V/f5JTbuUmx40zRr X-Received: by 2002:a05:6a00:600b:b0:7e8:4587:e8c5 with SMTP id d2e1a72fcca58-81fa030fc84mr7460181b3a.56.1768760055711; Sun, 18 Jan 2026 10:14:15 -0800 (PST) X-Received: by 2002:a05:6a00:600b:b0:7e8:4587:e8c5 with SMTP id d2e1a72fcca58-81fa030fc84mr7460170b3a.56.1768760055199; Sun, 18 Jan 2026 10:14:15 -0800 (PST) Received: from hu-vjitta-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-81fa1277a15sm7070759b3a.42.2026.01.18.10.14.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 18 Jan 2026 10:14:14 -0800 (PST) From: Vijayanand Jitta To: robin.murphy@arm.com, will@kernel.org, joro@8bytes.org, robh@kernel.org, dmitry.baryshkov@oss.qualcomm.com, konrad.dybcio@oss.qualcomm.com, bjorn.andersson@oss.qualcomm.com, bod@kernel.org, conor+dt@kernel.org, krzk+dt@kernel.org, prakash.gupta@oss.qualcomm.com, vikash.garodia@oss.qualcomm.com Cc: iommu@lists.linux.dev, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, vijayanand.jitta@oss.qualcomm.com, Frank Li Subject: [PATCH v5 1/3] of: Add convenience wrappers for of_map_id() Date: Sun, 18 Jan 2026 23:41:23 +0530 Message-Id: <20260118181125.1436036-2-vijayanand.jitta@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260118181125.1436036-1-vijayanand.jitta@oss.qualcomm.com> References: <20260118181125.1436036-1-vijayanand.jitta@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTE4MDE2MCBTYWx0ZWRfXxkbN4FY2Jvym J7CF2bsEVD+GNceHqbyimwEDhCgnkrumEnsd1xJRtQQxGaD5xgOz0tyt+fXK2kq6XwhikRm+Flv JpcQtZFNtQNXc7Cm8QCLWr8+kRYlxuasLeblYLIbi4jQyLbtf03oKXeY4W3nxuHvDH7EcVcuESU bBzFonHrXGb9w7v2/KCZ2ymud4VReixK53AaPAdsVVu0uL/KOfV7FKP7Hym9v9/KRBUVN3ZeBll jX7eGrfFoZtLQDAwR09sM8uxmY1oqlcMD7A0bC4OW1ad0chwXUzJMVOzG7uhiwduJKYQ2oOoVM7 Tdmo7gedEvLQtgFFPIwvMfrSGofnIm++fCU0e4yeQyoz12mJLoU8ifTJ6301W7l29v5YVJp92y7 g5xIgFXi+uzLuuVTLbMCP/XrNsXFPkTQzTPcSoRoFtBsiC4PXb0pEDNOdvF6YUV1XK/fWzQ6u4v btqoNN1qHrqYs37JoJg== X-Proofpoint-ORIG-GUID: FRMtdAIkzaj1vdAiMaPT_GNj7X4v9nub X-Proofpoint-GUID: FRMtdAIkzaj1vdAiMaPT_GNj7X4v9nub X-Authority-Analysis: v=2.4 cv=dPurWeZb c=1 sm=1 tr=0 ts=696d22f8 cx=c_pps a=WW5sKcV1LcKqjgzy2JUPuA==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=vUbySO9Y5rIA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=7CQSdrXTAAAA:8 a=VwQbUJbxAAAA:8 a=8AirrxEcAAAA:8 a=EUspDBNiAAAA:8 a=wrOk0Nx1w3hKWqktZycA:9 a=OpyuDcXvxspvyRM73sMx:22 a=a-qgeE7W1pNrGK8U0ZQC:22 a=ST-jHhOKWsTCqRlWije3:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2026-01-17_03,2026-01-15_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 clxscore=1015 spamscore=0 phishscore=0 lowpriorityscore=0 priorityscore=1501 suspectscore=0 malwarescore=0 impostorscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2601180160 Content-Type: text/plain; charset="utf-8" From: Robin Murphy Since we now have quite a few users parsing "iommu-map" and "msi-map" properties, give them some wrappers to conveniently encapsulate the appropriate sets of property names. This will also make it easier to then change of_map_id() to correctly account for specifier cells. Reviewed-by: Rob Herring (Arm) Reviewed-by: Frank Li Signed-off-by: Robin Murphy Signed-off-by: Vijayanand Jitta --- drivers/cdx/cdx_msi.c | 3 +-- drivers/iommu/of_iommu.c | 4 +--- drivers/irqchip/irq-gic-its-msi-parent.c | 2 +- drivers/of/irq.c | 3 +-- drivers/pci/controller/dwc/pci-imx6.c | 6 ++---- drivers/pci/controller/pcie-apple.c | 3 +-- drivers/xen/grant-dma-ops.c | 3 +-- include/linux/of.h | 14 ++++++++++++++ 8 files changed, 22 insertions(+), 16 deletions(-) diff --git a/drivers/cdx/cdx_msi.c b/drivers/cdx/cdx_msi.c index 91b95422b263..63b3544ec997 100644 --- a/drivers/cdx/cdx_msi.c +++ b/drivers/cdx/cdx_msi.c @@ -128,8 +128,7 @@ static int cdx_msi_prepare(struct irq_domain *msi_domai= n, int ret; =20 /* Retrieve device ID from requestor ID using parent device */ - ret =3D of_map_id(parent->of_node, cdx_dev->msi_dev_id, "msi-map", "msi-m= ap-mask", - NULL, &dev_id); + ret =3D of_map_msi_id(parent->of_node, cdx_dev->msi_dev_id, NULL, &dev_id= ); if (ret) { dev_err(dev, "of_map_id failed for MSI: %d\n", ret); return ret; diff --git a/drivers/iommu/of_iommu.c b/drivers/iommu/of_iommu.c index 6b989a62def2..a511ecf21fcd 100644 --- a/drivers/iommu/of_iommu.c +++ b/drivers/iommu/of_iommu.c @@ -48,9 +48,7 @@ static int of_iommu_configure_dev_id(struct device_node *= master_np, struct of_phandle_args iommu_spec =3D { .args_count =3D 1 }; int err; =20 - err =3D of_map_id(master_np, *id, "iommu-map", - "iommu-map-mask", &iommu_spec.np, - iommu_spec.args); + err =3D of_map_iommu_id(master_np, *id, &iommu_spec.np, iommu_spec.args); if (err) return err; =20 diff --git a/drivers/irqchip/irq-gic-its-msi-parent.c b/drivers/irqchip/irq= -gic-its-msi-parent.c index 12f45228c867..d5d8fa65c24d 100644 --- a/drivers/irqchip/irq-gic-its-msi-parent.c +++ b/drivers/irqchip/irq-gic-its-msi-parent.c @@ -173,7 +173,7 @@ static int of_pmsi_get_msi_info(struct irq_domain *doma= in, struct device *dev, u =20 struct device_node *msi_ctrl __free(device_node) =3D NULL; =20 - return of_map_id(dev->of_node, dev->id, "msi-map", "msi-map-mask", &msi_c= trl, dev_id); + return of_map_msi_id(dev->of_node, dev->id, &msi_ctrl, dev_id); } =20 int __weak iort_pmsi_get_dev_id(struct device *dev, u32 *dev_id) diff --git a/drivers/of/irq.c b/drivers/of/irq.c index e3816819dbfe..fb50ccb50cfd 100644 --- a/drivers/of/irq.c +++ b/drivers/of/irq.c @@ -747,8 +747,7 @@ u32 of_msi_xlate(struct device *dev, struct device_node= **msi_np, u32 id_in) * "msi-map" or an "msi-parent" property. */ for (parent_dev =3D dev; parent_dev; parent_dev =3D parent_dev->parent) { - if (!of_map_id(parent_dev->of_node, id_in, "msi-map", - "msi-map-mask", msi_np, &id_out)) + if (!of_map_msi_id(parent_dev->of_node, id_in, msi_np, &id_out)) break; if (!of_check_msi_parent(parent_dev->of_node, msi_np)) break; diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller= /dwc/pci-imx6.c index 1d8677d7de04..c3e5cb3cb846 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -1143,8 +1143,7 @@ static int imx_pcie_add_lut_by_rid(struct imx_pcie *i= mx_pcie, u32 rid) u32 sid =3D 0; =20 target =3D NULL; - err_i =3D of_map_id(dev->of_node, rid, "iommu-map", "iommu-map-mask", - &target, &sid_i); + err_i =3D of_map_iommu_id(dev->of_node, rid, &target, &sid_i); if (target) { of_node_put(target); } else { @@ -1157,8 +1156,7 @@ static int imx_pcie_add_lut_by_rid(struct imx_pcie *i= mx_pcie, u32 rid) } =20 target =3D NULL; - err_m =3D of_map_id(dev->of_node, rid, "msi-map", "msi-map-mask", - &target, &sid_m); + err_m =3D of_map_msi_id(dev->of_node, rid, &target, &sid_m); =20 /* * err_m target diff --git a/drivers/pci/controller/pcie-apple.c b/drivers/pci/controller/p= cie-apple.c index 2d92fc79f6dd..a0937b7b3c4d 100644 --- a/drivers/pci/controller/pcie-apple.c +++ b/drivers/pci/controller/pcie-apple.c @@ -764,8 +764,7 @@ static int apple_pcie_enable_device(struct pci_host_bri= dge *bridge, struct pci_d dev_dbg(&pdev->dev, "added to bus %s, index %d\n", pci_name(pdev->bus->self), port->idx); =20 - err =3D of_map_id(port->pcie->dev->of_node, rid, "iommu-map", - "iommu-map-mask", NULL, &sid); + err =3D of_map_iommu_id(port->pcie->dev->of_node, rid, NULL, &sid); if (err) return err; =20 diff --git a/drivers/xen/grant-dma-ops.c b/drivers/xen/grant-dma-ops.c index c2603e700178..1b7696b2d762 100644 --- a/drivers/xen/grant-dma-ops.c +++ b/drivers/xen/grant-dma-ops.c @@ -325,8 +325,7 @@ static int xen_dt_grant_init_backend_domid(struct devic= e *dev, struct pci_dev *pdev =3D to_pci_dev(dev); u32 rid =3D PCI_DEVID(pdev->bus->number, pdev->devfn); =20 - if (of_map_id(np, rid, "iommu-map", "iommu-map-mask", &iommu_spec.np, - iommu_spec.args)) { + if (of_map_iommu_id(np, rid, &iommu_spec.np, iommu_spec.args)) { dev_dbg(dev, "Cannot translate ID\n"); return -ESRCH; } diff --git a/include/linux/of.h b/include/linux/of.h index 9bbdcf25a2b4..309c5681744b 100644 --- a/include/linux/of.h +++ b/include/linux/of.h @@ -1457,6 +1457,20 @@ static inline int of_property_read_s32(const struct = device_node *np, return of_property_read_u32(np, propname, (u32*) out_value); } =20 +static inline int of_map_iommu_id(const struct device_node *np, u32 id, + struct device_node **target, u32 *id_out) +{ + return of_map_id(np, id, "iommu-map", "iommu-map-mask", + target, id_out); +} + +static inline int of_map_msi_id(const struct device_node *np, u32 id, + struct device_node **target, u32 *id_out) +{ + return of_map_id(np, id, "msi-map", "msi-map-mask", + target, id_out); +} + #define of_for_each_phandle(it, err, np, ln, cn, cc) \ for (of_phandle_iterator_init((it), (np), (ln), (cn), (cc)), \ err =3D of_phandle_iterator_next(it); \ --=20 2.34.1 From nobody Sun Feb 8 23:42:17 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 957732FF66B for ; Sun, 18 Jan 2026 18:14:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768760065; cv=none; b=lWt+fZFFw1bD6Iu02jrALZy78RcXqC8BQELOZDdyYdsE/5Cfj2YgopBp88fCHgzJwUoAG0bqP8hnaH8gvK17AVpD+TDuQpDJ0ZuphfRRJ+Z6XbAHGM4ATwvY0F3O01bdmQhipdf8mI8adF0WcJ2YxDQ6PzuDVElc7wPQcpLY7BI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768760065; c=relaxed/simple; bh=TSZ/wDnFHxeXqt9KfR/SGAOinyXK0kimEehYm8g6Jkg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=SqtsaBYmdghBB8K6oH0TvpJo3sBguZrjFuXAb88b4nN8TGsLj1Z373Ox2KAzmY1UXIM0bmwtbkc/O1aqIv51zl3macspk62I2U+HveN0kWKNPr+tsEhMpj679zGn+rppZmy5E3s/xs8VWaNkVO2GllwX/oEU7fgayhPupwUPj6E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=YrPR4YRS; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=S+e+pDUY; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="YrPR4YRS"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="S+e+pDUY" Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 60I1vaYO1484228 for ; Sun, 18 Jan 2026 18:14:23 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=qcppdkim1; bh=FN3oWZbw5sV GuRs9dWSdopr6ooa0/d6f+oL1v6bf4sE=; b=YrPR4YRSl2VJssPIvWcmVzJMqXw PeBlK1BthWhXB63Tvehj4cqG3jCZiyPtaYLvKLmTTQSHEwPN1prhBRBFicW3AGuG sslsiN4oZP/zcPHoi8sOYOCIAsSPIucNzsVquDEz7Tx+3uyQ0L72fhbobD56dcqB xBVwzfc+WFDfT9C4vVkcAU19TUS5mIQJIgqgkM82gLaZpmAlwwl0w6rXF8ICc3tF dd7PdCruzhI6UE57KvNHsQfMrcBtTXnz1BcsEKCYk20uq3Ak+ZmkqqFVVsPGtqHF aXbcVlTTsQ3Q8SgjO+cV9PmgAOnNTxyDjgDAFFoBJtaBEnAKgVEdmGfhf8Q== Received: from mail-pg1-f200.google.com (mail-pg1-f200.google.com [209.85.215.200]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4br2n2tunj-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Sun, 18 Jan 2026 18:14:22 +0000 (GMT) Received: by mail-pg1-f200.google.com with SMTP id 41be03b00d2f7-c1290abb178so2223037a12.2 for ; Sun, 18 Jan 2026 10:14:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1768760062; x=1769364862; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=FN3oWZbw5sVGuRs9dWSdopr6ooa0/d6f+oL1v6bf4sE=; b=S+e+pDUYsDXnPBus/Z/5XDGJwleb/Ny1GbCfMFOkY8OB38vOuhHkspb1Jq7dD2Anuq 9MOqfoJl/siTrE2HO7A+uoRrxLZRHuj5wueMovCBeG9jlhxePf8iF9jN9ZndciPwtxs2 yW7Rqx1RkxHxmqkou5inS22ff49c856hhuF79gZMS6vg2fQ1IWQvOpsODWuG6SRPJyk7 P4SEWIiBBiVXLQcIyMgzJDsdwGwgOHDNDgqsMnCQFvXs5aFudZvAW+tRtJcymTZq2lZA 0eIEhuMastZpDEDayYl/zkrIqOuYWQejYpCjcp9JBAiLtCjw64ubzxYO6K0JCT4d2y73 PAGw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1768760062; x=1769364862; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=FN3oWZbw5sVGuRs9dWSdopr6ooa0/d6f+oL1v6bf4sE=; b=UNSFAisw4qszmkRMHp0A9uOlLJyO5Ek7g6Ubin3GTFmzeGcrAi398ANAmH3HHZkX2q n93dNWFwR3QmrWh45TNxvatWZKEkmBsDenEvl5uWPuWwaQgG2dW51CKW2O2gAGarqtpD Igv2UEWjXgVlo66EszFc4ig4fm07zXIotu4QHgSJqfj6Y1bZpvRfd3lO/X0XxYGCNW0N uFmeBPYn0jDbvoC3YYPXuaP468btWNuUArww3uDX/+k4y9Kc+Qr0krUgAbCYRkHRQoAM YOQGcidyEu/nnobhp/usW0xgzXRZCpwKH9FPt+o5teqhdYflNmdoCKGyri6XL9RvKN5z 4Shg== X-Forwarded-Encrypted: i=1; AJvYcCXsAuPPJ1X8Sd2Fal/NndNrqvxbbgmSp0NGLX55u2ZRYdRdZq+8Bvk2yG6YVLXjtrR4FOBcQsnVJboHJy4=@vger.kernel.org X-Gm-Message-State: AOJu0YxxjyTbFGUcZebmdpd5Id3LqYZb9/TNykg80rjxiMxQOcJvZkh+ HsNk9/QT+Hc6NWoUSN6LqLwHUcSFxf1H1Gxe+uIKjsOQCLfvRvbepTVavx3I0OH5hmPKVQ19ZFQ RVg45zxfPRv/Eh2ZwHislJhV6Fp8h2qgXupny8rC4RpcPTZcKzxAv36LqZ5Pd+lrGxfs= X-Gm-Gg: AY/fxX7SUJazTk8RIsnB/XWKqlbse0kst4cPWJ2tdE2bzxcz4gqjqAQkiIuKe3njhjb 98jngDWwER656WeCRXuCW9C+5cc+NPSk9Z3K1uhFdQhhl9wlVxt3r8eDoM+Ye7BwypV0bTI680y bVIx0rUQKrEW8CgooWLYkD+QtIHbgmxIntYLA0D0GSan+6hbCUsHS9A1v3DTMlM28bYx2XEe596 Kezvm3eVFUC4+N1IXBMZ17Z51p3Zp2o7//GyTiTlDXpMVcp50DQoVuVuGpPfC+sgiolbvi/Lv+M vrtW20U98nIZdDQkAXbpEApRE/t7rQ0KAKZX6+KPWotDz+Jrrjtfi0EtU7Tff81+cx2my+jZmeb 5SxzHCKUqkd5i0SStWStZ2MWEafqc+5z+83wYsMC2yH1m X-Received: by 2002:a05:6a00:22cc:b0:81f:3afe:2824 with SMTP id d2e1a72fcca58-81f9fce5d63mr8295506b3a.24.1768760061962; Sun, 18 Jan 2026 10:14:21 -0800 (PST) X-Received: by 2002:a05:6a00:22cc:b0:81f:3afe:2824 with SMTP id d2e1a72fcca58-81f9fce5d63mr8295485b3a.24.1768760061420; Sun, 18 Jan 2026 10:14:21 -0800 (PST) Received: from hu-vjitta-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-81fa1277a15sm7070759b3a.42.2026.01.18.10.14.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 18 Jan 2026 10:14:21 -0800 (PST) From: Vijayanand Jitta To: robin.murphy@arm.com, will@kernel.org, joro@8bytes.org, robh@kernel.org, dmitry.baryshkov@oss.qualcomm.com, konrad.dybcio@oss.qualcomm.com, bjorn.andersson@oss.qualcomm.com, bod@kernel.org, conor+dt@kernel.org, krzk+dt@kernel.org, prakash.gupta@oss.qualcomm.com, vikash.garodia@oss.qualcomm.com Cc: iommu@lists.linux.dev, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, vijayanand.jitta@oss.qualcomm.com, Charan Teja Kalla Subject: [PATCH v5 2/3] of: factor arguments passed to of_map_id() into a struct Date: Sun, 18 Jan 2026 23:41:24 +0530 Message-Id: <20260118181125.1436036-3-vijayanand.jitta@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260118181125.1436036-1-vijayanand.jitta@oss.qualcomm.com> References: <20260118181125.1436036-1-vijayanand.jitta@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Authority-Analysis: v=2.4 cv=TvvrRTXh c=1 sm=1 tr=0 ts=696d22fe cx=c_pps a=oF/VQ+ItUULfLr/lQ2/icg==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=vUbySO9Y5rIA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=VwQbUJbxAAAA:8 a=rukgfAGnDChJCile_RwA:9 a=3WC7DwWrALyhR5TkjVHa:22 X-Proofpoint-ORIG-GUID: TTTuzozXpW3SMZRlPGj0cRt32G8Yui2n X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTE4MDE2MCBTYWx0ZWRfX7xf+ovvgiNZo 3a7K9scF7DJZFm3nQl7yeB9OS4H/kmDcZMGTkthU3gKaCaFkahfarNQA9kEfmrp1WWuTiGin8E9 EfkizU1T66IdSyijJuVVfQqs+QegQ+Kw5UegtgKw1I2RaBeGZDQVNTRKjdN0X33dFQ9gSOWp7LE Vf61CPj6JbBjzs7aLo2qRSrBN6We7yRijhN+yOxi4sFtBQU2xNN6RfE613eCcSn63y3f0Tcwg9Q 9a5TdaI3FELJBJZnUM/AB/cfhuKs2qu22Rbybu0SrrWGoCFWXW4492Va9nKIBfCa2ZhfgNY70RQ Bih3a1H3rgdgveRxOlx/pDrFD/EHDHX7cig51N+7oqWe49LVPCeuAnTkN8m4b5yMqt7lmYblDbe UzYtoUXbdxq/GBffz0fHjON3eDXkZnbeSxVkl05cE3TK5YkRfWZrG/ZJ4VTtLOlccl97HE+2bqv hYjoXUmrjjJg1lMZQTQ== X-Proofpoint-GUID: TTTuzozXpW3SMZRlPGj0cRt32G8Yui2n X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2026-01-17_03,2026-01-15_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 adultscore=0 clxscore=1015 priorityscore=1501 malwarescore=0 spamscore=0 phishscore=0 impostorscore=0 suspectscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2601180160 Content-Type: text/plain; charset="utf-8" From: Charan Teja Kalla Introduce a new struct type where the optional arguments passed to of_map_id() are Currently embedded as of_phandle_args struct. Subsequent patches add additional arguments to the struct that the caller expects to be filled of_map_id(). Suggested-by: Rob Herring (Arm) Signed-off-by: Charan Teja Kalla Signed-off-by: Vijayanand Jitta --- drivers/cdx/cdx_msi.c | 2 +- drivers/iommu/of_iommu.c | 12 ++++++--- drivers/of/base.c | 37 +++++++++++++-------------- drivers/pci/controller/dwc/pci-imx6.c | 10 ++++++-- drivers/pci/controller/pcie-apple.c | 4 ++- drivers/xen/grant-dma-ops.c | 20 +++++++++------ include/linux/of.h | 32 ++++++++++++++++++----- 7 files changed, 75 insertions(+), 42 deletions(-) diff --git a/drivers/cdx/cdx_msi.c b/drivers/cdx/cdx_msi.c index 63b3544ec997..7ed9643f1815 100644 --- a/drivers/cdx/cdx_msi.c +++ b/drivers/cdx/cdx_msi.c @@ -124,7 +124,7 @@ static int cdx_msi_prepare(struct irq_domain *msi_domai= n, struct cdx_device *cdx_dev =3D to_cdx_device(dev); struct device *parent =3D cdx_dev->cdx->dev; struct msi_domain_info *msi_info; - u32 dev_id; + u32 dev_id =3D 0; int ret; =20 /* Retrieve device ID from requestor ID using parent device */ diff --git a/drivers/iommu/of_iommu.c b/drivers/iommu/of_iommu.c index a511ecf21fcd..646ac5a67475 100644 --- a/drivers/iommu/of_iommu.c +++ b/drivers/iommu/of_iommu.c @@ -45,15 +45,19 @@ static int of_iommu_configure_dev_id(struct device_node= *master_np, struct device *dev, const u32 *id) { - struct of_phandle_args iommu_spec =3D { .args_count =3D 1 }; + struct of_map_id_arg arg =3D { + .map_args =3D { + .args_count =3D 1, + }, + }; int err; =20 - err =3D of_map_iommu_id(master_np, *id, &iommu_spec.np, iommu_spec.args); + err =3D of_map_iommu_id(master_np, *id, &arg); if (err) return err; =20 - err =3D of_iommu_xlate(dev, &iommu_spec); - of_node_put(iommu_spec.np); + err =3D of_iommu_xlate(dev, &arg.map_args); + of_node_put(arg.map_args.np); return err; } =20 diff --git a/drivers/of/base.c b/drivers/of/base.c index 0b65039ece53..0c379fa051fe 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -2098,8 +2098,11 @@ int of_find_last_cache_level(unsigned int cpu) * @id: device ID to map. * @map_name: property name of the map to use. * @map_mask_name: optional property name of the mask to use. - * @target: optional pointer to a target device node. - * @id_out: optional pointer to receive the translated ID. + * @arg: contains the optional params, wrapped in a struct of_phandle_args, + * which includes: + * np: pointer to the target device node + * args_count: number of arguments + * args[]: array to receive the translated ID(s). * * Given a device ID, look up the appropriate implementation-defined * platform ID and/or the target device which receives transactions on that @@ -2113,21 +2116,21 @@ int of_find_last_cache_level(unsigned int cpu) */ int of_map_id(const struct device_node *np, u32 id, const char *map_name, const char *map_mask_name, - struct device_node **target, u32 *id_out) + struct of_map_id_arg *arg) { u32 map_mask, masked_id; int map_len; const __be32 *map =3D NULL; =20 - if (!np || !map_name || (!target && !id_out)) + if (!np || !map_name || !arg) return -EINVAL; =20 map =3D of_get_property(np, map_name, &map_len); if (!map) { - if (target) + if (arg->map_args.np) return -ENODEV; /* Otherwise, no map implies no translation */ - *id_out =3D id; + arg->map_args.args[0] =3D id; return 0; } =20 @@ -2169,18 +2172,15 @@ int of_map_id(const struct device_node *np, u32 id, if (!phandle_node) return -ENODEV; =20 - if (target) { - if (*target) - of_node_put(phandle_node); - else - *target =3D phandle_node; + if (arg->map_args.np) + of_node_put(phandle_node); + else + arg->map_args.np =3D phandle_node; =20 - if (*target !=3D phandle_node) - continue; - } + if (arg->map_args.np !=3D phandle_node) + continue; =20 - if (id_out) - *id_out =3D masked_id - id_base + out_base; + arg->map_args.args[0] =3D masked_id - id_base + out_base; =20 pr_debug("%pOF: %s, using mask %08x, id-base: %08x, out-base: %08x, leng= th: %08x, id: %08x -> %08x\n", np, map_name, map_mask, id_base, out_base, @@ -2189,11 +2189,10 @@ int of_map_id(const struct device_node *np, u32 id, } =20 pr_info("%pOF: no %s translation for id 0x%x on %pOF\n", np, map_name, - id, target && *target ? *target : NULL); + id, arg->map_args.np ? arg->map_args.np : NULL); =20 /* Bypasses translation */ - if (id_out) - *id_out =3D id; + arg->map_args.args[0] =3D id; return 0; } EXPORT_SYMBOL_GPL(of_map_id); diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller= /dwc/pci-imx6.c index c3e5cb3cb846..641f9d34f7a9 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -1138,12 +1138,18 @@ static int imx_pcie_add_lut_by_rid(struct imx_pcie = *imx_pcie, u32 rid) { struct device *dev =3D imx_pcie->pci->dev; struct device_node *target; - u32 sid_i, sid_m; + struct of_map_id_arg arg =3D {}; + u32 sid_i, sid_m =3D 0; int err_i, err_m; u32 sid =3D 0; =20 target =3D NULL; - err_i =3D of_map_iommu_id(dev->of_node, rid, &target, &sid_i); + + err_i =3D of_map_iommu_id(dev->of_node, rid, &arg); + if (!err_i) { + target =3D arg.map_args.np; + sid_i =3D arg.map_args.args[0]; + } if (target) { of_node_put(target); } else { diff --git a/drivers/pci/controller/pcie-apple.c b/drivers/pci/controller/p= cie-apple.c index a0937b7b3c4d..2df15fe075fa 100644 --- a/drivers/pci/controller/pcie-apple.c +++ b/drivers/pci/controller/pcie-apple.c @@ -755,6 +755,7 @@ static int apple_pcie_enable_device(struct pci_host_bri= dge *bridge, struct pci_d { u32 sid, rid =3D pci_dev_id(pdev); struct apple_pcie_port *port; + struct of_map_id_arg arg =3D {}; int idx, err; =20 port =3D apple_pcie_get_port(pdev); @@ -764,10 +765,11 @@ static int apple_pcie_enable_device(struct pci_host_b= ridge *bridge, struct pci_d dev_dbg(&pdev->dev, "added to bus %s, index %d\n", pci_name(pdev->bus->self), port->idx); =20 - err =3D of_map_iommu_id(port->pcie->dev->of_node, rid, NULL, &sid); + err =3D of_map_iommu_id(port->pcie->dev->of_node, rid, &arg); if (err) return err; =20 + sid =3D arg.map_args.args[0]; mutex_lock(&port->pcie->lock); =20 idx =3D bitmap_find_free_region(port->sid_map, port->sid_map_sz, 0); diff --git a/drivers/xen/grant-dma-ops.c b/drivers/xen/grant-dma-ops.c index 1b7696b2d762..8c332b7ff148 100644 --- a/drivers/xen/grant-dma-ops.c +++ b/drivers/xen/grant-dma-ops.c @@ -319,38 +319,42 @@ static int xen_dt_grant_init_backend_domid(struct dev= ice *dev, struct device_node *np, domid_t *backend_domid) { - struct of_phandle_args iommu_spec =3D { .args_count =3D 1 }; + struct of_map_id_arg arg =3D { + .map_args =3D { + .args_count =3D 1, + }, + }; =20 if (dev_is_pci(dev)) { struct pci_dev *pdev =3D to_pci_dev(dev); u32 rid =3D PCI_DEVID(pdev->bus->number, pdev->devfn); =20 - if (of_map_iommu_id(np, rid, &iommu_spec.np, iommu_spec.args)) { + if (of_map_iommu_id(np, rid, &arg)) { dev_dbg(dev, "Cannot translate ID\n"); return -ESRCH; } } else { if (of_parse_phandle_with_args(np, "iommus", "#iommu-cells", - 0, &iommu_spec)) { + 0, &arg.map_args)) { dev_dbg(dev, "Cannot parse iommus property\n"); return -ESRCH; } } =20 - if (!of_device_is_compatible(iommu_spec.np, "xen,grant-dma") || - iommu_spec.args_count !=3D 1) { + if (!of_device_is_compatible(arg.map_args.np, "xen,grant-dma") || + arg.map_args.args_count !=3D 1) { dev_dbg(dev, "Incompatible IOMMU node\n"); - of_node_put(iommu_spec.np); + of_node_put(arg.map_args.np); return -ESRCH; } =20 - of_node_put(iommu_spec.np); + of_node_put(arg.map_args.np); =20 /* * The endpoint ID here means the ID of the domain where the * corresponding backend is running */ - *backend_domid =3D iommu_spec.args[0]; + *backend_domid =3D arg.map_args.args[0]; =20 return 0; } diff --git a/include/linux/of.h b/include/linux/of.h index 309c5681744b..514f4f018f99 100644 --- a/include/linux/of.h +++ b/include/linux/of.h @@ -74,6 +74,10 @@ struct of_phandle_args { uint32_t args[MAX_PHANDLE_ARGS]; }; =20 +struct of_map_id_arg { + struct of_phandle_args map_args; +}; + struct of_phandle_iterator { /* Common iterator information */ const char *cells_name; @@ -463,7 +467,7 @@ bool of_console_check(const struct device_node *dn, cha= r *name, int index); =20 int of_map_id(const struct device_node *np, u32 id, const char *map_name, const char *map_mask_name, - struct device_node **target, u32 *id_out); + struct of_map_id_arg *arg); =20 phys_addr_t of_dma_get_max_cpu_address(struct device_node *np); =20 @@ -929,7 +933,7 @@ static inline void of_property_clear_flag(struct proper= ty *p, unsigned long flag =20 static inline int of_map_id(const struct device_node *np, u32 id, const char *map_name, const char *map_mask_name, - struct device_node **target, u32 *id_out) + struct of_map_id_arg *arg) { return -EINVAL; } @@ -1458,17 +1462,31 @@ static inline int of_property_read_s32(const struct= device_node *np, } =20 static inline int of_map_iommu_id(const struct device_node *np, u32 id, - struct device_node **target, u32 *id_out) + struct of_map_id_arg *arg) { - return of_map_id(np, id, "iommu-map", "iommu-map-mask", - target, id_out); + return of_map_id(np, id, "iommu-map", "iommu-map-mask", arg); } =20 static inline int of_map_msi_id(const struct device_node *np, u32 id, struct device_node **target, u32 *id_out) { - return of_map_id(np, id, "msi-map", "msi-map-mask", - target, id_out); + int ret; + + struct of_map_id_arg arg =3D { + .map_args =3D { + .np =3D *target, + .args_count =3D 1, + .args =3D { *id_out }, + }, + }; + + ret =3D of_map_id(np, id, "msi-map", "msi-map-mask", &arg); + if (!ret) { + *target =3D arg.map_args.np; + *id_out =3D arg.map_args.args[0]; + } + + return ret; } =20 #define of_for_each_phandle(it, err, np, ln, cn, cc) \ --=20 2.34.1 From nobody Sun Feb 8 23:42:17 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2D0EF241C8C for ; Sun, 18 Jan 2026 18:14:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768760070; cv=none; b=F8zvzUNMT6zMwBMNpgwaxWqYm/CogPs2Ykolca/ukKHIQNdzZ0VxDKmejLv7f4h2Q7+oqe2zgdOrQfBDsgW/N1ONgS6ssCVUxMdF/GbNQNiQTNXiLwryt/E6Hi6O0Nx6TqWlwXGDMCBGwxeoKY5lFmaLLnRMf3vkoKHj1ZEl+h0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768760070; c=relaxed/simple; bh=mpaDYN+Xiq4Aav2kxzaZQj9ObGgV8czuZtdwtzXBjMQ=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=jBONCm/3tnLRpXSwPR4nJ7G8jg7TXvclFA/YPVfkzmZVx50a5HUnoHd/XjAEzrgZm8WVziUb468EruCLyIzHAGSlL63Lb8hA+0tWDSthXbTI1Q2PIOESnnElHUpUbx1QiNYOaXjxmspX5yMhBEANHsUY7sqhMSm/InOfJqO83sk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=ZYjwN7L/; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=jIisTKKV; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="ZYjwN7L/"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="jIisTKKV" Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 60IEURPG3471086 for ; Sun, 18 Jan 2026 18:14:28 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=qcppdkim1; bh=xrWF3I5wfsg I7ritNiCaBX3buJieLQCC0f8TTZ7Ptao=; b=ZYjwN7L/h81Y6CKyhcoKBTABj3D qBYa3833ZgUON8aC0P9Z1PdYjH8ASwiyRFhUA3eW7rgk0aNfU7tJXOGzs2H5Pxod 3ABNSGc1yRbuYk79edOV8dYxtCR7GgDxCJ+jatV68+fmzgBODbTMSB68KBFXFmv+ EChBpfXktjDnQ/hivjZ3oY4t7TxqN+NpN0hmQARs9/I9H9Pxra8ridvGQRHXP10x UnsXPN6TPxzYDGjqleBExBpZgpY9E/yTG2RO3TA25ml8Pvkq61jGx5h226QquPYu RFzJ/NFDojGMeeflU4fcshqOG4W0opAARLMJi1RZtlnqZimvWxMIyD0TrAA== Received: from mail-pf1-f198.google.com (mail-pf1-f198.google.com [209.85.210.198]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4br36darxy-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Sun, 18 Jan 2026 18:14:28 +0000 (GMT) Received: by mail-pf1-f198.google.com with SMTP id d2e1a72fcca58-81f48cec0ccso2728490b3a.0 for ; Sun, 18 Jan 2026 10:14:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1768760068; x=1769364868; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=xrWF3I5wfsgI7ritNiCaBX3buJieLQCC0f8TTZ7Ptao=; b=jIisTKKVSo8V0JLcAHbogborfbEuPwWVdd/HZpwCkBaqQMMmobZ6zdgoUvLUQtKSYU npKHmipSKcwBgq2KWXmpXucn4apLJX8L52EGInV/Q4/fYFyq7f55fXw7Mo5tJhqmjCoS mJNhrZAa2Wowsjpuhj0ux79db4MQ9yJtv2FwR7CCSQW3nnmsWCyITB8yrneuJ9Snlj9v dhQp9dK5BCEj0OAOP/nO4ueSZjn5mm24W9AzGYIvrmCfD9ptHXDpfJG2uUQE40+i5MZk SI3IX/NFMq4FlaLiztf7fTEPIaDsYtEsdwlKbG6IT5HojXm9tH9Yg6OJ1gGxdt1PfXNL W9gA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1768760068; x=1769364868; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=xrWF3I5wfsgI7ritNiCaBX3buJieLQCC0f8TTZ7Ptao=; b=IChUYP9LdguOkmjtaaHd1aTFdTHYR4CD9cFi3r9uH+aPwR7CVe4VSlj70kjBHKpyC4 +KHtUMF+hvpAwTTxR6nBYBmjvwNzA0+AdIa09dnl6iVPEA6YqItqUO2trxIeJUxHbmAe 9/KFS+MF8r/E1H0ujpBJm3Pn1B3b7VOV+1K8ci9hhTmMzytzXTTjhhrwWHgiW2fjj9ro t28Nb18062z/blFcrNyooKCmNpuHNG9ZQjisqsm5CvEYB+uM2RQMNbe8Jqk7OOD3UXPi 9f4nBeRg5e4T/PzolXNvXFfnbQoph58bSETpG1ccNSuHcXEs0sK+4S+/ggswUjBN4xw7 QviQ== X-Forwarded-Encrypted: i=1; AJvYcCWoUSXHNEWK0ItTEs7B8FdJG5CMTO0NcKWU4JcanDO1wsVKT/ParlaHlWxhErsCOZLLneEOPE7yT3Cishc=@vger.kernel.org X-Gm-Message-State: AOJu0YxoKqE1eDyHnxF5KBDbOw7EPY+HFbQpJfhwVmkSHUu/uJmClUjB JIz+mQAk9K+8xJVK2puL1ZCHu4UqBeC8U2hFWNwHatUyJmGyQGkPC9s8txeDUcsWr7kCEuHpv/A vwiF1D72k+GU70JX93zoRRhPzdTSTrUiQhIPFd4IZUz/t78CjS8GEFwj6pnP2nKzZbmM= X-Gm-Gg: AY/fxX5sMKsHMXVc2EyxzTFwATf9vgwdN9LtAEUdxJ2riIeH9HWQUM32YUWw1owYf+X Iy5AHEXRrpvYubMOsAKoKHoTcqwS8aT4gXHnvOP2Tb5fuJDmcg1lSVb9Es9PKzTQ5Vk+fxtG/c7 iesHrKqkxDYDRIwQLIF+SAFyJFt+N6GQ0GOvIAEGU7ThDbrnTiVR1AThkRCzYNBelkbXazoYtoj 0J6kdf9WLHfWaLgPpf09moMRpU6ZJuhF2lMWTuU02eA2v44pGV/j6d77hJP7W3jwyGnF+u0yYKo IbR3SM0PdnFksm0qo9Xzm414ky1AYSBwx0tRNvRPU2zcwRKSnOsKrSeAoEUc3ymVXDEU8e1VCLp KViY5MVyggd0tCtwWjE/185IwZRoXdMXPebVa/eeYLOl+ X-Received: by 2002:a05:6a00:8d2:b0:81e:408e:47c9 with SMTP id d2e1a72fcca58-81f9f69002amr7418554b3a.11.1768760067510; Sun, 18 Jan 2026 10:14:27 -0800 (PST) X-Received: by 2002:a05:6a00:8d2:b0:81e:408e:47c9 with SMTP id d2e1a72fcca58-81f9f69002amr7418529b3a.11.1768760066858; Sun, 18 Jan 2026 10:14:26 -0800 (PST) Received: from hu-vjitta-hyd.qualcomm.com ([202.46.23.25]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-81fa1277a15sm7070759b3a.42.2026.01.18.10.14.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 18 Jan 2026 10:14:26 -0800 (PST) From: Vijayanand Jitta To: robin.murphy@arm.com, will@kernel.org, joro@8bytes.org, robh@kernel.org, dmitry.baryshkov@oss.qualcomm.com, konrad.dybcio@oss.qualcomm.com, bjorn.andersson@oss.qualcomm.com, bod@kernel.org, conor+dt@kernel.org, krzk+dt@kernel.org, prakash.gupta@oss.qualcomm.com, vikash.garodia@oss.qualcomm.com Cc: iommu@lists.linux.dev, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, vijayanand.jitta@oss.qualcomm.com Subject: [PATCH v5 3/3] of: Respect #{iommu,msi}-cells in maps Date: Sun, 18 Jan 2026 23:41:25 +0530 Message-Id: <20260118181125.1436036-4-vijayanand.jitta@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260118181125.1436036-1-vijayanand.jitta@oss.qualcomm.com> References: <20260118181125.1436036-1-vijayanand.jitta@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTE4MDE2MCBTYWx0ZWRfX4B17boM46lFF fYzwNrozPAEhDQ6ePC3HnVoqe/EVnwCo7hD7AspFQbLKu356e3Mnt0MJ3fCvIE5S6BmiGx/AKTw XDVPnOC5xCE4+fOja9Q09N2k2xC6fIL28Vp+smtvFiVKF+T04FKnqiYygesKnWIFPS43raR9rt8 12ElZ+zQ+0N02WTqLnG1F/9mh2jL4kYiahZ+hztwWotnl2ab3QhF+yiiGELEmo7EbD49vXb7bSA Lj+FmRsZdkOg70ndFxtrRydztUsfTQeUYGcBY9PPZVTeDA1qJniea38pXg5vslt4cmwbzrFEV5Y I95qqbjkthPWcbqMoXyMKabGEp4Ul+LVOMNFPaU2Ut2/+vVHALwTbGcq0bw/Qpaa8pAh+Zww6Oy isriiSvDA/6PyrFvlxtmuYJdv+cS8P3DrCzWtKzR6X8djWOS98N/wJX016U90DHIXCTzXuOBRU+ 03X5TzvyO5qz+KMgCRg== X-Proofpoint-GUID: -4bLpYnzpkA3zgMw_2zfvnUWFYVyxnTb X-Authority-Analysis: v=2.4 cv=GJ0F0+NK c=1 sm=1 tr=0 ts=696d2304 cx=c_pps a=m5Vt/hrsBiPMCU0y4gIsQw==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=vUbySO9Y5rIA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=7CQSdrXTAAAA:8 a=EUspDBNiAAAA:8 a=wJGdY9mNwEi-N7fqGJcA:9 a=IoOABgeZipijB_acs4fv:22 a=a-qgeE7W1pNrGK8U0ZQC:22 X-Proofpoint-ORIG-GUID: -4bLpYnzpkA3zgMw_2zfvnUWFYVyxnTb X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2026-01-17_03,2026-01-15_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 spamscore=0 lowpriorityscore=0 clxscore=1015 phishscore=0 bulkscore=0 adultscore=0 impostorscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2601180160 Content-Type: text/plain; charset="utf-8" From: Robin Murphy So far our parsing of {iommu,msi}-map properites has always blindly asusmed that the output specifiers will always have exactly 1 cell. This typically does happen to be the case, but is not actually enforced (and the PCI msi-map binding even explicitly states support for 0 or 1 cells) - as a result we've now ended up with dodgy DTs out in the field which depend on this behaviour to map a 1-cell specifier for a 2-cell provider, despite that being bogus per the bindings themselves. Since there is some potential use in being able to map at least single input IDs to multi-cell output specifiers (and properly support 0-cell outputs as well), add support for properly parsing and using the target nodes' #cells values, albeit with the unfortunate complication of still having to work around expectations of the old behaviour too. Since there are multi-cell output specifiers, the callers of of_map_id() may need to get the exact cell output value for further processing. Added support for that part --charan Signed-off-by: Robin Murphy Signed-off-by: Vijayanand Jitta --- drivers/iommu/of_iommu.c | 4 +- drivers/of/base.c | 115 +++++++++++++++++++++++++++++++-------- include/linux/of.h | 16 +++--- 3 files changed, 101 insertions(+), 34 deletions(-) diff --git a/drivers/iommu/of_iommu.c b/drivers/iommu/of_iommu.c index 646ac5a67475..768eaddf927b 100644 --- a/drivers/iommu/of_iommu.c +++ b/drivers/iommu/of_iommu.c @@ -46,9 +46,7 @@ static int of_iommu_configure_dev_id(struct device_node *= master_np, const u32 *id) { struct of_map_id_arg arg =3D { - .map_args =3D { - .args_count =3D 1, - }, + .map_args =3D {}, }; int err; =20 diff --git a/drivers/of/base.c b/drivers/of/base.c index 0c379fa051fe..da236108ab57 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -2092,11 +2092,38 @@ int of_find_last_cache_level(unsigned int cpu) return cache_level; } =20 +/* + * Some DTs have an iommu-map targeting a 2-cell IOMMU node while + * specifying only 1 cell. Fortunately they all consist of value '1' + * as the 2nd cell entry with the same target, so check for that pattern. + * + * Example: + * IOMMU node: + * #iommu-cells =3D <2>; + * + * Device node: + * iommu-map =3D <0x0000 &smmu 0x0000 0x1>, + * <0x0100 &smmu 0x0100 0x1>; + */ +static bool of_check_bad_map(const __be32 *map, int len) +{ + __be32 phandle =3D map[1]; + + if (len % 4) + return false; + for (int i =3D 0; i < len; i +=3D 4) { + if (map[i + 1] !=3D phandle || map[i + 3] !=3D cpu_to_be32(1)) + return false; + } + return true; +} + /** * of_map_id - Translate an ID through a downstream mapping. * @np: root complex device node. * @id: device ID to map. * @map_name: property name of the map to use. + * @cells_name: property name of target specifier cells. * @map_mask_name: optional property name of the mask to use. * @arg: contains the optional params, wrapped in a struct of_phandle_args, * which includes: @@ -2114,18 +2141,19 @@ int of_find_last_cache_level(unsigned int cpu) * * Return: 0 on success or a standard error code on failure. */ -int of_map_id(const struct device_node *np, u32 id, - const char *map_name, const char *map_mask_name, - struct of_map_id_arg *arg) +int of_map_id(const struct device_node *np, u32 id, const char *map_name, + const char *cells_name, const char *map_mask_name, + struct of_map_id_arg *arg) { u32 map_mask, masked_id; - int map_len; + int map_bytes, map_len, offset =3D 0; + bool bad_map =3D false; const __be32 *map =3D NULL; =20 if (!np || !map_name || !arg) return -EINVAL; =20 - map =3D of_get_property(np, map_name, &map_len); + map =3D of_get_property(np, map_name, &map_bytes); if (!map) { if (arg->map_args.np) return -ENODEV; @@ -2134,11 +2162,9 @@ int of_map_id(const struct device_node *np, u32 id, return 0; } =20 - if (!map_len || map_len % (4 * sizeof(*map))) { - pr_err("%pOF: Error: Bad %s length: %d\n", np, - map_name, map_len); - return -EINVAL; - } + if (map_bytes % sizeof(*map)) + goto err_map_len; + map_len =3D map_bytes / sizeof(*map); =20 /* The default is to select all bits. */ map_mask =3D 0xffffffff; @@ -2151,27 +2177,63 @@ int of_map_id(const struct device_node *np, u32 id, of_property_read_u32(np, map_mask_name, &map_mask); =20 masked_id =3D map_mask & id; - for ( ; map_len > 0; map_len -=3D 4 * sizeof(*map), map +=3D 4) { + while (offset < map_len) { struct device_node *phandle_node; - u32 id_base =3D be32_to_cpup(map + 0); - u32 phandle =3D be32_to_cpup(map + 1); - u32 out_base =3D be32_to_cpup(map + 2); - u32 id_len =3D be32_to_cpup(map + 3); + u32 id_base, phandle, id_len, id_off, cells =3D 0; + const __be32 *out_base; + + if (map_len - offset < 2) + goto err_map_len; + + id_base =3D be32_to_cpup(map + offset); =20 if (id_base & ~map_mask) { - pr_err("%pOF: Invalid %s translation - %s-mask (0x%x) ignores id-base (= 0x%x)\n", - np, map_name, map_name, - map_mask, id_base); + pr_err("%pOF: Invalid %s translation - %s (0x%x) ignores id-base (0x%x)= \n", + np, map_name, map_mask_name, map_mask, id_base); return -EFAULT; } =20 - if (masked_id < id_base || masked_id >=3D id_base + id_len) - continue; =20 + phandle =3D be32_to_cpup(map + offset + 1); phandle_node =3D of_find_node_by_phandle(phandle); if (!phandle_node) return -ENODEV; =20 + if (!bad_map && of_property_read_u32(phandle_node, cells_name, &cells)) { + pr_err("%pOF: missing %s property\n", phandle_node, cells_name); + return -EINVAL; + } + + if (map_len - offset < 3 + cells) + goto err_map_len; + + if (offset =3D=3D 0 && cells =3D=3D 2) { + bad_map =3D of_check_bad_map(map, map_len); + if (bad_map) { + pr_warn_once("%pOF: %s mismatches target %s, assuming extra cell of 0\= n", + np, map_name, cells_name); + cells =3D 1; + } + } + + out_base =3D map + offset + 2; + offset +=3D 3 + cells; + + id_len =3D be32_to_cpup(map + offset - 1); + if (id_len > 1 && cells > 1) { + /* + * With 1 output cell we reasonably assume its value + * has a linear relationship to the input; with more, + * we'd need help from the provider to know what to do. + */ + pr_err("%pOF: Unsupported %s - cannot handle %d-ID range with %d-cell o= utput specifier\n", + np, map_name, id_len, cells); + return -EINVAL; + } + id_off =3D masked_id - id_base; + if (masked_id < id_base || id_off >=3D id_len) + continue; + if (arg->map_args.np) of_node_put(phandle_node); else @@ -2180,11 +2242,14 @@ int of_map_id(const struct device_node *np, u32 id, if (arg->map_args.np !=3D phandle_node) continue; =20 - arg->map_args.args[0] =3D masked_id - id_base + out_base; + for (int i =3D 0; i < cells; i++) + arg->map_args.args[i] =3D (id_off + be32_to_cpu(out_base[i])); + + arg->map_args.args_count =3D cells; =20 pr_debug("%pOF: %s, using mask %08x, id-base: %08x, out-base: %08x, leng= th: %08x, id: %08x -> %08x\n", - np, map_name, map_mask, id_base, out_base, - id_len, id, masked_id - id_base + out_base); + np, map_name, map_mask, id_base, be32_to_cpup(out_base), + id_len, id, id_off + be32_to_cpup(out_base)); return 0; } =20 @@ -2194,5 +2259,9 @@ int of_map_id(const struct device_node *np, u32 id, /* Bypasses translation */ arg->map_args.args[0] =3D id; return 0; + +err_map_len: + pr_err("%pOF: Error: Bad %s length: %d\n", np, map_name, map_bytes); + return -EINVAL; } EXPORT_SYMBOL_GPL(of_map_id); diff --git a/include/linux/of.h b/include/linux/of.h index 514f4f018f99..acbf4fe5b16e 100644 --- a/include/linux/of.h +++ b/include/linux/of.h @@ -465,9 +465,9 @@ const char *of_prop_next_string(const struct property *= prop, const char *cur); =20 bool of_console_check(const struct device_node *dn, char *name, int index); =20 -int of_map_id(const struct device_node *np, u32 id, - const char *map_name, const char *map_mask_name, - struct of_map_id_arg *arg); +int of_map_id(const struct device_node *np, u32 id, const char *map_name, + const char *cells_name, const char *map_mask_name, + struct of_map_id_arg *arg); =20 phys_addr_t of_dma_get_max_cpu_address(struct device_node *np); =20 @@ -931,9 +931,9 @@ static inline void of_property_clear_flag(struct proper= ty *p, unsigned long flag { } =20 -static inline int of_map_id(const struct device_node *np, u32 id, - const char *map_name, const char *map_mask_name, - struct of_map_id_arg *arg) +static inline int of_map_id(const struct device_node *np, u32 id, const ch= ar *map_name, + const char *cells_name, const char *map_mask_name, + struct of_map_id_arg *arg); { return -EINVAL; } @@ -1464,7 +1464,7 @@ static inline int of_property_read_s32(const struct d= evice_node *np, static inline int of_map_iommu_id(const struct device_node *np, u32 id, struct of_map_id_arg *arg) { - return of_map_id(np, id, "iommu-map", "iommu-map-mask", arg); + return of_map_id(np, id, "iommu-map", "#iommu-cells", "iommu-map-mask", a= rg); } =20 static inline int of_map_msi_id(const struct device_node *np, u32 id, @@ -1480,7 +1480,7 @@ static inline int of_map_msi_id(const struct device_n= ode *np, u32 id, }, }; =20 - ret =3D of_map_id(np, id, "msi-map", "msi-map-mask", &arg); + ret =3D of_map_id(np, id, "msi-map", "#msi-cells", "msi-map-mask", &arg); if (!ret) { *target =3D arg.map_args.np; *id_out =3D arg.map_args.args[0]; --=20 2.34.1