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Sat, 17 Jan 2026 08:55:31 -0800 (PST) Received: from DC5-EXCH05.marvell.com (10.69.176.209) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.25; Sat, 17 Jan 2026 08:55:45 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH05.marvell.com (10.69.176.209) with Microsoft SMTP Server id 15.2.1544.25 via Frontend Transport; Sat, 17 Jan 2026 08:55:45 -0800 Received: from test-OptiPlex-Tower-Plus-7010.marvell.com (unknown [10.29.37.157]) by maili.marvell.com (Postfix) with ESMTP id 44D0B3F70C5; Sat, 17 Jan 2026 08:55:26 -0800 (PST) From: Hariprasad Kelam To: , CC: , , , , , , , , , , , , Subject: [net-next PatchV2 1/2] octeontx2-af: Mailbox handlers to fetch DMAC filter drop counter Date: Sat, 17 Jan 2026 22:25:19 +0530 Message-ID: <20260117165520.2215073-2-hkelam@marvell.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260117165520.2215073-1-hkelam@marvell.com> References: <20260117165520.2215073-1-hkelam@marvell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Authority-Analysis: v=2.4 cv=WckBqkhX c=1 sm=1 tr=0 ts=696bbf03 cx=c_pps a=rEv8fa4AjpPjGxpoe8rlIQ==:117 a=rEv8fa4AjpPjGxpoe8rlIQ==:17 a=vUbySO9Y5rIA:10 a=VkNPw1HP01LnGYTKEx00:22 a=M5GUcnROAAAA:8 a=i4etW99qgHESH9cXnEAA:9 a=OBjm3rFKGHvpk9ecZwUJ:22 X-Proofpoint-GUID: EGvUt1Gcuj-0S5nXMl29R2vOYsd3Z1BG X-Proofpoint-ORIG-GUID: EGvUt1Gcuj-0S5nXMl29R2vOYsd3Z1BG X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTE3MDE0MSBTYWx0ZWRfX7wBmS2PhkZkr z3drKdC7LSqoLK75jWUPOLImAiMO1zvcU1IoxAzwjjJ8CIYE6okYeFie3MET65hwx5qDE2lVCGy ONZgZEh8lsbDf7j/PPY+RkjM6bMlLBFdcKZcZTfTyRJgHmMHatKdkn7BIBmFJ+XQGmJUwmskX7x A4DKcVHlPW/fw9c2QHSx9H7raSjblXd+MwMZkok2OGvBnU96MufeO9pUJ4tJE+UJUXD03RJk3YI 88CXmvPjsiDk+9e0VppdW8KIvVARAev/PxgFR0gkcTYigYCo8bfe2fTZKsGxxhWk+tW5ik+Pq0x OAXtMYFUFz0C7f1c/gJsIl18G2sYrJg5Qjr8e1eCcDTW15hvVqSl8uXAbh3FMG7/QcH3xqN9Sju 4BqjnLTaoAM6qBh3PeAd8Wcd14ApcCGCSmvIYLhgQKK0fvLwMAzSp6oe3Nc7yNIa/WjiiB1ea9R h704knDx6e9w/CT4roQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2026-01-17_02,2026-01-15_02,2025-10-01_01 Content-Type: text/plain; charset="utf-8" Both CGX/RPM mac blocks support DMAC filters. This patch adds mbox support to read the counter. Signed-off-by: Hariprasad Kelam --- V2* No changes .../net/ethernet/marvell/octeontx2/af/cgx.c | 11 ++++++++++ .../net/ethernet/marvell/octeontx2/af/cgx.h | 2 ++ .../marvell/octeontx2/af/lmac_common.h | 1 + .../net/ethernet/marvell/octeontx2/af/mbox.h | 7 +++++++ .../net/ethernet/marvell/octeontx2/af/rpm.c | 18 ++++++++++++++++- .../net/ethernet/marvell/octeontx2/af/rpm.h | 2 ++ .../ethernet/marvell/octeontx2/af/rvu_cgx.c | 20 +++++++++++++++++++ 7 files changed, 60 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c b/drivers/net/= ethernet/marvell/octeontx2/af/cgx.c index 42044cd810b1..f29e6069acc1 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.c @@ -740,6 +740,16 @@ u64 cgx_features_get(void *cgxd) return ((struct cgx *)cgxd)->hw_features; } =20 +u64 cgx_get_dmacflt_dropped_pktcnt(void *cgxd, int lmac_id) +{ + struct cgx *cgx =3D cgxd; + + if (!is_lmac_valid(cgx, lmac_id)) + return 0; + + return cgx_read(cgx, lmac_id, CGXX_CMRX_RX_STAT4); +} + int cgx_stats_reset(void *cgxd, int lmac_id) { struct cgx *cgx =3D cgxd; @@ -1924,6 +1934,7 @@ static struct mac_ops cgx_mac_ops =3D { .pfc_config =3D cgx_lmac_pfc_config, .mac_get_pfc_frm_cfg =3D cgx_lmac_get_pfc_frm_cfg, .mac_reset =3D cgx_lmac_reset, + .get_dmacflt_dropped_pktcnt =3D cgx_get_dmacflt_dropped_pktcnt, .mac_stats_reset =3D cgx_stats_reset, .mac_x2p_reset =3D cgx_x2p_reset, .mac_enadis_rx =3D cgx_enadis_rx, diff --git a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h b/drivers/net/= ethernet/marvell/octeontx2/af/cgx.h index 92ccf343dfe0..4c5ffd0aebdc 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/cgx.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/cgx.h @@ -39,6 +39,7 @@ #define CGXX_CMRX_INT_ENA_W1S 0x058 #define CGXX_CMRX_RX_ID_MAP 0x060 #define CGXX_CMRX_RX_STAT0 0x070 +#define CGXX_CMRX_RX_STAT4 0x090 #define CGXX_CMRX_RX_LOGL_XON 0x100 #define CGXX_CMRX_RX_LMACS 0x128 #define CGXX_CMRX_RX_DMAC_CTL0 (0x1F8 + mac_ops->csr_offset) @@ -186,5 +187,6 @@ int cgx_lmac_get_pfc_frm_cfg(void *cgxd, int lmac_id, u= 8 *tx_pause, int verify_lmac_fc_cfg(void *cgxd, int lmac_id, u8 tx_pause, u8 rx_pause, int pfvf_idx); int cgx_lmac_reset(void *cgxd, int lmac_id, u8 pf_req_flr); +u64 cgx_get_dmacflt_dropped_pktcnt(void *cgx, int lmac_id); u32 cgx_get_fifo_len(void *cgxd); #endif /* CGX_H */ diff --git a/drivers/net/ethernet/marvell/octeontx2/af/lmac_common.h b/driv= ers/net/ethernet/marvell/octeontx2/af/lmac_common.h index 6180e68e1765..82446f6c27a3 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/lmac_common.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/lmac_common.h @@ -134,6 +134,7 @@ struct mac_ops { int (*mac_stats_reset)(void *cgxd, int lmac_id); void (*mac_x2p_reset)(void *cgxd, bool enable); int (*mac_enadis_rx)(void *cgxd, int lmac_id, bool enable); + u64 (*get_dmacflt_dropped_pktcnt)(void *cgxd, int lmac_id); }; =20 struct cgx { diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net= /ethernet/marvell/octeontx2/af/mbox.h index a3e273126e4e..2b653a572eba 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h @@ -197,6 +197,8 @@ M(CGX_MAC_ADDR_UPDATE, 0x21E, cgx_mac_addr_update, cgx_= mac_addr_update_req, \ cgx_mac_addr_update_rsp) \ M(CGX_PRIO_FLOW_CTRL_CFG, 0x21F, cgx_prio_flow_ctrl_cfg, cgx_pfc_cfg, \ cgx_pfc_rsp) \ +M(CGX_DMAC_FILTER_DROP_CNT, 0x220, cgx_get_dmacflt_dropped_pktcnt, msg_req= , \ + cgx_dmac_filter_drop_cnt) \ /* NPA mbox IDs (range 0x400 - 0x5FF) */ \ M(NPA_LF_ALLOC, 0x400, npa_lf_alloc, \ npa_lf_alloc_req, npa_lf_alloc_rsp) \ @@ -718,6 +720,11 @@ struct cgx_mac_addr_update_rsp { u32 index; }; =20 +struct cgx_dmac_filter_drop_cnt { + struct mbox_msghdr hdr; + u64 count; +}; + #define RVU_LMAC_FEAT_FC BIT_ULL(0) /* pause frames */ #define RVU_LMAC_FEAT_HIGIG2 BIT_ULL(1) /* flow control from physical link higig2 messages */ diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rpm.c b/drivers/net/= ethernet/marvell/octeontx2/af/rpm.c index 2e9945446199..7e0e0c5c11a3 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rpm.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rpm.c @@ -37,7 +37,8 @@ static struct mac_ops rpm_mac_ops =3D { .mac_tx_enable =3D rpm_lmac_tx_enable, .pfc_config =3D rpm_lmac_pfc_config, .mac_get_pfc_frm_cfg =3D rpm_lmac_get_pfc_frm_cfg, - .mac_reset =3D rpm_lmac_reset, + .mac_reset =3D rpm_lmac_reset, + .get_dmacflt_dropped_pktcnt =3D rpm_get_dmacflt_dropped_pktcn= t, .mac_stats_reset =3D rpm_stats_reset, .mac_x2p_reset =3D rpm_x2p_reset, .mac_enadis_rx =3D rpm_enadis_rx, @@ -73,6 +74,7 @@ static struct mac_ops rpm2_mac_ops =3D { .pfc_config =3D rpm_lmac_pfc_config, .mac_get_pfc_frm_cfg =3D rpm_lmac_get_pfc_frm_cfg, .mac_reset =3D rpm_lmac_reset, + .get_dmacflt_dropped_pktcnt =3D rpm_get_dmacflt_dropped_pktcnt, .mac_stats_reset =3D rpm_stats_reset, .mac_x2p_reset =3D rpm_x2p_reset, .mac_enadis_rx =3D rpm_enadis_rx, @@ -449,6 +451,20 @@ int rpm_get_tx_stats(void *rpmd, int lmac_id, int idx,= u64 *tx_stat) return 0; } =20 +u64 rpm_get_dmacflt_dropped_pktcnt(void *rpmd, int lmac_id) +{ + rpm_t *rpm =3D rpmd; + u64 dmac_flt_stat; + + if (!is_lmac_valid(rpm, lmac_id)) + return 0; + + dmac_flt_stat =3D is_dev_rpm2(rpm) ? RPM2_CMRX_RX_STAT2 : + RPMX_CMRX_RX_STAT2; + + return rpm_read(rpm, lmac_id, dmac_flt_stat); +} + int rpm_stats_reset(void *rpmd, int lmac_id) { rpm_t *rpm =3D rpmd; diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rpm.h b/drivers/net/= ethernet/marvell/octeontx2/af/rpm.h index b8d3972e096a..443481010aba 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rpm.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/rpm.h @@ -60,6 +60,7 @@ #define RPMX_MTI_STAT_RX_STAT_PAGES_COUNTERX 0x12000 #define RPMX_MTI_STAT_TX_STAT_PAGES_COUNTERX 0x13000 #define RPMX_MTI_STAT_DATA_HI_CDC 0x10038 +#define RPMX_CMRX_RX_STAT2 0x4010 =20 #define RPM_LMAC_FWI 0xa #define RPM_TX_EN BIT_ULL(0) @@ -129,6 +130,7 @@ int rpm_lmac_enadis_pause_frm(void *rpmd, int lmac_id, = u8 tx_pause, u8 rx_pause); int rpm_get_tx_stats(void *rpmd, int lmac_id, int idx, u64 *tx_stat); int rpm_get_rx_stats(void *rpmd, int lmac_id, int idx, u64 *rx_stat); +u64 rpm_get_dmacflt_dropped_pktcnt(void *rpmd, int lmac_id); void rpm_lmac_ptp_config(void *rpmd, int lmac_id, bool enable); int rpm_lmac_rx_tx_enable(void *rpmd, int lmac_id, bool enable); int rpm_lmac_tx_enable(void *rpmd, int lmac_id, bool enable); diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c b/drivers/= net/ethernet/marvell/octeontx2/af/rvu_cgx.c index 3abd750a4bd7..aef0087174b7 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c @@ -1352,3 +1352,23 @@ void rvu_mac_reset(struct rvu *rvu, u16 pcifunc) if (mac_ops->mac_reset(cgxd, lmac, !is_vf(pcifunc))) dev_err(rvu->dev, "Failed to reset MAC\n"); } + +int rvu_mbox_handler_cgx_get_dmacflt_dropped_pktcnt(struct rvu *rvu, + struct msg_req *req, + struct cgx_dmac_filter_drop_cnt *rsp) +{ + int pf =3D rvu_get_pf(rvu->pdev, req->hdr.pcifunc); + struct mac_ops *mac_ops; + u8 cgx_id, lmac_id; + void *cgxd; + + rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id); + cgxd =3D rvu_cgx_pdata(cgx_id, rvu); + mac_ops =3D get_mac_ops(cgxd); + + if (!mac_ops->get_dmacflt_dropped_pktcnt) + return 0; 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charset="utf-8" This patch adds support for DMAC_FILTER trap. devlink trap show pci/0002:02:00.0: name otx2_dmac_filter type drop generic false action trap group l2_drops to get counter devlink -s trap show pci/0002:02:00.0: name otx2_dmac_filter type drop generic false action trap group l2_drops stats: rx: bytes 0 packets 0 dropped 0 Signed-off-by: Hariprasad Kelam --- V2 * fix warning reported by kernel test robot .../marvell/octeontx2/nic/otx2_devlink.c | 165 ++++++++++++++++++ .../marvell/octeontx2/nic/otx2_devlink.h | 23 ++- .../ethernet/marvell/octeontx2/nic/otx2_pf.c | 7 + 3 files changed, 194 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_devlink.c b/dr= ivers/net/ethernet/marvell/octeontx2/nic/otx2_devlink.c index a72694219df4..9f1b78286695 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_devlink.c +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_devlink.c @@ -6,6 +6,17 @@ =20 #include "otx2_common.h" =20 +static struct devlink_trap_group otx2_trap_groups_arr[] =3D { + /* No policer is associated with following groups (policerid =3D=3D 0)*/ + DEVLINK_TRAP_GROUP_GENERIC(L2_DROPS, 0), +}; + +static struct otx2_trap otx2_trap_items_arr[] =3D { + { + .trap =3D OTX2_TRAP_DROP(DMAC_FILTER, L2_DROPS), + }, +}; + /* Devlink Params APIs */ static int otx2_dl_mcam_count_validate(struct devlink *devlink, u32 id, union devlink_param_value val, @@ -189,11 +200,93 @@ static int otx2_devlink_eswitch_mode_set(struct devli= nk *devlink, u16 mode, } #endif =20 +static struct otx2_trap_item * +otx2_devlink_trap_item_lookup(struct otx2_devlink *dl, u16 trap_id) +{ + struct otx2_trap_data *trap_data =3D dl->trap_data; + int i; + + for (i =3D 0; i < ARRAY_SIZE(otx2_trap_items_arr); i++) { + if (otx2_trap_items_arr[i].trap.id =3D=3D trap_id) + return &trap_data->trap_items_arr[i]; + } + + return NULL; +} + +static int otx2_trap_init(struct devlink *devlink, + const struct devlink_trap *trap, void *trap_ctx) +{ + struct otx2_devlink *otx2_dl =3D devlink_priv(devlink); + struct otx2_trap_item *trap_item; + + trap_item =3D otx2_devlink_trap_item_lookup(otx2_dl, trap->id); + if (WARN_ON(!trap_item)) + return -EINVAL; + + trap_item->trap_ctx =3D trap_ctx; + trap_item->action =3D trap->init_action; + + return 0; +} + +static int otx2_trap_action_set(struct devlink *devlink, + const struct devlink_trap *trap, + enum devlink_trap_action action, + struct netlink_ext_ack *extack) +{ + /* Currently, driver does not support trap action altering */ + return -EOPNOTSUPP; +} + +static int +otx2_trap_drop_counter_get(struct devlink *devlink, + const struct devlink_trap *trap, + u64 *p_drops) +{ + struct otx2_devlink *otx2_dl =3D devlink_priv(devlink); + struct otx2_nic *pfvf =3D otx2_dl->pfvf; + struct cgx_dmac_filter_drop_cnt *rsp; + struct msg_req *req; + int err; + + if (trap->id !=3D DEVLINK_TRAP_GENERIC_ID_DMAC_FILTER) + return -EINVAL; + + /* send mailbox to AF */ + mutex_lock(&pfvf->mbox.lock); + + req =3D otx2_mbox_alloc_msg_cgx_get_dmacflt_dropped_pktcnt(&pfvf->mbox); + if (!req) { + mutex_unlock(&pfvf->mbox.lock); + return -ENOMEM; + } + + err =3D otx2_sync_mbox_msg(&pfvf->mbox); + if (err) + goto fail; + + rsp =3D (struct cgx_dmac_filter_drop_cnt *) + otx2_mbox_get_rsp(&pfvf->mbox.mbox, 0, &req->hdr); + if (IS_ERR(rsp)) { + err =3D PTR_ERR(rsp); + goto fail; + } + *p_drops =3D rsp->count; + +fail: + mutex_unlock(&pfvf->mbox.lock); + return err; +} + static const struct devlink_ops otx2_devlink_ops =3D { #ifdef CONFIG_RVU_ESWITCH .eswitch_mode_get =3D otx2_devlink_eswitch_mode_get, .eswitch_mode_set =3D otx2_devlink_eswitch_mode_set, #endif + .trap_init =3D otx2_trap_init, + .trap_action_set =3D otx2_trap_action_set, + .trap_drop_counter_get =3D otx2_trap_drop_counter_get, }; =20 int otx2_register_dl(struct otx2_nic *pfvf) @@ -242,3 +335,75 @@ void otx2_unregister_dl(struct otx2_nic *pfvf) devlink_free(dl); } EXPORT_SYMBOL(otx2_unregister_dl); + +int otx2_devlink_traps_register(struct otx2_nic *pf) +{ + const u32 groups_count =3D ARRAY_SIZE(otx2_trap_groups_arr); + const u32 traps_count =3D ARRAY_SIZE(otx2_trap_items_arr); + struct devlink *devlink =3D priv_to_devlink(pf->dl); + struct otx2_trap_data *trap_data; + struct otx2_trap *otx2_trap; + int err, i; + + trap_data =3D kzalloc(sizeof(*trap_data), GFP_KERNEL); + if (!trap_data) + return -ENOMEM; + + trap_data->trap_items_arr =3D kcalloc(traps_count, + sizeof(struct otx2_trap_item), + GFP_KERNEL); + if (!trap_data->trap_items_arr) { + err =3D -ENOMEM; + goto err_trap_items_alloc; + } + + trap_data->dl =3D pf->dl; + trap_data->traps_count =3D traps_count; + pf->dl->trap_data =3D trap_data; + + err =3D devlink_trap_groups_register(devlink, otx2_trap_groups_arr, + groups_count); + if (err) + goto err_groups_register; + + for (i =3D 0; i < traps_count; i++) { + otx2_trap =3D &otx2_trap_items_arr[i]; + err =3D devlink_traps_register(devlink, &otx2_trap->trap, 1, + pf); + if (err) + goto err_trap_register; + } + + return 0; + +err_trap_register: + for (i--; i >=3D 0; i--) { + otx2_trap =3D &otx2_trap_items_arr[i]; + devlink_traps_unregister(devlink, &otx2_trap->trap, 1); + } + devlink_trap_groups_unregister(devlink, otx2_trap_groups_arr, + groups_count); +err_groups_register: + kfree(trap_data->trap_items_arr); +err_trap_items_alloc: + kfree(trap_data); + return err; +} + +void otx2_devlink_traps_unregister(struct otx2_nic *pf) +{ + struct otx2_trap_data *trap_data =3D pf->dl->trap_data; + struct devlink *devlink =3D priv_to_devlink(pf->dl); + const struct devlink_trap *trap; + int i; + + for (i =3D 0; i < ARRAY_SIZE(otx2_trap_items_arr); ++i) { + trap =3D &otx2_trap_items_arr[i].trap; + devlink_traps_unregister(devlink, trap, 1); + } + + devlink_trap_groups_unregister(devlink, otx2_trap_groups_arr, + ARRAY_SIZE(otx2_trap_groups_arr)); + kfree(trap_data->trap_items_arr); + kfree(trap_data); +} diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_devlink.h b/dr= ivers/net/ethernet/marvell/octeontx2/nic/otx2_devlink.h index c7bd4f3c6c6b..d127d54941bf 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_devlink.h +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_devlink.h @@ -8,13 +8,34 @@ #ifndef OTX2_DEVLINK_H #define OTX2_DEVLINK_H =20 +#define OTX2_TRAP_DROP(_id, _group_id) \ + DEVLINK_TRAP_GENERIC(DROP, DROP, _id, \ + DEVLINK_TRAP_GROUP_GENERIC_ID_##_group_id, \ + DEVLINK_TRAP_METADATA_TYPE_F_IN_PORT) +struct otx2_trap { + struct devlink_trap trap; +}; + +struct otx2_trap_item { + enum devlink_trap_action action; + void *trap_ctx; +}; + +struct otx2_trap_data { + struct otx2_devlink *dl; + struct otx2_trap_item *trap_items_arr; + u32 traps_count; +}; + struct otx2_devlink { struct devlink *dl; struct otx2_nic *pfvf; + struct otx2_trap_data *trap_data; }; =20 /* Devlink APIs */ int otx2_register_dl(struct otx2_nic *pfvf); void otx2_unregister_dl(struct otx2_nic *pfvf); - +void otx2_devlink_traps_unregister(struct otx2_nic *pfvf); +int otx2_devlink_traps_register(struct otx2_nic *pfvf); #endif /* RVU_DEVLINK_H */ diff --git a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c b/drivers= /net/ethernet/marvell/octeontx2/nic/otx2_pf.c index a7feb4c392b3..5da1605a1a90 100644 --- a/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c +++ b/drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c @@ -3282,6 +3282,10 @@ static int otx2_probe(struct pci_dev *pdev, const st= ruct pci_device_id *id) if (err) goto err_mcam_flow_del; =20 + err =3D otx2_devlink_traps_register(pf); + if (err) + goto err_traps_unregister; + /* Initialize SR-IOV resources */ err =3D otx2_sriov_vfcfg_init(pf); if (err) @@ -3314,6 +3318,8 @@ static int otx2_probe(struct pci_dev *pdev, const str= uct pci_device_id *id) otx2_sriov_vfcfg_cleanup(pf); err_pf_sriov_init: otx2_shutdown_tc(pf); +err_traps_unregister: + otx2_devlink_traps_unregister(pf); err_mcam_flow_del: otx2_mcam_flow_del(pf); err_unreg_netdev: @@ -3514,6 +3520,7 @@ static void otx2_remove(struct pci_dev *pdev) /* Disable link notifications */ otx2_cgx_config_linkevents(pf, false); =20 + otx2_devlink_traps_unregister(pf); otx2_unregister_dl(pf); unregister_netdev(netdev); cn10k_ipsec_clean(pf); --=20 2.34.1