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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=leica-geosystems.com.cn; Received-SPF: Pass (protection.outlook.com: domain of leica-geosystems.com.cn designates 193.8.40.99 as permitted sender) receiver=protection.outlook.com; client-ip=193.8.40.99; helo=hexagon.com; pr=C Received: from hexagon.com (193.8.40.99) by AMS0EPF000001AC.mail.protection.outlook.com (10.167.16.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9542.4 via Frontend Transport; Fri, 16 Jan 2026 11:19:11 +0000 Received: from aherlnxbspsrv01.lgs-net.com ([10.61.228.61]) by hexagon.com with Microsoft SMTPSVC(10.0.17763.1697); Fri, 16 Jan 2026 12:19:09 +0100 From: LI Qingwu To: o.rempel@pengutronix.de, kernel@pengutronix.de, andi.shyti@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, festevam@gmail.com, linux-i2c@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: bsp-development.geo@leica-geosystems.com, LI Qingwu Subject: [PATCH V3 2/2] i2c: imx: add abort path for invalid block length Date: Fri, 16 Jan 2026 11:19:06 +0000 Message-ID: <20260116111906.3413346-3-Qing-wu.Li@leica-geosystems.com.cn> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260116111906.3413346-1-Qing-wu.Li@leica-geosystems.com.cn> References: <20260116111906.3413346-1-Qing-wu.Li@leica-geosystems.com.cn> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-OriginalArrivalTime: 16 Jan 2026 11:19:09.0572 (UTC) FILETIME=[EF567C40:01DC86D9] X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AMS0EPF000001AC:EE_|VE1PR06MB6975:EE_ X-MS-Office365-Filtering-Correlation-Id: 07623958-bd6b-42ad-1965-08de54f112c9 X-SET-LOWER-SCL-SCANNER: YES X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|1800799024|82310400026|36860700013|921020; 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X-OriginatorOrg: leica-geosystems.com.cn X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Jan 2026 11:19:11.1184 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 07623958-bd6b-42ad-1965-08de54f112c9 X-MS-Exchange-CrossTenant-Id: 1b16ab3e-b8f6-4fe3-9f3e-2db7fe549f6a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=1b16ab3e-b8f6-4fe3-9f3e-2db7fe549f6a;Ip=[193.8.40.99];Helo=[hexagon.com] X-MS-Exchange-CrossTenant-AuthSource: AMS0EPF000001AC.eurprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR06MB6975 Content-Type: text/plain; charset="utf-8" When a block read returns an invalid length (0 or >I2C_SMBUS_BLOCK_MAX), the current implementation leaves the bus hanging with SDA held low, blocking all further I2C communication on the bus. Add a dedicated IMX_I2C_STATE_READ_BLOCK_DATA_ABORT state and ISR handler to properly terminate the transfer when an invalid block length is detected: - Set TXAK and receive the next byte with NACK - On the following interrupt, generate a Stop condition - Read and discard the final byte - Report -EPROTO to the caller This ensures the bus is released correctly and allows other devices on the bus to continue operating normally. Tested on i.MX 8M Plus with continuous block read operations. Signed-off-by: LI Qingwu --- drivers/i2c/busses/i2c-imx.c | 55 ++++++++++++++++++++++++++++++++++-- 1 file changed, 53 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c index 05ba41144648..d3fbc2df7f04 100644 --- a/drivers/i2c/busses/i2c-imx.c +++ b/drivers/i2c/busses/i2c-imx.c @@ -232,6 +232,7 @@ enum imx_i2c_state { IMX_I2C_STATE_READ_CONTINUE, IMX_I2C_STATE_READ_BLOCK_DATA, IMX_I2C_STATE_READ_BLOCK_DATA_LEN, + IMX_I2C_STATE_READ_BLOCK_DATA_ABORT, }; =20 struct imx_i2c_struct { @@ -1053,14 +1054,60 @@ static inline void i2c_imx_isr_read_continue(struct= imx_i2c_struct *i2c_imx) i2c_imx->msg->buf[i2c_imx->msg_buf_idx++] =3D imx_i2c_read_reg(i2c_imx, I= MX_I2C_I2DR); } =20 +static inline void i2c_imx_isr_read_block_data_abort(struct imx_i2c_struct= *i2c_imx) +{ + unsigned int temp =3D imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); + + if (i2c_imx->is_lastmsg) { + /* + * Last byte to read. + * + * Ref: IMX8MPRM Rev. 1, 06/2021: 17.1.4.4 Generation of Stop + * + * Ref: IMX8MPRM Rev. 1, 06/2021: Figure 17-5. + * Flowchart of typical I2C interrupt routine + * + * Before the last byte is read, a Stop signal must be generated. + */ + temp =3D imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); + if (!(temp & I2CR_MSTA)) + i2c_imx->stopped =3D 1; + temp &=3D ~(I2CR_MSTA | I2CR_MTX); + imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); + imx_i2c_read_reg(i2c_imx, IMX_I2C_I2DR); + i2c_imx->state =3D IMX_I2C_STATE_FAILED; + wake_up(&i2c_imx->queue); + } else { + /* + * Next-to-last byte to read. + * + * Ref: IMX8MPRM Rev. 1, 06/2021: 17.1.4.4 Generation of Stop + * + * Ref: IMX8MPRM Rev. 1, 06/2021: Figure 17-5. + * Flowchart of typical I2C interrupt routine + * + * For a master receiver to terminate a data transfer, it must + * inform the slave transmitter by not acknowledging the last + * data byte. This is done by setting the transmit acknowledge + * bit (I2C_I2CR[TXAK]) before reading the next-to-last byte. + */ + temp =3D imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); + temp |=3D I2CR_TXAK; + imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR); + imx_i2c_read_reg(i2c_imx, IMX_I2C_I2DR); + i2c_imx->is_lastmsg =3D true; + } +} + static inline void i2c_imx_isr_read_block_data_len(struct imx_i2c_struct *= i2c_imx) { u8 len =3D imx_i2c_read_reg(i2c_imx, IMX_I2C_I2DR); =20 if (len =3D=3D 0 || len > I2C_SMBUS_BLOCK_MAX) { i2c_imx->isr_result =3D -EPROTO; - i2c_imx->state =3D IMX_I2C_STATE_FAILED; - wake_up(&i2c_imx->queue); + i2c_imx->state =3D IMX_I2C_STATE_READ_BLOCK_DATA_ABORT; + i2c_imx->is_lastmsg =3D false; + return; } i2c_imx->msg->len +=3D len; i2c_imx->msg->buf[i2c_imx->msg_buf_idx++] =3D len; @@ -1106,6 +1153,10 @@ static irqreturn_t i2c_imx_master_isr(struct imx_i2c= _struct *i2c_imx, unsigned i i2c_imx->state =3D IMX_I2C_STATE_READ_CONTINUE; break; =20 + case IMX_I2C_STATE_READ_BLOCK_DATA_ABORT: + i2c_imx_isr_read_block_data_abort(i2c_imx); + break; + case IMX_I2C_STATE_WRITE: if (i2c_imx_isr_write(i2c_imx)) break; --=20 2.43.0