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[144.178.202.138]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-654534c8b7fsm2495528a12.27.2026.01.16.05.38.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Jan 2026 05:39:00 -0800 (PST) From: Luca Weiss Date: Fri, 16 Jan 2026 14:38:55 +0100 Subject: [PATCH 1/4] dt-bindings: eeprom: at24: Add compatible for Puya P24C128F Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260116-milos-cci-v1-1-28e01128da9c@fairphone.com> References: <20260116-milos-cci-v1-0-28e01128da9c@fairphone.com> In-Reply-To: <20260116-milos-cci-v1-0-28e01128da9c@fairphone.com> To: Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Loic Poulain , Robert Foss , Andi Shyti , Bjorn Andersson , Konrad Dybcio Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Luca Weiss X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1768570739; l=760; i=luca.weiss@fairphone.com; s=20250611; h=from:subject:message-id; bh=nEScFanfNrxGNGZLUPFf399LbTooRWB98GdPMPA/SFI=; b=XdrzpSl7fP2WLPzVrTRnTdUYSZW/WnQtQlGHwdOlUDBqE+gTfguxeGO/CffNF7gAQU98iB5UT oDBuIYisP4wBXOheuJzocP8KhUpztqwy4K/p70pWAbcMTn/LYMKtz56 X-Developer-Key: i=luca.weiss@fairphone.com; a=ed25519; pk=O1aw+AAust5lEmgrNJ1Bs7PTY0fEsJm+mdkjExA69q8= Add the compatible for an 128Kb EEPROM from Puya. Signed-off-by: Luca Weiss Reviewed-by: Konrad Dybcio --- Documentation/devicetree/bindings/eeprom/at24.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/eeprom/at24.yaml b/Documenta= tion/devicetree/bindings/eeprom/at24.yaml index 95ac2f15f601..ef88f46928a4 100644 --- a/Documentation/devicetree/bindings/eeprom/at24.yaml +++ b/Documentation/devicetree/bindings/eeprom/at24.yaml @@ -142,6 +142,7 @@ properties: - enum: - giantec,gt24p128e - giantec,gt24p128f + - puya,p24c128f - renesas,r1ex24128 - samsung,s524ad0xd1 - const: atmel,24c128 --=20 2.52.0 From nobody Mon Feb 9 07:56:08 2026 Received: from mail-ed1-f68.google.com (mail-ed1-f68.google.com [209.85.208.68]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 48C57283FEA for ; Fri, 16 Jan 2026 13:39:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.68 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768570745; cv=none; b=Pf5JzkQO/PbP9SODWjs5NMKABWVj1JWYc0zuSfAinBSTthtI5I8mkINu0+iTnCv5xCTRFs5MAjYclNjymFfqThKFHv58ombWtOZNilJskdqJIq37YIK1/zwSCeQo5HP82Gl4ia6/GHzlRjwYm9pPov8skJ2DkiFynPN6iOElai0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768570745; c=relaxed/simple; bh=74xQUaywxzeebI3p/AKN6vOvKb6pTQmwzWbQ8IBCY4s=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=JAVuOVyOvz8C4RZJ+g9kRXiIxTUAhj8piqcHvzWcskg+buSeBROC/LqyiSOr4fF1bbrLGJEXzGtS8/MRBZ0KT2IhL3osBNUcCogHBOG6zitY2A/u82ldhKGtaghahFaq+2rT/SC4r2FWTyMVFA7xcawdBlZryGKpxrhWhDTeoP4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=fairphone.com; spf=pass smtp.mailfrom=fairphone.com; dkim=pass (2048-bit key) header.d=fairphone.com header.i=@fairphone.com header.b=whdr5xjG; arc=none smtp.client-ip=209.85.208.68 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=fairphone.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fairphone.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=fairphone.com header.i=@fairphone.com header.b="whdr5xjG" Received: by mail-ed1-f68.google.com with SMTP id 4fb4d7f45d1cf-64b83949fdaso3177507a12.2 for ; Fri, 16 Jan 2026 05:39:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=fairphone.com; s=fair; t=1768570742; x=1769175542; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=Z8zv40JK1XZcjIozgFMQWPRZtDjY+q87cahOipxhXqc=; b=whdr5xjGPAr4xGQWjzO6+5Xn7vHN2ilIZ3WAZSbBpiEBuhtq9jz+0Llr6PwiwP4bPl PJ5iH8SIPv1AEttVnfZn8ltO5svkD9irbu4sP5h8o5WtAGOODJ4yqur8qc3S5lPrO2XZ Cj/16udoG0q/YGt4r2QO3YhH8nky7usssrcTfHloRNHYctO9GwV9rBV0QjQ434MkN3qP Y7Vzl0Y3OGhFl2oLhgfdRgICk+axeU2fmt0aL1XTt5piN0yrQeVDIJ/AgXscHqrR+SD3 hLIAkOsgO5hpUX5HaZpTe/YIxVVY/LOGNPJqM4MIZMeTEWcWdY1kcOaS0aNgN1XjOhlg o+wA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1768570742; x=1769175542; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; bh=Z8zv40JK1XZcjIozgFMQWPRZtDjY+q87cahOipxhXqc=; b=mn9GBOeTvl0Mo+PS5Fi4+KrEt21s+A3h47OnPM15yucwRZFQoNDmTff8LjTD0yzxT4 ENDwihmMzBD8YBNbMn3Ww2XgQXsMKCbpjuBh78CwW+k1/se1d44FEBXiqcbI3QlGYv9R sv7IjBA+hghojZOogNHsolK0rNEnEVkZ+oBtMH69yL4FLXKyytFZ7gwLslhkidk7UgEM WfvyfLFCS/oCnBvfcBUSH/8CyujxmpCSZwy/HvMEwuC7Id688kg42uEg2RU+UinXA8/t 0EQUtm1cfs1GEQFoZAJl/kKy24YsnNqMUIEKgWnhHIQ9hYQ82ib2vIJ146bhfqNbAFKq ZJaQ== X-Forwarded-Encrypted: i=1; AJvYcCWgCltXHs5J+dD+sJGbhddrUEgVjtodEFj2gJmfVsRnJM7ni1GTbOI0BOYvAmPyKmH0kd49UTxSiXhXGlc=@vger.kernel.org X-Gm-Message-State: AOJu0Yx8TpTJ4rapYzLuNMK9BBLE1aHUXJqMsjrzqDI4PM8kliK3wRuJ dL4dB2q10mHq57H2/iHNAdZjHHBv2dxaXnUn0NWb+4FLkcqBYWQjFUcBSbQlsoQvHDw= X-Gm-Gg: AY/fxX4GgYN1pi93SPfoUqLsPUXP10KlOFO/D8dsVFYZplgy2bkMSZmQiV1jPdSvBmA 2ZJY5AkTbC5hSKHyVrOJv2uxD3rz+fBHF15rshpsVUM7ceQyTlntZqqVJAeemKTGDBPMnDIkrIf 7lS+VxdzTGJ9ffv1lmK/k6j+Acb66tYLCW/2H5NN7R2fqwqCcGQPx0Q3q/LzjnNpd6K1yqlBjrH W6/YgF20dAX7vMeF19Z4QX/985kqRFxfCKWhgdwDEaVubF72sUww/2xUgvPj5KJRUKiyExVLSbz gbz3B2JNpcvocZHy98iSLIf8LjsbRTvnZ+XWolvBJeaqiAb+jtBw9BLbCTqVLBbTqRZN62OUOke n6RbnWInKQjla3Ai3gC5/LXpPSlXLuVhSERjpg8nX9x4LmWzaFlEznxPJzU7NwlvWGFFVn7FLWl oCwhm0FV9zXaSLHuD0C438q0z0YXCtONFCWn3/VdGxN6rW1o6f9DR8sfI7LecMXhHs X-Received: by 2002:a05:6402:2691:b0:653:9cd7:2003 with SMTP id 4fb4d7f45d1cf-65452bcc0c3mr2165991a12.24.1768570741805; Fri, 16 Jan 2026 05:39:01 -0800 (PST) Received: from [172.16.240.99] (144-178-202-138.static.ef-service.nl. [144.178.202.138]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-654534c8b7fsm2495528a12.27.2026.01.16.05.39.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Jan 2026 05:39:01 -0800 (PST) From: Luca Weiss Date: Fri, 16 Jan 2026 14:38:56 +0100 Subject: [PATCH 2/4] dt-bindings: i2c: qcom-cci: Document Milos compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260116-milos-cci-v1-2-28e01128da9c@fairphone.com> References: <20260116-milos-cci-v1-0-28e01128da9c@fairphone.com> In-Reply-To: <20260116-milos-cci-v1-0-28e01128da9c@fairphone.com> To: Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Loic Poulain , Robert Foss , Andi Shyti , Bjorn Andersson , Konrad Dybcio Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Luca Weiss X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1768570739; l=1279; i=luca.weiss@fairphone.com; s=20250611; h=from:subject:message-id; bh=74xQUaywxzeebI3p/AKN6vOvKb6pTQmwzWbQ8IBCY4s=; b=8ik9vEwbTmvcrvG32NYH2EN1MhNw4//P9Jd+czHCtEtrqLHOGMqyBC/ZV/QD9GSLNvH4R7URP trRK9NQutJnAMLsQlLa+UqGe5SKSbZShdm0MRdt/xRrUeziMBoeH+ZJ X-Developer-Key: i=luca.weiss@fairphone.com; a=ed25519; pk=O1aw+AAust5lEmgrNJ1Bs7PTY0fEsJm+mdkjExA69q8= Add Milos compatible for the CAMSS CCI interfaces. Signed-off-by: Luca Weiss --- .../devicetree/bindings/i2c/qcom,i2c-cci.yaml | 18 ++++++++++++++= ++++ 1 file changed, 18 insertions(+) diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml b/Docu= mentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml index a3fe1eea6aec..c57d81258fba 100644 --- a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml +++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml @@ -27,6 +27,7 @@ properties: - items: - enum: - qcom,kaanapali-cci + - qcom,milos-cci - qcom,qcm2290-cci - qcom,sa8775p-cci - qcom,sc7280-cci @@ -263,6 +264,23 @@ allOf: - const: cpas_ahb - const: cci =20 + - if: + properties: + compatible: + contains: + enum: + - qcom,milos-cci + then: + properties: + clocks: + minItems: 3 + maxItems: 3 + clock-names: + items: + - const: soc_ahb + - const: cpas_ahb + - const: cci + additionalProperties: false =20 examples: --=20 2.52.0 From nobody Mon Feb 9 07:56:08 2026 Received: from mail-ed1-f52.google.com (mail-ed1-f52.google.com [209.85.208.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 38CE1285CAA for ; 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[144.178.202.138]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-654534c8b7fsm2495528a12.27.2026.01.16.05.39.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Jan 2026 05:39:02 -0800 (PST) From: Luca Weiss Date: Fri, 16 Jan 2026 14:38:57 +0100 Subject: [PATCH 3/4] arm64: dts: qcom: milos: Add CCI busses Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260116-milos-cci-v1-3-28e01128da9c@fairphone.com> References: <20260116-milos-cci-v1-0-28e01128da9c@fairphone.com> In-Reply-To: <20260116-milos-cci-v1-0-28e01128da9c@fairphone.com> To: Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Loic Poulain , Robert Foss , Andi Shyti , Bjorn Andersson , Konrad Dybcio Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Luca Weiss X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1768570739; l=5415; i=luca.weiss@fairphone.com; s=20250611; h=from:subject:message-id; bh=Yfgai6qrSyDXbvMaMx6loOe5siBb8JOHwHrZfKdrvlc=; b=PlG90T1HaQ7oCDdUV+49GaybYGmN222ZTMKkMQRFhBG4axvFxsoJObUUAP15jmqi71hrFT7pm 9LMqbh4vENpC4Nq7lCPXr7+2pxqeSL/RPs40ONy738CjJqVYPTohv+m X-Developer-Key: i=luca.weiss@fairphone.com; a=ed25519; pk=O1aw+AAust5lEmgrNJ1Bs7PTY0fEsJm+mdkjExA69q8= Add the nodes and the pinctrl for the CCI I2C busses on the Milos SoC. Signed-off-by: Luca Weiss --- arch/arm64/boot/dts/qcom/milos.dtsi | 194 ++++++++++++++++++++++++++++++++= ++++ 1 file changed, 194 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/milos.dtsi b/arch/arm64/boot/dts/qcom= /milos.dtsi index 58b4c2966df1..c8771beffa9b 100644 --- a/arch/arm64/boot/dts/qcom/milos.dtsi +++ b/arch/arm64/boot/dts/qcom/milos.dtsi @@ -1652,6 +1652,72 @@ videocc: clock-controller@aaf0000 { #power-domain-cells =3D <1>; }; =20 + cci0: cci@ac15000 { + compatible =3D "qcom,milos-cci", "qcom,msm8996-cci"; + reg =3D <0x0 0x0ac15000 0x0 0x1000>; + interrupts =3D ; + power-domains =3D <&camcc CAM_CC_CAMSS_TOP_GDSC>; + clocks =3D <&camcc CAM_CC_SOC_AHB_CLK>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_CCI_0_CLK>; + clock-names =3D "soc_ahb", + "cpas_ahb", + "cci"; + pinctrl-0 =3D <&cci0_0_default &cci0_1_default>; + pinctrl-1 =3D <&cci0_0_sleep &cci0_1_sleep>; + pinctrl-names =3D "default", "sleep"; + status =3D "disabled"; + #address-cells =3D <1>; + #size-cells =3D <0>; + + cci0_i2c0: i2c-bus@0 { + reg =3D <0>; + clock-frequency =3D <1000000>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + cci0_i2c1: i2c-bus@1 { + reg =3D <1>; + clock-frequency =3D <1000000>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + + cci1: cci@ac16000 { + compatible =3D "qcom,milos-cci", "qcom,msm8996-cci"; + reg =3D <0x0 0x0ac16000 0x0 0x1000>; + interrupts =3D ; + power-domains =3D <&camcc CAM_CC_CAMSS_TOP_GDSC>; + clocks =3D <&camcc CAM_CC_SOC_AHB_CLK>, + <&camcc CAM_CC_CPAS_AHB_CLK>, + <&camcc CAM_CC_CCI_1_CLK>; + clock-names =3D "soc_ahb", + "cpas_ahb", + "cci"; + pinctrl-0 =3D <&cci1_0_default &cci1_1_default>; + pinctrl-1 =3D <&cci1_0_sleep &cci1_1_sleep>; + pinctrl-names =3D "default", "sleep"; + status =3D "disabled"; + #address-cells =3D <1>; + #size-cells =3D <0>; + + cci1_i2c0: i2c-bus@0 { + reg =3D <0>; + clock-frequency =3D <1000000>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + cci1_i2c1: i2c-bus@1 { + reg =3D <1>; + clock-frequency =3D <1000000>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + camcc: clock-controller@adb0000 { compatible =3D "qcom,milos-camcc"; reg =3D <0x0 0x0adb0000 0x0 0x40000>; @@ -1791,6 +1857,134 @@ tlmm: pinctrl@f100000 { =20 wakeup-parent =3D <&pdc>; =20 + cci0_0_default: cci0-0-default-state { + sda-pins { + pins =3D "gpio88"; + function =3D "cci_i2c_sda"; + drive-strength =3D <2>; + bias-pull-up =3D <2200>; + }; + + scl-pins { + pins =3D "gpio89"; + function =3D "cci_i2c_scl"; + drive-strength =3D <2>; + bias-pull-up =3D <2200>; + }; + }; + + cci0_0_sleep: cci0-0-sleep-state { + sda-pins { + pins =3D "gpio88"; + function =3D "cci_i2c_sda"; + drive-strength =3D <2>; + bias-pull-down; + }; + + scl-pins { + pins =3D "gpio89"; + function =3D "cci_i2c_scl"; + drive-strength =3D <2>; + bias-pull-down; + }; + }; + + cci0_1_default: cci0-1-default-state { + sda-pins { + pins =3D "gpio90"; + function =3D "cci_i2c_sda"; + drive-strength =3D <2>; + bias-pull-up =3D <2200>; + }; + + scl-pins { + pins =3D "gpio91"; + function =3D "cci_i2c_scl"; + drive-strength =3D <2>; + bias-pull-up =3D <2200>; + }; + }; + + cci0_1_sleep: cci0-1-sleep-state { + sda-pins { + pins =3D "gpio90"; + function =3D "cci_i2c_sda"; + drive-strength =3D <2>; + bias-pull-down; + }; + + scl-pins { + pins =3D "gpio91"; + function =3D "cci_i2c_scl"; + drive-strength =3D <2>; + bias-pull-down; + }; + }; + + cci1_0_default: cci1-0-default-state { + sda-pins { + pins =3D "gpio92"; + function =3D "cci_i2c_sda"; + drive-strength =3D <2>; + bias-pull-up =3D <2200>; + }; + + scl-pins { + pins =3D "gpio93"; + function =3D "cci_i2c_scl"; + drive-strength =3D <2>; + bias-pull-up =3D <2200>; + }; + }; + + cci1_0_sleep: cci1-0-sleep-state { + sda-pins { + pins =3D "gpio92"; + function =3D "cci_i2c_sda"; + drive-strength =3D <2>; + bias-pull-down; + }; + + scl-pins { + pins =3D "gpio93"; + function =3D "cci_i2c_scl"; + drive-strength =3D <2>; + bias-pull-down; + }; + }; + + cci1_1_default: cci1-1-default-state { + sda-pins { + pins =3D "gpio94"; + function =3D "cci_i2c_sda"; + drive-strength =3D <2>; + bias-pull-up =3D <2200>; + }; + + scl-pins { + pins =3D "gpio95"; + function =3D "cci_i2c_scl"; + drive-strength =3D <2>; + bias-pull-up =3D <2200>; + }; + }; + + cci1_1_sleep: cci1-1-sleep-state { + sda-pins { + pins =3D "gpio94"; + function =3D "cci_i2c_sda"; + drive-strength =3D <2>; + bias-pull-down; + }; + + scl-pins { + pins =3D "gpio95"; + function =3D "cci_i2c_scl"; + drive-strength =3D <2>; + bias-pull-down; + }; + }; + qup_i2c1_data_clk: qup-i2c1-data-clk-state { /* SDA, SCL */ pins =3D "gpio4", "gpio5"; --=20 2.52.0 From nobody Mon Feb 9 07:56:08 2026 Received: from mail-ed1-f46.google.com (mail-ed1-f46.google.com [209.85.208.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3815528726A for ; Fri, 16 Jan 2026 13:39:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.46 ARC-Seal: i=1; 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[144.178.202.138]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-654534c8b7fsm2495528a12.27.2026.01.16.05.39.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Jan 2026 05:39:02 -0800 (PST) From: Luca Weiss Date: Fri, 16 Jan 2026 14:38:58 +0100 Subject: [PATCH 4/4] arm64: dts: qcom: milos-fairphone-fp6: Add camera EEPROMs on CCI busses Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260116-milos-cci-v1-4-28e01128da9c@fairphone.com> References: <20260116-milos-cci-v1-0-28e01128da9c@fairphone.com> In-Reply-To: <20260116-milos-cci-v1-0-28e01128da9c@fairphone.com> To: Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Loic Poulain , Robert Foss , Andi Shyti , Bjorn Andersson , Konrad Dybcio Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Luca Weiss X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1768570739; l=1663; i=luca.weiss@fairphone.com; s=20250611; h=from:subject:message-id; bh=WtTP4Q+pd0r2GTIiE/rKycdBfVnflluT14Fgkgdo+hg=; b=Tlm9u6xt3xaLwM3g0YMIG/P0gmiBgjT0e3aiXa0JdE+oJH4t25lUsvfkeLG18t+EgT3l2SNcH PcEmJt/N5cADoY7oz/lCZC+XYi3k6OjJi+w/AD6dm/jT8cEHEfhCvRR X-Developer-Key: i=luca.weiss@fairphone.com; a=ed25519; pk=O1aw+AAust5lEmgrNJ1Bs7PTY0fEsJm+mdkjExA69q8= Enable the CCI I2C busses and add nodes for the EEPROMs found on the camera that are connected there. Signed-off-by: Luca Weiss Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/milos-fairphone-fp6.dts | 50 ++++++++++++++++++++= ++++ 1 file changed, 50 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/milos-fairphone-fp6.dts b/arch/arm64/= boot/dts/qcom/milos-fairphone-fp6.dts index 7629ceddde2a..c4a706e945ba 100644 --- a/arch/arm64/boot/dts/qcom/milos-fairphone-fp6.dts +++ b/arch/arm64/boot/dts/qcom/milos-fairphone-fp6.dts @@ -529,6 +529,56 @@ vreg_l11f: ldo11 { }; }; =20 +&cci0 { + status =3D "okay"; +}; + +&cci0_i2c0 { + /* Main cam: Sony IMX896 @ 0x1a */ + + eeprom@50 { + compatible =3D "puya,p24c128f", "atmel,24c128"; + reg =3D <0x50>; + vcc-supply =3D <&vreg_l6p>; + read-only; + }; + + /* Dongwoon DW9784 VCM/OIS @ 0x72 */ +}; + + +&cci0_i2c1 { + /* Awinic AW86017 VCM @ 0x0c */ + /* UW cam: OmniVision OV13B10 @ 0x36 */ + + eeprom@52 { + compatible =3D "puya,p24c128f", "atmel,24c128"; + reg =3D <0x52>; + vcc-supply =3D <&vreg_l6p>; + read-only; + }; +}; + +&cci1 { + /* cci1_i2c0 is not used for CCI */ + pinctrl-0 =3D <&cci1_1_default>; + pinctrl-1 =3D <&cci1_1_sleep>; + + status =3D "okay"; +}; + +&cci1_i2c1 { + /* Awinic AW86016 VCM @ 0x0c */ + /* Front cam: Samsung S5KKD1 @ 0x3d */ + + eeprom@51 { + compatible =3D "puya,p24c128f", "atmel,24c128"; + reg =3D <0x51>; + vcc-supply =3D <&vreg_l6p>; + read-only; + }; +}; + &gcc { protected-clocks =3D , , , , --=20 2.52.0