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[144.178.202.138]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b8795a350dbsm235507366b.69.2026.01.16.05.17.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Jan 2026 05:17:26 -0800 (PST) From: Luca Weiss Date: Fri, 16 Jan 2026 14:17:22 +0100 Subject: [PATCH 3/5] clk: qcom: gdsc: Support enabling interconnect path for power domain Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260116-milos-camcc-icc-v1-3-400b7fcd156a@fairphone.com> References: <20260116-milos-camcc-icc-v1-0-400b7fcd156a@fairphone.com> In-Reply-To: <20260116-milos-camcc-icc-v1-0-400b7fcd156a@fairphone.com> To: Georgi Djakov , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Konrad Dybcio Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, Luca Weiss X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1768569443; l=2630; i=luca.weiss@fairphone.com; s=20250611; h=from:subject:message-id; bh=FtewN/DrAXamJnpTOxO78vEZuuizOqYgKqBWZjIni9M=; b=x4GXwqWuo6jrdq33GBtT6tJ+qKr74k1xcIHAngz8zsb5pzHU3zqpcBtB/3sXgYHAwKBDQUV4/ MCX7Lg5LzliARKzTzK8Eg1nE2qFKjmTiYZqAzcdsWWTMObC+Om+nhzP X-Developer-Key: i=luca.weiss@fairphone.com; a=ed25519; pk=O1aw+AAust5lEmgrNJ1Bs7PTY0fEsJm+mdkjExA69q8= On newer SoCs like Milos the CAMSS_TOP_GDSC power domains requires the enablement of the multimedia NoC, otherwise the GDSC will be stuck on 'off'. Add support for getting an interconnect path as specified in the SoC clock driver, and enabling/disabling that interconnect path when the GDSC is being enabled/disabled. Signed-off-by: Luca Weiss --- icc_enable()/icc_disable() seems like a nice API but doesn't work without setting the bandwidth first, so it's not very useful for this driver, at least I couldn't figure out how to use it correctly. --- drivers/clk/qcom/gdsc.c | 19 +++++++++++++++++++ drivers/clk/qcom/gdsc.h | 5 +++++ 2 files changed, 24 insertions(+) diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c index 7deabf8400cf..ff1acaa3e008 100644 --- a/drivers/clk/qcom/gdsc.c +++ b/drivers/clk/qcom/gdsc.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include @@ -261,6 +262,8 @@ static int gdsc_enable(struct generic_pm_domain *domain) struct gdsc *sc =3D domain_to_gdsc(domain); int ret; =20 + icc_set_bw(sc->icc_path, 1, 1); + if (sc->pwrsts =3D=3D PWRSTS_ON) return gdsc_deassert_reset(sc); =20 @@ -360,6 +363,8 @@ static int gdsc_disable(struct generic_pm_domain *domai= n) if (sc->flags & CLAMP_IO) gdsc_assert_clamp_io(sc); =20 + icc_set_bw(sc->icc_path, 0, 0); + return 0; } =20 @@ -574,6 +579,20 @@ int gdsc_register(struct gdsc_desc *desc, if (!data->domains) return -ENOMEM; =20 + for (i =3D 0; i < num; i++) { + if (!scs[i] || !scs[i]->needs_icc) + continue; + + scs[i]->icc_path =3D devm_of_icc_get_by_index(dev, scs[i]->icc_path_inde= x); + if (IS_ERR(scs[i]->icc_path)) { + ret =3D PTR_ERR(scs[i]->icc_path); + if (ret !=3D -ENODEV) + return ret; + + scs[i]->icc_path =3D NULL; + } + } + for (i =3D 0; i < num; i++) { if (!scs[i] || !scs[i]->supply) continue; diff --git a/drivers/clk/qcom/gdsc.h b/drivers/clk/qcom/gdsc.h index dd843e86c05b..92ff6bcce7b1 100644 --- a/drivers/clk/qcom/gdsc.h +++ b/drivers/clk/qcom/gdsc.h @@ -9,6 +9,7 @@ #include #include =20 +struct icc_path; struct regmap; struct regulator; struct reset_controller_dev; @@ -74,6 +75,10 @@ struct gdsc { =20 const char *supply; struct regulator *rsupply; + + bool needs_icc; + unsigned int icc_path_index; + struct icc_path *icc_path; }; =20 struct gdsc_desc { --=20 2.52.0