From nobody Sat Feb 7 17:55:52 2026 Received: from mail-wr1-f41.google.com (mail-wr1-f41.google.com [209.85.221.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 57BD33ACA75 for ; Thu, 15 Jan 2026 15:10:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.41 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768489840; cv=none; b=sQoXFzAsE3pd7NLDGIalQbGETpEbYj8NUbTbdQrIcP+a7RR2tXQ505tUklwL4JP0VexHFFiNGX0WJt0zxnNr5rgubkYovRKgXngOAr5oq7VwXg4OokEG21zKO3BDvbq5g+UUudUcvrLIxbNCzTDW2+DmIjWgSaWFnfgMxQzURh4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768489840; c=relaxed/simple; bh=QL67zO2OXNn7d293fXZUWqsB5I5Tjghhi53EjdI7gqU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ph0XYxq1fYFcUiNo+ydbnMC1l3ittx2d4rustliniQudZ3KwUL73DpWZz0uxCBRFqz899wcss2tDMyt1vWfBRRjbcpA7XSpqkyIfe/3qr+Kj7vqJwrdr58kBMpeQEJDXr8ihlDY8cFDG7Qg1MalvZFIyYFmVJ7jAsfj/310Ex6U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=JWvtb05M; arc=none smtp.client-ip=209.85.221.41 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="JWvtb05M" Received: by mail-wr1-f41.google.com with SMTP id ffacd0b85a97d-432d28870ddso519537f8f.3 for ; Thu, 15 Jan 2026 07:10:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1768489825; x=1769094625; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=7KyUY1CKl3fCa1LRr33ngkD0vxuK8KXOZ0/VtJmlEFc=; b=JWvtb05MBamycS/ROxb2C9GOaRTqsNyEzgj8yvxERVPpYjBxqHtssz43oGNrrHppK1 x+Hgz0A20Do5YsPM5ZKoPhBLNtMQSvfeBBu0MfGFrAxS6Iv4LSwve4YK1ytWVzDkijdp m6kf6YxlgET7199gdWZgbryU4luh8QzQX7WIdtBWS7orgETvmkOmZjA/WuTnt7MCatTG oUxiI6av+xCKhr/RYE7Xehk6pIr9sANw4u2/CBg3fKU9Xv4IXuIyNHnzRC2Ht5C4Yprz fTNTyT8bw0DMXeyG55ZulzAn1XAWyxgv+WIXdX1LmLkQ8raLJwqms0QgMYURTau3BVdW j0CQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1768489825; x=1769094625; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=7KyUY1CKl3fCa1LRr33ngkD0vxuK8KXOZ0/VtJmlEFc=; b=qCFFZIHsGQEgPXhoud93CUCNroothRzurYNUQvtEDDCq4iv7KwyoOhsRnf+6anUG+7 sbz/f/pciD2jfyM3NTAipQjmfXUwMtHCe65BVJDNeLCX8PUoriWC5MW0Zz6iudzQR+GP Vlxv0yk/hkilmvmgnt5S5N2MSQ3hlCgKitbTF87CUl8sqCFDwSQfLBep2+6A/wpAy9XQ 5QhuK8BOQ4rsz/GpiX8wz3KeFWHZfFTZkoiWXob4qqfSiW2XsQa0yYYPHuQqv9TIl1y0 yy7wRvk9JwchUJHqNm26EUqlpL9NaRf39lORBpBy5a3StvCbXvCngBeGBsiz+B3rbf1v ohtA== X-Gm-Message-State: AOJu0Yz9/FXM6jq8nEFR2JGjGQuP2kCYudIuWWDLoQD4lz7T5fYFffrW UGw43wmwv+B1T7fBFfxUlMVdCTl70VU5EqU+22KyFytiw1vZmZWokimEH1N+PQ== X-Gm-Gg: AY/fxX6oqt4sU7l1d+8CGSmm2n06I+L0zoG13A1OOwHVjSIY6+8uERe6Ad2OTgE/vXy HYPhZjVFRTh3QaH+fIBYepBnwMbrO05h8rGGNi6NyiBYmhlFJRbxuCZ7rxDfTi4vNLduefAQ7Km p/YsVAyu0qCCMoIkelbb/qPbMPCTOcD3S54pNWJvQMyUq7lFhxAmS1NIrtjTeWlp2pDNjlXPOeG y0UD/i9zzeZ1pgn88y9BTyFY6zZ00oAFObij4LcULKZMSV72QMgUFrVr6fk5kumVZOAaj3O6XwN 2O4GM4CodLEg+Y0IvMqCH+V2og+aTz+kT1KHziJSK2h/phucGD1EYU/EDQM3Hxayayw1Hb5SQA0 782+oyWwcP4o8EnXBemwV57fxLZq/f3chR0KYuL+KygC9Ok5+3rzEPB5FX8JUlZaZhYQoZB5VI9 sNymLg8UtgUC+vcYe+p0n2t2NvwFy/hG+/lf9UjbIXVtE5Ci2oodZT6TUhDq5a8Ekl X-Received: by 2002:a05:6000:22ca:b0:432:8651:4071 with SMTP id ffacd0b85a97d-4342c4ff4e4mr7932953f8f.18.1768489825150; Thu, 15 Jan 2026 07:10:25 -0800 (PST) Received: from localhost (brnt-04-b2-v4wan-170138-cust2432.vm7.cable.virginm.net. [94.175.9.129]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-434af64a6c0sm6528481f8f.5.2026.01.15.07.10.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Jan 2026 07:10:24 -0800 (PST) From: Stafford Horne To: LKML Cc: Linux OpenRISC , devicetree , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Stafford Horne , Geert Uytterhoeven , Krzysztof Kozlowski , Linus Walleij , Bartosz Golaszewski , linux-gpio@vger.kernel.org Subject: [PATCH v6 1/6] dt-bindings: gpio-mmio: Correct opencores GPIO Date: Thu, 15 Jan 2026 15:09:57 +0000 Message-ID: <20260115151014.3956805-2-shorne@gmail.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260115151014.3956805-1-shorne@gmail.com> References: <20260115151014.3956805-1-shorne@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In commit f48b5e8bc2e1 ("dt-bindings: gpio-mmio: Add compatible string for opencores,gpio") we marked opencores,gpio to be allowed with brcm,bcm6345-gpio. This was wrong, opencores,gpio is not compatible with brcm,bcm6345-gpio. It has a different register map and is 8-bit vs Broadcom which is 32-bit. Change opencores,gpio to be a separate compatible string for MMIO GPIO. Also, as this change rewrote the entire enum, I took this opportunity to alphabetically sort the list. Fixes: f48b5e8bc2e1 ("dt-bindings: gpio-mmio: Add compatible string for ope= ncores,gpio") Signed-off-by: Stafford Horne Reviewed-by: Geert Uytterhoeven Reviewed-by: Krzysztof Kozlowski Reviewed-by: Linus Walleij --- Since v5: - Updated comment based on comments from Krzysztof and Geert. - Added reviewed-by's. - Sorted the enum list and added not to commit message based on comment from Krzysztof. Since v4: - New patch. - Rebased old patch and rewrote commit message. .../devicetree/bindings/gpio/gpio-mmio.yaml | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-) diff --git a/Documentation/devicetree/bindings/gpio/gpio-mmio.yaml b/Docume= ntation/devicetree/bindings/gpio/gpio-mmio.yaml index 7ee40b9bc562..1b2d253b19c1 100644 --- a/Documentation/devicetree/bindings/gpio/gpio-mmio.yaml +++ b/Documentation/devicetree/bindings/gpio/gpio-mmio.yaml @@ -18,16 +18,12 @@ description: =20 properties: compatible: - oneOf: - - enum: - - brcm,bcm6345-gpio - - ni,169445-nand-gpio - - wd,mbl-gpio # Western Digital MyBook Live memory-mapped GPIO c= ontroller - - intel,ixp4xx-expansion-bus-mmio-gpio - - items: - - enum: - - opencores,gpio - - const: brcm,bcm6345-gpio + enum: + - brcm,bcm6345-gpio + - intel,ixp4xx-expansion-bus-mmio-gpio + - ni,169445-nand-gpio + - opencores,gpio + - wd,mbl-gpio # Western Digital MyBook Live memory-mapped GPIO contr= oller =20 big-endian: true =20 --=20 2.51.0 From nobody Sat Feb 7 17:55:52 2026 Received: from mail-wm1-f53.google.com (mail-wm1-f53.google.com [209.85.128.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 156943ACA78 for ; Thu, 15 Jan 2026 15:10:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.53 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768489835; cv=none; b=fQHF7FYk9BflWeGueswE6OwgaATBkYBss1XTMMOJn92nV+sC9rMV5HqHnSqwAlXNr6TozM6drPf3DwhZ6Gll04AOX/iwXxWsZr970WCrwW+iPa1jT9pE63WCbWZXZw92OYQh6JVmJbuSNPtFYrjx5uA/8WNEftdZX1zHbkX7URg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768489835; c=relaxed/simple; bh=37ssBE3aanUugoLgxto0YwPyHpxoTGe7/lnWA6Cd1/4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=uisYJ1YNdOJ1hl+IMOFfEroaVwevymRsy5HFzfLhmYxDaZG4qs2GMQgs8DFKDHKt6KtNVRLKIL2+AkIkx70TcuP0eN6XiFNu1rlHtTTLbb62oZfxQFcvWfCFuBPRcWutfYQJ9sBjECiirYGMPYCX+vNS5CmHyIGtnbo9vzDUDEQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=awqxOGH4; arc=none smtp.client-ip=209.85.128.53 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="awqxOGH4" Received: by mail-wm1-f53.google.com with SMTP id 5b1f17b1804b1-47eddddcdcfso5608845e9.1 for ; Thu, 15 Jan 2026 07:10:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1768489827; x=1769094627; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=M11xPiXaInwVnEMGq59nYgno6MdcMcqZX62iafSYodw=; b=awqxOGH4jxKzmyKtx/4jGpeWy2goEGWU9FqwGpICyoFZX3OrjGqnWcZmvCm2ZoB5lo Q94rUkiyxftm3E6tNFPMITfwYCW6nIqofYHJilDDZQepErzvcRKmhWtC50DnHDaYwUIZ JokW1sRFd4m3J1HLdXJlW9MYRXEKQTGeLFZqqcDOdvDY2k/xzSNrH1NnXFiCP9FfcZAT DcGjOaKUodI0X0C7hsIcqmGfa/SJ12ZaVSp3BEU+Q3YblYq5NxAffJHPGkS6xGdlW1Fz 4J2gdYae2M+fp5ggzTJjXq62VmoZOUvWcTQC7BTOkg39uMoAJtobHsRYF6efIXmssANM ApVA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1768489827; x=1769094627; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=M11xPiXaInwVnEMGq59nYgno6MdcMcqZX62iafSYodw=; b=Hjz75ernTD41j7O2ehizVHd5jAjT8Qe/BqbwRLDIWDG8M9vfx5A1tfdgjVfAYpatVD 2H0bUC/lbb2yovK6PMsbO6XajMJsQH6x39ttTNM7uPPooNk9EJmrp3aLysDM0G11+88G G9kEEixbjsw3HEjMIjCGsYy3HNdIuM5e2gfOapmVdPkbPPO15g74BrOtRrazDLnlA6Xi vJZGKxhPdbzKhRMrRkX3D06hh6WKsBElNDwyjn4YbHI9rlgQgGFzC0WK1sdSunFRKVJf 6fI+YZ4LJOhjEk2IgDJDP9MM0DZdwedBul8xezRkSarnC5VP8M13n5gLFXg24VQ3hN6I LNvQ== X-Gm-Message-State: AOJu0YyTPzM0Dp8Nul/SxlVCN8wlS5pMYx4s5+lYinnf/XswE8IGZo8M 6dap+lHNTmgJDUVCjDDzlwu8Pz+siu/AfwMbj0yVa2LaexCib2HzN/aWwgTweQ== X-Gm-Gg: AY/fxX6lQkgkdwwGvr7gry479v3Hl8ppFtSlpRdNXEYRJPHQyFUQ5TEnaiLIeC8fME/ Lj/vQBl/kkvJfYIi5CNHPVCwywoZssNCrzK4LAFa3jiE58xYmLpdEI642hiuUba44m3F8CA56p8 JRWR7S9CvB+JSG7pnhXVuBVGHLOLNbret7XrKPBkTJu8Hfu0jnyqRloVPValwLfXo7TTscRb5ws CIt13luy6WzkIXXm8ycDJBpfENciSlsZf5kO6T4DlyoOtlNMd8g5O827k14BlQXxxeDI0pEL97N 1jJQLUhmrMMugix9lBBwAysc7KhHtnTmPJzP6pCnaxlu59zY8j2tVHqPxFX9hrTDBCbs+It3Vk+ jCRPTvv8Yd7gjBnQcnP//2IvQe4DSpuszA1Jhr5kH+P5CST5F8aVSwlqfikybfLw18pWb1MGOQn fxOPBtRcB2dux1RpvBZ5R4VnAkkByxNk6/mEHpIADuz06NaRJXkAQYqMh0KAIITNY7 X-Received: by 2002:a05:600c:a0a:b0:47d:3ead:7440 with SMTP id 5b1f17b1804b1-4801e34fd4cmr521465e9.32.1768489827187; Thu, 15 Jan 2026 07:10:27 -0800 (PST) Received: from localhost (brnt-04-b2-v4wan-170138-cust2432.vm7.cable.virginm.net. [94.175.9.129]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-434af6535c7sm7011861f8f.16.2026.01.15.07.10.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Jan 2026 07:10:26 -0800 (PST) From: Stafford Horne To: LKML Cc: Linux OpenRISC , devicetree , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Stafford Horne , Linus Walleij , Geert Uytterhoeven , Bartosz Golaszewski , linux-gpio@vger.kernel.org Subject: [PATCH v6 2/6] gpio: mmio: Add compatible for opencores GPIO Date: Thu, 15 Jan 2026 15:09:58 +0000 Message-ID: <20260115151014.3956805-3-shorne@gmail.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260115151014.3956805-1-shorne@gmail.com> References: <20260115151014.3956805-1-shorne@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" On FPGA Development boards with GPIOs the OpenRISC architecture uses the opencores gpio verilog rtl. This is compatible with the gpio-mmio. Add the compatible string to allow probing this driver from the devicetree. Link: https://opencores.org/projects/gpio Signed-off-by: Stafford Horne Reviewed-by: Linus Walleij Reviewed-by: Geert Uytterhoeven --- Since v4: - No changes. Since v3: - Order this patch after the binding patch. - Add Reviewed-by's. Since v2: - New patch drivers/gpio/gpio-mmio.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpio/gpio-mmio.c b/drivers/gpio/gpio-mmio.c index 5daf962b0323..edbcaad57d00 100644 --- a/drivers/gpio/gpio-mmio.c +++ b/drivers/gpio/gpio-mmio.c @@ -724,6 +724,7 @@ static const struct of_device_id gpio_mmio_of_match[] = =3D { { .compatible =3D "wd,mbl-gpio" }, { .compatible =3D "ni,169445-nand-gpio" }, { .compatible =3D "intel,ixp4xx-expansion-bus-mmio-gpio" }, + { .compatible =3D "opencores,gpio" }, { } }; MODULE_DEVICE_TABLE(of, gpio_mmio_of_match); --=20 2.51.0 From nobody Sat Feb 7 17:55:52 2026 Received: from mail-wr1-f46.google.com (mail-wr1-f46.google.com [209.85.221.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 661AB3ACF1E for ; Thu, 15 Jan 2026 15:10:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768489840; cv=none; b=P9e6uSRu/71u39PtdkCija9ZHushqQz8ijSaodYAzfVPJ4FZprNN8Nqlg5g2j02Apg20de5MoConiuAuahfmPAf6tE4uKm3IIpekx/9s3Y5eb6BPaC53wVXinBLmCPhbXvvVhXAXERy/zkr0+QG77gicF/utEInKxU8lGqfPUa8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768489840; c=relaxed/simple; bh=X+1J5PrXk/eYAdcNrlogIy51e8BwUbac79/oxhidec0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=P9afdtXvG/TFhp004orXSOmFHvzqMXMVPuqfm/SiGrnIQPhLqmMJxj8ZfW7C7XdKErHWSGALf+9KlcYTpDtzPMZQ47BZddHweRjjTmKUrODyZMzXDAR3XDinb72noD87xrFB2ypSrK5ZhsdVWuKbzgdPjI32jxd7W/EIxqUR9xE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=jYje6h04; arc=none smtp.client-ip=209.85.221.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="jYje6h04" Received: by mail-wr1-f46.google.com with SMTP id ffacd0b85a97d-42fb5810d39so795418f8f.2 for ; Thu, 15 Jan 2026 07:10:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1768489832; x=1769094632; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=1s6pH8NPA0ipZmaojy8syPtuylZJ77gPmpuGh7ODFgg=; b=jYje6h04GIYEGibCYrL0IF2M0ib+htHFFjXC0djdoiiX1PXlVMh8PDtDS4Bz4wSj+z /en7du4kn1pXsg7c/Xwnw2QQUqkQYoRwiS+829aNOdwO0DpxaKV/XxxXp4hc4MsgbpkQ nOA8AEkXAv210TBZy6KAbqFcnIP0q894FELqrrSFwi8tWSy3SySNTiJAYqy+LOROjQh4 TKqXB+HD4wSpPJs4UhHE8I/ERTCXhFQvfMB5RLhIK7un56AtmQ1PjYaYDwLt+gKaTZ2D z53RHlvbTcsyZYEpffmuTqO4PDsBHz8vU0DVSs4FO30wUJz4ki8brD3+ficqW8FI6Jlu +z5A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1768489832; x=1769094632; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=1s6pH8NPA0ipZmaojy8syPtuylZJ77gPmpuGh7ODFgg=; b=IJf0QZPW+6V+UvDhbG18k1Y3NGy2EalomP/KvQv5F4zlsomu3CQSGUD/5iqdCjtiY6 71iILXi6m6t3Erml1XmtbMDBmIof8K/lz01EGOifqKsN7VhCgi8XQoPTTStJn20zPt4j tQlRjuFk6nG7Va7pOjdg6zqx9kmXk61Nb8xzQ69drZCBalt47Z6g1F4baBZ+fZ5hjHwI /QnIB2nc7jW6dIz+jmAs3hwEVpM6Jm97VUvanBXM2rNfqJ9Asbdwzl/tkufiGKWxz0SZ P4gOFlwYo085QDxLZLUUgzZST4CoGXu9fe7PX1iBkSGuHJMeSNbUU6HHlvf/bdcXlOzE rnYg== X-Gm-Message-State: AOJu0Yz4MVqYWbDaGMIGWW1i2zc0NZk2lTGMWqLMiLdEHSsE0qJ6A4ev JCDHTSDCDRJOZIRPm6TuX9eiKL+zreh5nuFGTMqmAp2SFi++j9JxYhXTijce/A== X-Gm-Gg: AY/fxX7pfwlASNDf0T+8WCuubM8EhQti3/xU95JILtypYOP7JFCjEj8DngjQOJIW3T4 QQbRD/HEJJsuqEauTLLQQOszCDtPdq1345HeE7sq+ruwzIyz4n7Ygh4ATBKMktSnpGDv/Tn3Ek7 5Rr38wQu/F1by4I08giKPXLX39xg3xDKz8iEHNo1C0IxSs5ozFY/yBJsTWCJcSNNnBM9OFt6Oob 5wvhP08jm/kBWCN2twM6Hnd1gR2FA5biG0024R3a57hUfEE+3rki9MIE5cXtoY8sN635nH4IOT2 ZAlsd0uPK9ocvXvSHiETGOsv3q8OHu4gu+y5gCHKl4YL3CuT/qwXY7IoD0LZgrBOlVrz8c2E9ri ePJLHQ967d8fMWll7Dl3r+C7qqaOHLqBemVVkSivmNImxIrrGH37R5XZIzHuUskduRhI71P7hT/ 8yDCQhOjH7evyMxxZgfu2JPod+FvBmb4xolTGtXavqIoiMb5OzgpVVGwChsIy9a0f1 X-Received: by 2002:a05:6000:2407:b0:430:f2ee:b220 with SMTP id ffacd0b85a97d-4342c4f9c80mr7923196f8f.19.1768489832022; Thu, 15 Jan 2026 07:10:32 -0800 (PST) Received: from localhost (brnt-04-b2-v4wan-170138-cust2432.vm7.cable.virginm.net. [94.175.9.129]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-434af6d9039sm6531524f8f.30.2026.01.15.07.10.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Jan 2026 07:10:31 -0800 (PST) From: Stafford Horne To: LKML Cc: Linux OpenRISC , devicetree , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Stafford Horne , Jonas Bonn , Stefan Kristiansson Subject: [PATCH v6 3/6] openrisc: dts: Add de0 nano config and devicetree Date: Thu, 15 Jan 2026 15:09:59 +0000 Message-ID: <20260115151014.3956805-4-shorne@gmail.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260115151014.3956805-1-shorne@gmail.com> References: <20260115151014.3956805-1-shorne@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The de0 nano from Terasic is an FPGA board that we use in the OpenRISC community to test OpenRISC configurations. Add a base configuration for the board that runs an OpenRISC CPU at 50Mhz with 32MB ram, UART for console and some GPIOs for LEDs and switches. There is an older version of this floating around that defines all of the hardware on the board including SPI's, flash devices, sram, ADCs etc. Eventually it would be good to get the full version upstream but for now I think a minimal board is good to start with. Link: https://openrisc.io/tutorials/de0_nano/ Link: https://github.com/olofk/de0_nano Signed-off-by: Stafford Horne --- Since v3: - No changes. Since v2: - Move leds block up to the top. - Remove unneeded "status" from gpio0. - Removed earlycon from de0-nano.dts. arch/openrisc/boot/dts/de0-nano-common.dtsi | 42 +++++++++++ arch/openrisc/boot/dts/de0-nano.dts | 54 ++++++++++++++ arch/openrisc/configs/de0_nano_defconfig | 79 +++++++++++++++++++++ 3 files changed, 175 insertions(+) create mode 100644 arch/openrisc/boot/dts/de0-nano-common.dtsi create mode 100644 arch/openrisc/boot/dts/de0-nano.dts create mode 100644 arch/openrisc/configs/de0_nano_defconfig diff --git a/arch/openrisc/boot/dts/de0-nano-common.dtsi b/arch/openrisc/bo= ot/dts/de0-nano-common.dtsi new file mode 100644 index 000000000000..02e329e28e33 --- /dev/null +++ b/arch/openrisc/boot/dts/de0-nano-common.dtsi @@ -0,0 +1,42 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include +#include + +/ { + leds0: leds { + compatible =3D "gpio-leds"; + + led-heartbeat { + gpios =3D <&gpio0 0 GPIO_ACTIVE_HIGH>; + color =3D ; + function =3D LED_FUNCTION_HEARTBEAT; + linux,default-trigger =3D "heartbeat"; + label =3D "heartbeat"; + }; + }; + + memory@0 { + device_type =3D "memory"; + reg =3D <0x00000000 0x02000000>; + }; + + /* 8 Green LEDs */ + gpio0: gpio@91000000 { + compatible =3D "opencores,gpio"; + reg =3D <0x91000000 0x1>, <0x91000001 0x1>; + reg-names =3D "dat", "dirout"; + gpio-controller; + #gpio-cells =3D <2>; + }; + + /* 4 DIP Switches */ + gpio1: gpio@92000000 { + compatible =3D "opencores,gpio"; + reg =3D <0x92000000 0x1>, <0x92000001 0x1>; + reg-names =3D "dat", "dirout"; + gpio-controller; + #gpio-cells =3D <2>; + status =3D "disabled"; + }; +}; diff --git a/arch/openrisc/boot/dts/de0-nano.dts b/arch/openrisc/boot/dts/d= e0-nano.dts new file mode 100644 index 000000000000..b5b854e7e8b4 --- /dev/null +++ b/arch/openrisc/boot/dts/de0-nano.dts @@ -0,0 +1,54 @@ +// SPDX-License-Identifier: GPL-2.0 + +/dts-v1/; + +#include "de0-nano-common.dtsi" + +/ { + model =3D "Terasic DE0 Nano"; + compatible =3D "opencores,or1ksim"; + #address-cells =3D <1>; + #size-cells =3D <1>; + interrupt-parent =3D <&pic>; + + aliases { + uart0 =3D &serial0; + }; + + chosen { + stdout-path =3D "uart0:115200"; + }; + + cpus { + #address-cells =3D <1>; + #size-cells =3D <0>; + + cpu@0 { + compatible =3D "opencores,or1200-rtlsvn481"; + reg =3D <0>; + clock-frequency =3D <50000000>; + }; + }; + + /* + * OR1K PIC is built into CPU and accessed via special purpose + * registers. It is not addressable and, hence, has no 'reg' + * property. + */ + pic: pic { + compatible =3D "opencores,or1k-pic"; + #interrupt-cells =3D <1>; + interrupt-controller; + }; + + serial0: serial@90000000 { + compatible =3D "opencores,uart16550-rtlsvn105", "ns16550a"; + reg =3D <0x90000000 0x100>; + interrupts =3D <2>; + clock-frequency =3D <50000000>; + }; +}; + +&gpio1 { + status =3D "okay"; +}; diff --git a/arch/openrisc/configs/de0_nano_defconfig b/arch/openrisc/confi= gs/de0_nano_defconfig new file mode 100644 index 000000000000..bc63905f9cd8 --- /dev/null +++ b/arch/openrisc/configs/de0_nano_defconfig @@ -0,0 +1,79 @@ +CONFIG_SYSVIPC=3Dy +CONFIG_NO_HZ=3Dy +CONFIG_LOG_BUF_SHIFT=3D14 +CONFIG_BLK_DEV_INITRD=3Dy +# CONFIG_RD_GZIP is not set +# CONFIG_RD_LZMA is not set +# CONFIG_RD_LZO is not set +# CONFIG_RD_LZ4 is not set +# CONFIG_RD_ZSTD is not set +CONFIG_EXPERT=3Dy +# CONFIG_EPOLL is not set +# CONFIG_TIMERFD is not set +# CONFIG_EVENTFD is not set +# CONFIG_AIO is not set +CONFIG_BUILTIN_DTB_NAME=3D"de0-nano" +# CONFIG_FPU is not set +CONFIG_HZ_100=3Dy +# CONFIG_BLOCK is not set +CONFIG_SLUB_TINY=3Dy +# CONFIG_COMPAT_BRK is not set +# CONFIG_VM_EVENT_COUNTERS is not set +CONFIG_NET=3Dy +CONFIG_UNIX=3Dy +CONFIG_UNIX_DIAG=3Dy +CONFIG_INET=3Dy +CONFIG_IP_MULTICAST=3Dy +CONFIG_INET_UDP_DIAG=3Dy +CONFIG_INET_RAW_DIAG=3Dy +CONFIG_INET_DIAG_DESTROY=3Dy +# CONFIG_IPV6 is not set +CONFIG_DEVTMPFS=3Dy +CONFIG_DEVTMPFS_MOUNT=3Dy +# CONFIG_PREVENT_FIRMWARE_BUILD is not set +# CONFIG_FW_LOADER is not set +# CONFIG_INPUT is not set +# CONFIG_SERIO is not set +# CONFIG_VT is not set +# CONFIG_LEGACY_PTYS is not set +CONFIG_SERIAL_8250=3Dy +CONFIG_SERIAL_8250_CONSOLE=3Dy +CONFIG_SERIAL_OF_PLATFORM=3Dy +# CONFIG_HW_RANDOM is not set +CONFIG_PPS=3Dy +CONFIG_GPIO_SYSFS=3Dy +# CONFIG_GPIO_SYSFS_LEGACY is not set +CONFIG_GPIO_GENERIC_PLATFORM=3Dy +# CONFIG_HWMON is not set +# CONFIG_USB_SUPPORT is not set +CONFIG_NEW_LEDS=3Dy +CONFIG_LEDS_CLASS=3Dy +CONFIG_LEDS_GPIO=3Dy +CONFIG_LEDS_TRIGGERS=3Dy +CONFIG_LEDS_TRIGGER_TIMER=3Dy +CONFIG_LEDS_TRIGGER_ONESHOT=3Dy +CONFIG_LEDS_TRIGGER_HEARTBEAT=3Dy +CONFIG_LEDS_TRIGGER_CPU=3Dy +CONFIG_LEDS_TRIGGER_ACTIVITY=3Dy +CONFIG_LEDS_TRIGGER_GPIO=3Dy +CONFIG_LEDS_TRIGGER_DEFAULT_ON=3Dy +CONFIG_LEDS_TRIGGER_TRANSIENT=3Dy +CONFIG_LEDS_TRIGGER_PANIC=3Dy +CONFIG_LEDS_TRIGGER_NETDEV=3Dy +CONFIG_LEDS_TRIGGER_PATTERN=3Dy +CONFIG_LEDS_TRIGGER_TTY=3Dy +# CONFIG_VIRTIO_MENU is not set +# CONFIG_VHOST_MENU is not set +# CONFIG_DNOTIFY is not set +CONFIG_TMPFS=3Dy +# CONFIG_XZ_DEC_X86 is not set +# CONFIG_XZ_DEC_POWERPC is not set +# CONFIG_XZ_DEC_ARM is not set +# CONFIG_XZ_DEC_ARMTHUMB is not set +# CONFIG_XZ_DEC_ARM64 is not set +# CONFIG_XZ_DEC_SPARC is not set +# CONFIG_XZ_DEC_RISCV is not set +CONFIG_PRINTK_TIME=3Dy +# CONFIG_DEBUG_MISC is not set +# CONFIG_FTRACE is not set +# CONFIG_RUNTIME_TESTING_MENU is not set --=20 2.51.0 From nobody Sat Feb 7 17:55:52 2026 Received: from mail-wm1-f52.google.com (mail-wm1-f52.google.com [209.85.128.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9787C3ACF08 for ; Thu, 15 Jan 2026 15:10:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768489844; cv=none; b=Gcza9wDIIIzjpgh+/+DIwxVXnhfbrtQDEfWZbwbBczeRs0pdEzZ/tmqTXiZ2lxuUm0zcm8CP71+gvTNiaaJ1HgamCr1gNtzJDwyRnOyjH75nUCT6TleEPawS3iBHUrac8oRCNP4eSynusH9pfZ9Zcvb3grdpnIA+0P1IbplXcW4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768489844; c=relaxed/simple; bh=IKKdRw2BPRZGdSnokUi+lLWreRL7wCXnn1Ye9vz44zM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=gZVIpYy93Rs5Hjry9Mi6bk3AytPtW9rH3st8JuT9pVuzjwufnLUMO8qL9iSfwyLQXRdpHxPX1q14EaC5FhX4WMIPbkPJUH/wvQRIAenxWM/QzU/MaSpIENblJ2OcXUOgJZZrujYyG4ip6fa8b5nnZR3BUOXoZ4kkMf+Z0cnGago= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=UKpAD379; arc=none smtp.client-ip=209.85.128.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="UKpAD379" Received: by mail-wm1-f52.google.com with SMTP id 5b1f17b1804b1-47ee301a06aso9649135e9.0 for ; Thu, 15 Jan 2026 07:10:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1768489836; x=1769094636; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=NjqV3wlU4tHE/m54DQEIhq4RJtDBUToXmEOJfRTmvP0=; b=UKpAD379w186/vZ/Aapff8yCWVmtIZW0MA2y8tdn6C//mCBemtqXbNbRni4DAxIor0 a75l0vk0WvpjVyDSDAxapIwQ2aD6ULjK9TUgf4I6VDO/c+lYt1q2L80AJaTiaCEQYsKz kcnTH3uYmuqcYpGUNRyVcHTtWY6FUYa/kRE1R1K+6vmyRupt8t0CDTkV9XnokFupwrO6 eNOlosI7vpDlZ7CnLi5zrKNHWDUaAQGLKnVrUtpMD2oOSlb972U1dXukELIipR+Nlo+G nYPpWJE/ejx1ybAbZxCLFId3TADEqTbmuCmzGKYMz8DWUFhDd8lIB+CLPCBf6Zxy6kth WJlA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1768489836; x=1769094636; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=NjqV3wlU4tHE/m54DQEIhq4RJtDBUToXmEOJfRTmvP0=; b=hwMjqJ29SJ8H6oe9oMoTom5UZIu7lvJCRufY4W2EjjiR5CwhJ7RdwZkBwrpK3gQF+u KGfgZBtlxakrUi3imtfoo9U8lJKTlSxSBT61/udje/qKbpncxiYPao9B796zuEz/Z0n4 jcJwL/pIlzkI/ZQkLpV4QG74MPv0FwZ890zW+JVMeNde0LCuFvsabqiyuyfF4Hy1Sho6 qlOfN2BEMeL+L2vRfD+KR8TOhHQx/NH0TT5ItbAiLot6zN9x1seR0+RFoghdRFLWSSSD Q8JIVR3yQf7/anQZVK4tOsO71MyoN8BZrn9eZyro7/5oFiqSe9DbMMVJMQxWrUxvEqNv vmew== X-Gm-Message-State: AOJu0Ywnc3kQYWWlhWXzMwWfWtHgZWA/gxO5O+cKwy9BJSgz46g+Cb1C sEDZceh0t2Jl5++GCO5ElkWPlwCXCPqq4/5djS2ycDymPAmH2iZM7ZwwIaPEuA== X-Gm-Gg: AY/fxX7ZRQgNu+2Bo1d5sISEbnEyVqb+VdToZGLXquldR3DVsBVkyxF01eaeRhGn0sf SdqYEAskwFqMoE7Q+jSOrwdhO3hjyjZm2bul3DpqMauiUnPJpCTDN0USR7gJGB8MddzCnJoSZ0t yjHRwXO+AHqA7SGw/cOFt7l2gJGmcgGUGrJFGam4QY5XNGAmTpz5oooBGjM+VvUSlTAnVXrIdho vKiy8xiRS7sxH2zR2tuQzYCflzr42G1nW+C9G51Kkh8uEYHQTWngod/JQKiVtVrbF3yTV1ZknT2 VShZgk61v997VwpjLuIsbJNeor3rqlQ2zVfarN9Lf65Utkh/La2dMXt64SRpdZBfuLnjYeQJWwX 0WEYJqq3CMKiYBr2ns+cuWsijVtnVuk8yJcvL1LbLo8CRuO1Rq1MiARjg6+jr2R4GRTyMwerzGW j1gtNn9OW5YmndfqNL+iWHLhl4XTN74vLqsisXEqIyXRsWwNMmG4fAWxeYlk9/K59P6tlEG3Fxk vw= X-Received: by 2002:a05:600c:4693:b0:477:abea:9023 with SMTP id 5b1f17b1804b1-4801e30ae84mr1037785e9.9.1768489835791; Thu, 15 Jan 2026 07:10:35 -0800 (PST) Received: from localhost (brnt-04-b2-v4wan-170138-cust2432.vm7.cable.virginm.net. [94.175.9.129]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-47f4b26764fsm51725885e9.12.2026.01.15.07.10.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Jan 2026 07:10:34 -0800 (PST) From: Stafford Horne To: LKML Cc: Linux OpenRISC , devicetree , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Stafford Horne , Thomas Gleixner , Jonas Bonn , Stefan Kristiansson Subject: [PATCH v6 4/6] openrisc: Fix IPIs on simple multicore systems Date: Thu, 15 Jan 2026 15:10:00 +0000 Message-ID: <20260115151014.3956805-5-shorne@gmail.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260115151014.3956805-1-shorne@gmail.com> References: <20260115151014.3956805-1-shorne@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Commit c05671846451 ("openrisc: sleep instead of spin on secondary wait") fixed OpenRISC SMP Linux for QEMU. However, stability was never achieved on FPGA development boards. This is because the above patch has a step to unmask IPIs on non-boot cpu's but on hardware without power management, IPIs remain masked. This meant that IPI's were never actually working on the simple SMP systems we run on development boards. The systems booted but stability was very suspect. Add the ability to unmask IPI's on the non-boot cores. This is done by making the OMPIC IRQs proper percpu IRQs. We can then use the enabled_percpu_irq() to unmask IRQ on the non-boot cpus. Update the or1k PIC driver to use a flow handler that can switch between percpu and the configured level or edge flow handlers at runtime. This mechanism is inspired by that done in the J-Core AIC driver. Signed-off-by: Stafford Horne Acked-by: Thomas Gleixner --- Since v5: - No changes. Since v4: - Added acked-by. arch/openrisc/include/asm/smp.h | 3 ++- arch/openrisc/kernel/smp.c | 22 +++++++++++++++++++++- drivers/irqchip/irq-ompic.c | 15 +++++++++++---- drivers/irqchip/irq-or1k-pic.c | 27 ++++++++++++++++++++++++++- 4 files changed, 60 insertions(+), 7 deletions(-) diff --git a/arch/openrisc/include/asm/smp.h b/arch/openrisc/include/asm/sm= p.h index e21d2f12b5b6..007296f160ef 100644 --- a/arch/openrisc/include/asm/smp.h +++ b/arch/openrisc/include/asm/smp.h @@ -20,7 +20,8 @@ extern void smp_init_cpus(void); extern void arch_send_call_function_single_ipi(int cpu); extern void arch_send_call_function_ipi_mask(const struct cpumask *mask); =20 -extern void set_smp_cross_call(void (*)(const struct cpumask *, unsigned i= nt)); +extern void set_smp_cross_call(void (*)(const struct cpumask *, unsigned i= nt), + unsigned int irq); extern void handle_IPI(unsigned int ipi_msg); =20 #endif /* __ASM_OPENRISC_SMP_H */ diff --git a/arch/openrisc/kernel/smp.c b/arch/openrisc/kernel/smp.c index 86da4bc5ee0b..040ca201b692 100644 --- a/arch/openrisc/kernel/smp.c +++ b/arch/openrisc/kernel/smp.c @@ -13,6 +13,7 @@ =20 #include #include +#include #include #include #include @@ -25,6 +26,7 @@ =20 asmlinkage __init void secondary_start_kernel(void); =20 +static unsigned int ipi_irq __ro_after_init; static void (*smp_cross_call)(const struct cpumask *, unsigned int); =20 unsigned long secondary_release =3D -1; @@ -39,6 +41,14 @@ enum ipi_msg_type { =20 static DEFINE_SPINLOCK(boot_lock); =20 +static void or1k_ipi_enable(void) +{ + if (WARN_ON_ONCE(!ipi_irq)) + return; + + enable_percpu_irq(ipi_irq, 0); +} + static void boot_secondary(unsigned int cpu, struct task_struct *idle) { /* @@ -136,6 +146,7 @@ asmlinkage __init void secondary_start_kernel(void) complete(&cpu_running); =20 synchronise_count_slave(cpu); + or1k_ipi_enable(); set_cpu_online(cpu, true); =20 local_irq_enable(); @@ -195,9 +206,18 @@ void smp_send_stop(void) smp_call_function(stop_this_cpu, NULL, 0); } =20 -void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned= int)) +void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned= int), + unsigned int irq) { + if (WARN_ON(ipi_irq)) + return; + smp_cross_call =3D fn; + + ipi_irq =3D irq; + + /* Enabled IPIs for boot CPU immediately */ + or1k_ipi_enable(); } =20 void arch_send_call_function_single_ipi(int cpu) diff --git a/drivers/irqchip/irq-ompic.c b/drivers/irqchip/irq-ompic.c index e66ef4373b1e..f0e0b435bb1d 100644 --- a/drivers/irqchip/irq-ompic.c +++ b/drivers/irqchip/irq-ompic.c @@ -84,6 +84,8 @@ DEFINE_PER_CPU(unsigned long, ops); =20 static void __iomem *ompic_base; =20 +static DEFINE_PER_CPU_READ_MOSTLY(int, ipi_dummy_dev); + static inline u32 ompic_readreg(void __iomem *base, loff_t offset) { return ioread32be(base + offset); @@ -183,12 +185,17 @@ static int __init ompic_of_init(struct device_node *n= ode, goto out_unmap; } =20 - ret =3D request_irq(irq, ompic_ipi_handler, IRQF_PERCPU, - "ompic_ipi", NULL); - if (ret) + irq_set_percpu_devid(irq); + ret =3D request_percpu_irq(irq, ompic_ipi_handler, "ompic_ipi", + &ipi_dummy_dev); + + if (ret) { + pr_err("ompic: failed to request irq %d, error: %d", + irq, ret); goto out_irq_disp; + } =20 - set_smp_cross_call(ompic_raise_softirq); + set_smp_cross_call(ompic_raise_softirq, irq); =20 return 0; =20 diff --git a/drivers/irqchip/irq-or1k-pic.c b/drivers/irqchip/irq-or1k-pic.c index 48126067c54b..73dc99c71d40 100644 --- a/drivers/irqchip/irq-or1k-pic.c +++ b/drivers/irqchip/irq-or1k-pic.c @@ -118,11 +118,36 @@ static void or1k_pic_handle_irq(struct pt_regs *regs) generic_handle_domain_irq(root_domain, irq); } =20 +/* + * The OR1K PIC is a cpu-local interrupt controller and does not distingui= sh or + * use distinct irq number ranges for per-cpu event interrupts (IPI). Since + * information to determine whether a particular irq number should be trea= ted as + * per-cpu is not available at mapping time, we use a wrapper handler func= tion + * which chooses the right handler at runtime based on whether IRQF_PERCPU= was + * used when requesting the irq. Borrowed from J-Core AIC. + */ +static void or1k_irq_flow_handler(struct irq_desc *desc) +{ +#ifdef CONFIG_SMP + struct irq_data *data =3D irq_desc_get_irq_data(desc); + struct or1k_pic_dev *pic =3D data->domain->host_data; + + if (irqd_is_per_cpu(data)) + handle_percpu_devid_irq(desc); + else + pic->handle(desc); +#endif +} + static int or1k_map(struct irq_domain *d, unsigned int irq, irq_hw_number_= t hw) { struct or1k_pic_dev *pic =3D d->host_data; =20 - irq_set_chip_and_handler(irq, &pic->chip, pic->handle); + if (IS_ENABLED(CONFIG_SMP)) + irq_set_chip_and_handler(irq, &pic->chip, or1k_irq_flow_handler); + else + irq_set_chip_and_handler(irq, &pic->chip, pic->handle); + irq_set_status_flags(irq, pic->flags); =20 return 0; --=20 2.51.0 From nobody Sat Feb 7 17:55:52 2026 Received: from mail-wr1-f42.google.com (mail-wr1-f42.google.com [209.85.221.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B20D53AE70C for ; Thu, 15 Jan 2026 15:10:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768489860; cv=none; b=qWCs+Szofd6jkfdNE05oIu15JfqbkGCWGuPVIEzXDiJhcDVHmORA5FRL80lqzbj8Jn8OhPIpB20sZrR7Q2udDr8jJaiD9iP0isKwNjrvEVsnXF9RGNxymRqmL/LK5lIS0Ru77q4XrYqnXhggPj9xqA73SxntokqZu4Gu8l4kdcg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768489860; c=relaxed/simple; bh=s41epkAbLG9smlbYYXWvYNaWVozGaFQ8TXpu/2hzAWw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=KEujHXOhERI5vRAl01tJxpDeywntdfTPVs+pRrxvgM+JSbo+VEVGAd8eyUkdyoiSkFrZ9KGAMYZKGTPqAir9BLXQxpxDo0Qm7Iq7B4r+a/MEwEUf0KksGKdO3sEipPMGTDVHgYaZstUBcgZiyorKy7uc4oVVbGsiUOnrqt3zCYA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=ANeuTuKf; arc=none smtp.client-ip=209.85.221.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="ANeuTuKf" Received: by mail-wr1-f42.google.com with SMTP id ffacd0b85a97d-4327778df7fso602539f8f.3 for ; Thu, 15 Jan 2026 07:10:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1768489839; x=1769094639; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3u+3JeZcHRgFBFE83J1Rhnm4t9otRBPxkyt04fpaFbg=; b=ANeuTuKfwCK1Hh/exWlDcTd2kPghVqp/TlqH98fOHzF7tYNALZVGGHEc/egO8YQUXx Ot3ekhdSUDy0gJQUb6npBHh4/qu1eICOCZrNfUJU4r4Swsi5ZrUtHZxcTQpsg/gRmX4C +PTNIl01/ExZm7EdFwT5GMdC+W9GPpKRKgm4Pu3iV+xJXMG2ImB023eHrZGHmdgKWnb5 zpjdKV0vw57VPso4ZABmMlpFd2KyMPkb4iLtWA18HvLTarHe3VZoOZjSLm9ogNwGFKus x4SeUxLfy6a3AiU9QetaoPggD5Hp0Yy/d+/qidgqJHxdOgxT6KEzQmgCnDbBqLOaojtf X1gg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1768489839; x=1769094639; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=3u+3JeZcHRgFBFE83J1Rhnm4t9otRBPxkyt04fpaFbg=; b=KDukaMMOVGiDzmVWoPwl9+mD3ZSqinPMuP1YkJW+tzBqTs/efk75s56CCxr7hpJykm Ir4CrWd2xnGd1GJb0GxjSv9cNKPj/d8Hti5Qm6/6SIBrhP5gHSNPKskmwQ/uZDdZm2kV AyvU2V6oJxAxmYriVHw6J4kgwoDZaKz6hw2GUUJgXVjQtuNypo5/lIOeEjjYCCiOVebF ESLim2G8NLCu96U0amS9ngt3WbV8C8b4UEdNTz5L0jzGQ2s+UhMm3ADRzWRlS8YXng8N k6gmDVzvlpW52VUaeCEVkf9CIZcFs8c1bRLFBDm5t9G5AJXfQkGxzsA0QNEUhh4256rH OJ/Q== X-Gm-Message-State: AOJu0YyQcr0eQSI0GCmfLSce2HwuUbuIoMEpvui5XC9KkuDyXjriQ2TJ hSw3o4t21XFd8IPhTml/prJaHjc4duQwLlMRHQkkekB4e8aPz19IRQwDNu6lbA== X-Gm-Gg: AY/fxX7e1BosFGH4J+qQoKhfokHm4mrQbf9l4rpIqWHJuxEKDLr5GSSL6+EgzNALGnX 5CAwNj1ovPYM9fRkMOlIaTQc9m55PYSTL+McGEkQA26Oalqpv08kLHKRHaaD/CRkXUTiOn+l03V e3osXbbB6L5AWpVAo1jj8OViknl+0VGrANYJc9WOdKPzUoZ8AQOEKarf8um2eyn2ZpK4CwItj3H Mk28IH01So4c+e/8fRUX0moXXnhztINxuX+Su8zUXNOPTpmJIwMKVMDKhGssU+iQsPr57YI7CGl cqFX4Z7quTEX4kNBvmS5XrCHVNEI993f16TVqWKJMtuFmwDv2Y3+OuFzvQaCpPyRexY2FLTqqR9 0F07qlGGj+k7PQAbGFJZgX6iwGyKina0xs6Tr+m6XhN8qTU1GuximX8yv+bps6Urr3M0NKPVKke 86RsYSSnekm7kXm0rKucSO20sm6qc4euq5683DbGla2ire/FnNFTWxXK+vY49xeUMp X-Received: by 2002:a5d:5f90:0:b0:431:752:6737 with SMTP id ffacd0b85a97d-4342c549c0bmr7370444f8f.30.1768489839397; Thu, 15 Jan 2026 07:10:39 -0800 (PST) Received: from localhost (brnt-04-b2-v4wan-170138-cust2432.vm7.cable.virginm.net. [94.175.9.129]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-434af6b2a61sm6598948f8f.20.2026.01.15.07.10.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Jan 2026 07:10:38 -0800 (PST) From: Stafford Horne To: LKML Cc: Linux OpenRISC , devicetree , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Stafford Horne , Jonas Bonn , Stefan Kristiansson Subject: [PATCH v6 5/6] openrisc: dts: Split simple smp dts to dts and dtsi Date: Thu, 15 Jan 2026 15:10:01 +0000 Message-ID: <20260115151014.3956805-6-shorne@gmail.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260115151014.3956805-1-shorne@gmail.com> References: <20260115151014.3956805-1-shorne@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Split out the common memory, CPU and PIC definitions of the simple SMP system to a DTSI file which we will later use for our De0 Nano multicore board device tree. We also take this opportunity to swich underscores to dashes as that seems to be the more common convention for DTS files. Signed-off-by: Stafford Horne --- Since v3: - No changes. Since v2: - Sort blocks alphabetically. arch/openrisc/boot/dts/simple-smp.dts | 25 +++++++++++++++++++ .../dts/{simple_smp.dts =3D> simple-smp.dtsi} | 11 ++++---- arch/openrisc/configs/simple_smp_defconfig | 2 +- 3 files changed, 31 insertions(+), 7 deletions(-) create mode 100644 arch/openrisc/boot/dts/simple-smp.dts rename arch/openrisc/boot/dts/{simple_smp.dts =3D> simple-smp.dtsi} (90%) diff --git a/arch/openrisc/boot/dts/simple-smp.dts b/arch/openrisc/boot/dts= /simple-smp.dts new file mode 100644 index 000000000000..01cf219e6aac --- /dev/null +++ b/arch/openrisc/boot/dts/simple-smp.dts @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: GPL-2.0 + +/dts-v1/; + +#include "simple-smp.dtsi" + +/ { + model =3D "Simple SMP Board"; +}; + +&cpu0 { + clock-frequency =3D <20000000>; +}; + +&cpu1 { + clock-frequency =3D <20000000>; +}; + +&enet0 { + status =3D "okay"; +}; + +&serial0 { + clock-frequency =3D <20000000>; +}; diff --git a/arch/openrisc/boot/dts/simple_smp.dts b/arch/openrisc/boot/dts= /simple-smp.dtsi similarity index 90% rename from arch/openrisc/boot/dts/simple_smp.dts rename to arch/openrisc/boot/dts/simple-smp.dtsi index 71af0e117bfe..42d6eda33b71 100644 --- a/arch/openrisc/boot/dts/simple_smp.dts +++ b/arch/openrisc/boot/dts/simple-smp.dtsi @@ -1,4 +1,3 @@ -/dts-v1/; / { compatible =3D "opencores,or1ksim"; #address-cells =3D <1>; @@ -22,15 +21,15 @@ memory@0 { cpus { #address-cells =3D <1>; #size-cells =3D <0>; - cpu@0 { + + cpu0: cpu@0 { compatible =3D "opencores,or1200-rtlsvn481"; reg =3D <0>; - clock-frequency =3D <20000000>; }; - cpu@1 { + + cpu1: cpu@1 { compatible =3D "opencores,or1200-rtlsvn481"; reg =3D <1>; - clock-frequency =3D <20000000>; }; }; =20 @@ -57,7 +56,6 @@ serial0: serial@90000000 { compatible =3D "opencores,uart16550-rtlsvn105", "ns16550a"; reg =3D <0x90000000 0x100>; interrupts =3D <2>; - clock-frequency =3D <20000000>; }; =20 enet0: ethoc@92000000 { @@ -65,5 +63,6 @@ enet0: ethoc@92000000 { reg =3D <0x92000000 0x800>; interrupts =3D <4>; big-endian; + status =3D "disabled"; }; }; diff --git a/arch/openrisc/configs/simple_smp_defconfig b/arch/openrisc/con= figs/simple_smp_defconfig index 6008e824d31c..db77c795225e 100644 --- a/arch/openrisc/configs/simple_smp_defconfig +++ b/arch/openrisc/configs/simple_smp_defconfig @@ -20,7 +20,7 @@ CONFIG_SLUB=3Dy CONFIG_SLUB_TINY=3Dy CONFIG_MODULES=3Dy # CONFIG_BLOCK is not set -CONFIG_BUILTIN_DTB_NAME=3D"simple_smp" +CONFIG_BUILTIN_DTB_NAME=3D"simple-smp" CONFIG_SMP=3Dy CONFIG_HZ_100=3Dy CONFIG_OPENRISC_HAVE_SHADOW_GPRS=3Dy --=20 2.51.0 From nobody Sat Feb 7 17:55:52 2026 Received: from mail-wr1-f52.google.com (mail-wr1-f52.google.com [209.85.221.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 25FC83ACF06 for ; Thu, 15 Jan 2026 15:10:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768489866; cv=none; b=QGOLFu+8kFPDw5luXUHTCl7V7WfNRIzM6UMCBubU/4xo3o21Wwl3sNCiKvdWD4mx6ivQidjMuMqwrXub4aNCkOfijDx0doOeAg6OdBHqmFxcueWMI63+hWmy5V2tETLG9H+D9w6EO9n/y6kLG+5J0jJsPRV55/XmvzodckEfXx4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768489866; c=relaxed/simple; bh=un/mmc47M7TzaiskJcRDfyxuLNhftyXJQ1e6SZgvuK4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=cny+7AMz+q2BhyQUMxgkOypPOTiMl5XNptwT65QzGBg9g1u7Rcuud6jqZW717VkvYSiZzBH4EtcyDZPCPng2jISijv/LwcQgYW4G36aIc0rrbQSgowUbBqy6rZdorhzRTJAvpaK1670gq1Og5wcI1p6CP0PQ+aZZbsg1eCfhkl8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=j5FLwIX+; arc=none smtp.client-ip=209.85.221.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="j5FLwIX+" Received: by mail-wr1-f52.google.com with SMTP id ffacd0b85a97d-42fbc305552so856182f8f.0 for ; Thu, 15 Jan 2026 07:10:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1768489845; x=1769094645; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3suL/FJnULndAdzhv6eYWlf/ToXJG1zAeBlGIDXgmts=; b=j5FLwIX+8f7Jkd6qHRH5MwMeKhl7s4lafJLwGZDTufsuQLaf/HnX2FOQsBzOR15fHw elH8cTVDlgqyhKcaJHVeTJRiknzHIjI0NPTGu6+qogUn3pyWcDvU6n5BR3Zy4Y0BJE/f gNrqomtRrGK4cxTj1zMHNWCU9M7ZfWMECoJxK/2aIojW/VmjyUwQBsAYwZity224ZvkS P6c77ZsMnrx7mHwA1bO8mLFEYOHrmCDdyiWZn05e7pazoudTlt9g5IZM6RngEAWUbF45 +OeUjAke/EYp6p1DxV+93k1/aaxKyagHLj6cfnNSPyQr9onREsf4YUPHyv3E27OLmdVL yb1g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1768489845; x=1769094645; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=3suL/FJnULndAdzhv6eYWlf/ToXJG1zAeBlGIDXgmts=; b=fIMIqBtqEfW0HpClRUkNKIAPvxbiKkxz4f4gkPQarkLCBQTyN1a1qHL5BUgn/ycO24 OO54OKYnN3RroygIM5PLG9zYXCOG+2d+5JPWYHq8ODgGFGsc0BIyS02hzI2UmeNuitJy t9IfFU3Y2yToZ6oZjD9eE1t/H6nEupNfspewd6YRdUAVMiKxCFPUJiko2Ieaq7Nu7VkG L3XRZ+yusYqMAWtKwzj4cNL2YqNXHCgcRx+qMNrRZfFbeqR9lUPLBGNV4osNuUoVpvCN b+eCq2HSvZI3X6qt/bv87uIu477sfddnX1Ayxq++l4yboiDaWQx/mcoQH4NbPYEiiJNu Mvdw== X-Gm-Message-State: AOJu0YyTITrMx5960wfLNnEaVpn8U8OJYkNX9QpZCjy51zkbEI2eQbQ0 aBjYdNl9pgZzu6avQg+SAb5c9VSTCqQM39ZB44+OHhZ4q3hy+SMphIsOq/cT+A== X-Gm-Gg: AY/fxX5yfPC6jvRg6lobAzoj1K6J7ZMfkhwWu7hzu8/mBm/6jFktM5tOlcF12Lsz82x Eer6uVWrZrLHe+CPdBRhMv6nva+ZLZTGSCcsimyuXurC0SQ+0hMX2hGPwmE1+e20i9ptYhB65G1 PbERPtBk9NPynSC3qUaBI91Tki4t5CYQNUK9bFp8d/WYR37ShDBkXlqhTL6WNzoMK87yQ7kQVGv KbaZnTcKC8ezOc7QGvMhwxc+WVbCPiXkQRO67PDJE0cNw3/55JGV5hgU++fdT6q69mLTjAXsRJL 8p/gukJO1pQksBF4Pz/0cdOl3E2mEDSX/7A8YH9GywZtj2fdN9BQfRNnLYcvD8EpUObNAzFqDrX gZemPq3L5poAZ4snhx+N5kgT6EXMKUsummHPBfqZDYh0Q4wD5V6uOWXCMIHniTYEXHGIxDzD/rg pQKlVmi0x9ijw1+Kas9kfivrBldv46akHpKrIAYzaBA8TKjMyjR3QWeX47lCn9Thpc X-Received: by 2002:a5d:5d0a:0:b0:432:84ef:841f with SMTP id ffacd0b85a97d-4342c548710mr8460875f8f.38.1768489845180; Thu, 15 Jan 2026 07:10:45 -0800 (PST) Received: from localhost (brnt-04-b2-v4wan-170138-cust2432.vm7.cable.virginm.net. [94.175.9.129]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-434af64a65bsm6446153f8f.7.2026.01.15.07.10.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Jan 2026 07:10:44 -0800 (PST) From: Stafford Horne To: LKML Cc: Linux OpenRISC , devicetree , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Stafford Horne , Jonas Bonn , Stefan Kristiansson Subject: [PATCH v6 6/6] openrisc: dts: Add de0 nano multicore config and devicetree Date: Thu, 15 Jan 2026 15:10:02 +0000 Message-ID: <20260115151014.3956805-7-shorne@gmail.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260115151014.3956805-1-shorne@gmail.com> References: <20260115151014.3956805-1-shorne@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a multicore configuration for the Terasic de0 nano FPGA development board. This SoC runs 2 OpenRISC CPUs at 50Mhz with 32MB ram, UART for console and GPIOs for LEDs. This FPGA SoC is based on the simple-smp reference board and brings in devices from the de0 nano common DTSI file. A default config is added that brings together the device tree and driver setup. Link: https://github.com/stffrdhrn/de0_nano-multicore Signed-off-by: Stafford Horne --- arch/openrisc/boot/dts/de0-nano-multicore.dts | 25 +++++ .../configs/de0_nano_multicore_defconfig | 92 +++++++++++++++++++ 2 files changed, 117 insertions(+) create mode 100644 arch/openrisc/boot/dts/de0-nano-multicore.dts create mode 100644 arch/openrisc/configs/de0_nano_multicore_defconfig diff --git a/arch/openrisc/boot/dts/de0-nano-multicore.dts b/arch/openrisc/= boot/dts/de0-nano-multicore.dts new file mode 100644 index 000000000000..b6cf286afaa4 --- /dev/null +++ b/arch/openrisc/boot/dts/de0-nano-multicore.dts @@ -0,0 +1,25 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include +#include + +/dts-v1/; + +#include "simple-smp.dtsi" +#include "de0-nano-common.dtsi" + +/ { + model =3D "Terasic DE0 Nano - Multicore"; +}; + +&cpu0 { + clock-frequency =3D <50000000>; +}; + +&cpu1 { + clock-frequency =3D <50000000>; +}; + +&serial0 { + clock-frequency =3D <50000000>; +}; diff --git a/arch/openrisc/configs/de0_nano_multicore_defconfig b/arch/open= risc/configs/de0_nano_multicore_defconfig new file mode 100644 index 000000000000..d33b1226e09c --- /dev/null +++ b/arch/openrisc/configs/de0_nano_multicore_defconfig @@ -0,0 +1,92 @@ +CONFIG_LOCALVERSION=3D"-de0nano-smp" +CONFIG_SYSVIPC=3Dy +CONFIG_POSIX_MQUEUE=3Dy +CONFIG_NO_HZ=3Dy +CONFIG_LOG_BUF_SHIFT=3D14 +CONFIG_BLK_DEV_INITRD=3Dy +# CONFIG_RD_GZIP is not set +# CONFIG_RD_BZIP2 is not set +# CONFIG_RD_LZMA is not set +# CONFIG_RD_XZ is not set +# CONFIG_RD_LZO is not set +# CONFIG_RD_LZ4 is not set +CONFIG_EXPERT=3Dy +# CONFIG_EPOLL is not set +# CONFIG_TIMERFD is not set +# CONFIG_EVENTFD is not set +# CONFIG_AIO is not set +CONFIG_KALLSYMS_ALL=3Dy +CONFIG_DCACHE_WRITETHROUGH=3Dy +CONFIG_BUILTIN_DTB_NAME=3D"de0-nano-multicore" +CONFIG_OPENRISC_HAVE_INST_CMOV=3Dy +CONFIG_SMP=3Dy +CONFIG_HZ_100=3Dy +CONFIG_JUMP_LABEL=3Dy +# CONFIG_BLOCK is not set +CONFIG_SLUB_TINY=3Dy +# CONFIG_COMPAT_BRK is not set +# CONFIG_VM_EVENT_COUNTERS is not set +CONFIG_NET=3Dy +CONFIG_PACKET=3Dy +CONFIG_UNIX=3Dy +CONFIG_UNIX_DIAG=3Dy +CONFIG_INET=3Dy +CONFIG_IP_MULTICAST=3Dy +CONFIG_TCP_CONG_ADVANCED=3Dy +# CONFIG_TCP_CONG_BIC is not set +# CONFIG_TCP_CONG_CUBIC is not set +# CONFIG_TCP_CONG_WESTWOOD is not set +# CONFIG_TCP_CONG_HTCP is not set +# CONFIG_IPV6 is not set +# CONFIG_WIRELESS is not set +CONFIG_DEVTMPFS=3Dy +CONFIG_DEVTMPFS_MOUNT=3Dy +# CONFIG_PREVENT_FIRMWARE_BUILD is not set +# CONFIG_FW_LOADER is not set +CONFIG_NETDEVICES=3Dy +CONFIG_ETHOC=3Dy +CONFIG_MICREL_PHY=3Dy +# CONFIG_WLAN is not set +# CONFIG_INPUT is not set +# CONFIG_SERIO is not set +# CONFIG_VT is not set +# CONFIG_LEGACY_PTYS is not set +CONFIG_SERIAL_8250=3Dy +CONFIG_SERIAL_8250_CONSOLE=3Dy +CONFIG_SERIAL_OF_PLATFORM=3Dy +# CONFIG_HW_RANDOM is not set +CONFIG_GPIO_SYSFS=3Dy +# CONFIG_GPIO_CDEV_V1 is not set +CONFIG_GPIO_GENERIC_PLATFORM=3Dy +# CONFIG_HWMON is not set +# CONFIG_USB_SUPPORT is not set +CONFIG_NEW_LEDS=3Dy +CONFIG_LEDS_CLASS=3Dy +CONFIG_LEDS_GPIO=3Dy +CONFIG_LEDS_TRIGGERS=3Dy +CONFIG_LEDS_TRIGGER_TIMER=3Dy +CONFIG_LEDS_TRIGGER_ONESHOT=3Dy +CONFIG_LEDS_TRIGGER_HEARTBEAT=3Dy +CONFIG_LEDS_TRIGGER_CPU=3Dy +CONFIG_LEDS_TRIGGER_ACTIVITY=3Dy +CONFIG_LEDS_TRIGGER_GPIO=3Dy +CONFIG_LEDS_TRIGGER_DEFAULT_ON=3Dy +CONFIG_LEDS_TRIGGER_TRANSIENT=3Dy +CONFIG_LEDS_TRIGGER_PANIC=3Dy +CONFIG_LEDS_TRIGGER_NETDEV=3Dy +CONFIG_LEDS_TRIGGER_PATTERN=3Dy +CONFIG_LEDS_TRIGGER_TTY=3Dy +# CONFIG_DNOTIFY is not set +CONFIG_TMPFS=3Dy +CONFIG_NFS_FS=3Dy +CONFIG_XZ_DEC=3Dy +CONFIG_PRINTK_TIME=3Dy +CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT=3Dy +CONFIG_GDB_SCRIPTS=3Dy +CONFIG_VMLINUX_MAP=3Dy +CONFIG_HARDLOCKUP_DETECTOR=3Dy +CONFIG_WQ_WATCHDOG=3Dy +CONFIG_WQ_CPU_INTENSIVE_REPORT=3Dy +CONFIG_STACKTRACE=3Dy +CONFIG_RCU_CPU_STALL_CPUTIME=3Dy +# CONFIG_RCU_TRACE is not set --=20 2.51.0