From nobody Mon Feb 9 06:24:25 2026 Received: from Atcsqr.andestech.com (60-248-80-70.hinet-ip.hinet.net [60.248.80.70]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DFB473A1E67; Thu, 15 Jan 2026 14:54:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=60.248.80.70 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768488884; cv=none; b=NTZEQ/xAi2tcQ0Ag66UsmzHXtIc3I4JFezbkPO3bKntiqqYwBWhi+W7bMEfQcGRwRHKP2JvmLk8y6mhjz3mY1VvF8oN/LntALLMATT8928klTSUGw+sq58tOzejHgJkx62XzGVv/uvyvFKntclJW4xVDoQogmyNe2ULs8mqOayo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768488884; c=relaxed/simple; bh=EHQO37uBxePxsq+DZQ19kFSwOMfkUw8FZ5sp1eiEeAY=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=lk87WRvbjVPV3Qa8tqj754X2EeMD2Z7UopGMQ5zxwWsSA5LZImpeeAA3hgNpFy5xhTN6p+AcLH+49bgPo9ais9GYSodL+jchM6iHHKMwrLfn0NDCNYCfKwZeGpsWFegVSMNwHM3WkOwshzhn4Zj90sAgmHy/qCLhBmw9TE53+5o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=permerror header.from=andestech.com; spf=pass smtp.mailfrom=andestech.com; arc=none smtp.client-ip=60.248.80.70 Authentication-Results: smtp.subspace.kernel.org; dmarc=permerror header.from=andestech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=andestech.com Received: from mail.andestech.com (ATCPCS31.andestech.com [10.0.1.89]) by Atcsqr.andestech.com with ESMTPS id 60FEqqxa039423 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 15 Jan 2026 22:52:52 +0800 (+08) (envelope-from ben717@andestech.com) Received: from swlinux02.andestech.com (10.0.15.183) by ATCPCS31.andestech.com (10.0.1.89) with Microsoft SMTP Server id 14.3.498.0; Thu, 15 Jan 2026 22:52:51 +0800 From: Ben Zong-You Xie To: CC: , , , , , , , , , , , , Ben Zong-You Xie Subject: [PATCH 4/4] riscv: dts: andes: qilai: add I2C controller Date: Thu, 15 Jan 2026 22:52:44 +0800 Message-ID: <20260115145244.435890-5-ben717@andestech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260115145244.435890-1-ben717@andestech.com> References: <20260115145244.435890-1-ben717@andestech.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-DKIM-Results: atcpcs31.andestech.com; dkim=none; X-DNSRBL: X-SPAM-SOURCE-CHECK: pass X-MAIL: Atcsqr.andestech.com 60FEqqxa039423 Content-Type: text/plain; charset="utf-8" Add the I2C node to QiLai DTS. Signed-off-by: Ben Zong-You Xie --- arch/riscv/boot/dts/andes/qilai.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/riscv/boot/dts/andes/qilai.dtsi b/arch/riscv/boot/dts/and= es/qilai.dtsi index de3de32f8c39..aef641f02a53 100644 --- a/arch/riscv/boot/dts/andes/qilai.dtsi +++ b/arch/riscv/boot/dts/andes/qilai.dtsi @@ -182,5 +182,11 @@ uart0: serial@30300000 { reg-io-width =3D <4>; no-loopback-test; }; + + i2c: i2c@30800000 { + compatible =3D "andestech,qilai-i2c","andestech,atciic100"; + reg =3D <0x0 0x30800000 0x0 0x100000>; + interrupts =3D <6 IRQ_TYPE_LEVEL_HIGH>; + }; }; }; --=20 2.34.1