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[129.46.232.65]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-892668a2419sm64388416d6.30.2026.01.15.01.29.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Jan 2026 01:29:35 -0800 (PST) From: yuanjie yang To: robin.clark@oss.qualcomm.com, lumag@kernel.org, jesszhan0024@gmail.com, sean@poorly.run, marijn.suijten@somainline.org, airlied@gmail.com, simona@ffwll.ch, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, neil.armstrong@linaro.org, konrad.dybcio@oss.qualcomm.com Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, tingwei.zhang@oss.qualcomm.com, aiqun.yu@oss.qualcomm.com, yongxing.mou@oss.qualcomm.com, Dmitry Baryshkov Subject: [PATCH v6 11/12] drm/msm/dpu: Add Kaanapali WB support Date: Thu, 15 Jan 2026 17:27:48 +0800 Message-Id: <20260115092749.533-12-yuanjie.yang@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260115092749.533-1-yuanjie.yang@oss.qualcomm.com> References: <20260115092749.533-1-yuanjie.yang@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTE1MDA2NSBTYWx0ZWRfX6Do4nnSSota5 Xu958wdOdUsy7dUvCIdla/X7MHvAq4kK/2sjkdbt74GrWj4Ow0GA5UmKEbstk+ogAs8mEP7dWHF Grx25rnQu/7PS4b0puE06vKO5IdQ+TYmrmt8c5Xm7iqaMGyygASR4TXsK+K8cdQhlTDNLik5ftx LfzL3WWC7kOm3J+ZsXLuTPLlrB34TzTAYbuMPkPNg122f5116VgNYHIzdpi7R/iLsBPmm6tOcX9 qhmnEfCl6hRO9tU+5/Qa4TEVXDmMcpgraAUfkRguvBljV9RQ1M7v00wzN5Hh3OpLnDvJYrJzjBT VBx5yPWWoSNWrt6hju6DQ/RhkteL98ye/RNtB3x8UbHvgy4o+8lzMjLgmN+qd9ZPGOqKnwa4gar yqBUnJyklETRSb4Sm9wEP0QLDFmZVEQjiy+Jil2EVYRvPN1kwjYbbmN20sVZ4pdl589YJ04+sJC j82NOXDwkxIYXP8srDA== X-Proofpoint-ORIG-GUID: oW_8e4a2srgTniGH75oUCCoTBmSM_JRp X-Authority-Analysis: v=2.4 cv=W6Y1lBWk c=1 sm=1 tr=0 ts=6968b380 cx=c_pps a=UgVkIMxJMSkC9lv97toC5g==:117 a=C3Dk8TwHQYyIj7nOf9RCJw==:17 a=vUbySO9Y5rIA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=kCfvZJGldO2mi53t-5YA:9 a=1HOtulTD9v-eNWfpl4qZ:22 X-Proofpoint-GUID: oW_8e4a2srgTniGH75oUCCoTBmSM_JRp X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2026-01-15_02,2026-01-14_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 priorityscore=1501 phishscore=0 suspectscore=0 lowpriorityscore=0 spamscore=0 impostorscore=0 malwarescore=0 clxscore=1015 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2512120000 definitions=main-2601150065 Content-Type: text/plain; charset="utf-8" From: Yuanjie Yang Add support for Kaanapali WB, which introduce register relocations, use the updated registeri definition to ensure compatibility. Co-developed-by: Yongxing Mou Signed-off-by: Yongxing Mou Reviewed-by: Dmitry Baryshkov Signed-off-by: Yuanjie Yang --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c b/drivers/gpu/drm/ms= m/disp/dpu1/dpu_hw_wb.c index 478a091aeccf..4da4bd6a997c 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c @@ -148,6 +148,15 @@ static void dpu_hw_wb_setup_qos_lut(struct dpu_hw_wb *= ctx, cfg); } =20 +static void dpu_hw_wb_setup_qos_lut_v13(struct dpu_hw_wb *ctx, + struct dpu_hw_qos_cfg *cfg) +{ + if (!ctx || !cfg) + return; + + dpu_hw_setup_qos_lut_v13(&ctx->hw, cfg); +} + static void dpu_hw_wb_setup_cdp(struct dpu_hw_wb *ctx, const struct msm_format *fmt, bool enable) @@ -202,8 +211,12 @@ static void _setup_wb_ops(struct dpu_hw_wb_ops *ops, if (test_bit(DPU_WB_XY_ROI_OFFSET, &features)) ops->setup_roi =3D dpu_hw_wb_roi; =20 - if (test_bit(DPU_WB_QOS, &features)) - ops->setup_qos_lut =3D dpu_hw_wb_setup_qos_lut; + if (test_bit(DPU_WB_QOS, &features)) { + if (mdss_rev->core_major_ver >=3D 13) + ops->setup_qos_lut =3D dpu_hw_wb_setup_qos_lut_v13; + else + ops->setup_qos_lut =3D dpu_hw_wb_setup_qos_lut; + } =20 if (test_bit(DPU_WB_CDP, &features)) ops->setup_cdp =3D dpu_hw_wb_setup_cdp; --=20 2.34.1