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Thu, 15 Jan 2026 15:42:48 -0800 (PST) From: Anirudh Srinivasan Date: Thu, 15 Jan 2026 17:42:03 -0600 Subject: [PATCH 4/8] dt-bindings: soc: tenstorrent: Add atlantis resets Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260115-atlantis-clocks-v1-4-7356e671f28b@oss.tenstorrent.com> References: <20260115-atlantis-clocks-v1-0-7356e671f28b@oss.tenstorrent.com> In-Reply-To: <20260115-atlantis-clocks-v1-0-7356e671f28b@oss.tenstorrent.com> To: Drew Fustini , Joel Stanley , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd , Anirudh Srinivasan , Philipp Zabel Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, joel@jms.id.au, fustini@kernel.org, mpe@kernel.org, mpe@oss.tenstorrent.com, npiggin@oss.tenstorrent.com, agross@kernel.org, agross@oss.tenstorrent.com X-Mailer: b4 0.14.3 Document resets from RCPU syscon for atlantis. Signed-off-by: Anirudh Srinivasan --- .../tenstorrent/tenstorrent,atlantis-syscon.yaml | 5 ++++ .../clock/tenstorrent,atlantis-syscon.h | 34 ++++++++++++++++++= ++++ 2 files changed, 39 insertions(+) diff --git a/Documentation/devicetree/bindings/soc/tenstorrent/tenstorrent,= atlantis-syscon.yaml b/Documentation/devicetree/bindings/soc/tenstorrent/te= nstorrent,atlantis-syscon.yaml index 3915d78dfeda..7e9c8d85ba9e 100644 --- a/Documentation/devicetree/bindings/soc/tenstorrent/tenstorrent,atlanti= s-syscon.yaml +++ b/Documentation/devicetree/bindings/soc/tenstorrent/tenstorrent,atlanti= s-syscon.yaml @@ -31,11 +31,15 @@ properties: description: See for valid indi= ces. =20 + "#reset-cells": + const: 1 + required: - compatible - reg - clocks - "#clock-cells" + - "#reset-cells" =20 additionalProperties: false =20 @@ -55,4 +59,5 @@ examples: reg =3D <0x0 0xa8000000 0x0 0x10000>; clocks =3D <&osc_24m>; #clock-cells =3D <1>; + #reset-cells =3D <1>; }; diff --git a/include/dt-bindings/clock/tenstorrent,atlantis-syscon.h b/incl= ude/dt-bindings/clock/tenstorrent,atlantis-syscon.h index a8518319642a..ac6afc95b224 100644 --- a/include/dt-bindings/clock/tenstorrent,atlantis-syscon.h +++ b/include/dt-bindings/clock/tenstorrent,atlantis-syscon.h @@ -64,4 +64,38 @@ #define CLK_CAN0_TIMER_CLK 52 #define CLK_CAN1_TIMER_CLK 53 =20 +/* RCPU domain reset */ +#define RST_SMNDMA0 0 +#define RST_SMNDMA1 1 +#define RST_WDT0 2 +#define RST_WDT1 3 +#define RST_TMR 4 +#define RST_PVTC 5 +#define RST_PMU 6 +#define RST_MAILBOX 7 +#define RST_SPACC 8 +#define RST_OTP 9 +#define RST_TRNG 10 +#define RST_CRC 11 +#define RST_QSPI 12 +#define RST_I2C0 13 +#define RST_I2C1 14 +#define RST_I2C2 15 +#define RST_I2C3 16 +#define RST_I2C4 17 +#define RST_UART0 18 +#define RST_UART1 19 +#define RST_UART2 20 +#define RST_UART3 21 +#define RST_UART4 22 +#define RST_SPI0 23 +#define RST_SPI1 24 +#define RST_SPI2 25 +#define RST_SPI3 26 +#define RST_GPIO 27 +#define RST_CAN0 28 +#define RST_CAN1 29 +#define RST_I2S0 30 +#define RST_I2S1 31 + #endif /* _DT_BINDINGS_ATLANTIS_SYSCON_H */ --=20 2.43.0