From nobody Sun Feb 8 07:14:31 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7C3F0344055 for ; Wed, 14 Jan 2026 23:07:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768432052; cv=none; b=hairH05VX0CDupEJ4Q2f8LgXhWEKbM/m9m1SI67sxDp5uzr7xr2YigO4RkxMUo8Dv0LSCWE5wDjU1FryceRxqmShYlOsjx7/nojzsBLVdRynqjyHGMEJJH1WmNpRJ9FAqBZv80xQdthH/dJ91DzJSjSj7QBjyEn4brkjNhIeRSY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768432052; c=relaxed/simple; bh=1BX+9wika0w4bjpVzpXwsuKIinGNFQw+VukUt+hlY7A=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=fs/LITbY+Zj2LhBapvdi7wWdA1OMTvf4OIRWADMJNsFvih/r5LzX9n5VmXayIUzx5Pc/AuQ70P/459+/GPs9Qbm6jInRplkAS9TDp/ArlRtnXrsGoLP8POaF6eFZmTq1uMQBs2J5agIzrIkVrUgRbRV1hPaRjjfs+dOHkv/cD04= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=uUzZCvdP; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="uUzZCvdP" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type; bh=M3ml5hv1veuBDv5JcHu7QZoxL9+gsssIIrGKTPBWTCQ=; b=uUzZCvdPtHGb1hLa4ZWZpbqa83 l3l0LYCdzfuoz0TGexcqQVB6J6FCaT/Pn+i1WYgr0JLsv3QgLq04jo0vGXqUAeGQIKJXsgxJ0oW03 TCdbXUL7bJ5cteihAS7+LKAMyxRbPZ8X8EkSSghGMUBhcH517lujqqPr6pSJYkLq9ch7tUgZtCYjm 6Jsk5Zegvh9Lw08kHrJdeVhGvTQf+D8bZza2pNP7DYD7y2axBjSoCSC8n+X2MSQtqO+0Xc+05y5NW 9Ph3Kx0np2FqjJWF1tqiDwjgyQ5g+51IgVl//vKgiCymUVEGiPaSv58nQ9aH6ZrBZQ9vtyDDUw5M0 Rc0Y2x5A==; Received: from i53875b96.versanet.de ([83.135.91.150] helo=phil..) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1vg9xT-002N2m-HG; Thu, 15 Jan 2026 00:07:24 +0100 From: Heiko Stuebner To: heiko@sntech.de Cc: quentin.schulz@cherry.de, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Heiko Stuebner Subject: [PATCH v3 1/5] arm64: dts: rockchip: Use phandle for i2c_lvds_blc on rk3368-lion haikou Date: Thu, 15 Jan 2026 00:07:03 +0100 Message-ID: <20260114230707.4175162-2-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20260114230707.4175162-1-heiko@sntech.de> References: <20260114230707.4175162-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Heiko Stuebner i2c@0 on i2cmux2 does already have a phandle i2c_lvds_blc defined. Use this one instead of replicating the hierarchy again, as this might result in strange errors if the lion dtsi is changed at some point in the future. Reviewed-by: Quentin Schulz Signed-off-by: Heiko Stuebner --- .../boot/dts/rockchip/rk3368-lion-haikou.dts | 18 ++++++++---------- 1 file changed, 8 insertions(+), 10 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3368-lion-haikou.dts b/arch/arm= 64/boot/dts/rockchip/rk3368-lion-haikou.dts index ab70ee5f561a..abd1af97456a 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368-lion-haikou.dts +++ b/arch/arm64/boot/dts/rockchip/rk3368-lion-haikou.dts @@ -18,16 +18,6 @@ chosen { stdout-path =3D "serial0:115200n8"; }; =20 - i2cmux2 { - i2c@0 { - eeprom: eeprom@50 { - compatible =3D "atmel,24c01"; - pagesize =3D <8>; - reg =3D <0x50>; - }; - }; - }; - leds { pinctrl-0 =3D <&module_led_pins>, <&sd_card_led_pin>; =20 @@ -68,6 +58,14 @@ vcc5v0_otg: regulator-vcc5v0-otg { }; }; =20 +&i2c_lvds_blc { + eeprom: eeprom@50 { + compatible =3D "atmel,24c01"; + pagesize =3D <8>; + reg =3D <0x50>; + }; +}; + &sdmmc { bus-width =3D <4>; cap-mmc-highspeed; --=20 2.47.2 From nobody Sun Feb 8 07:14:31 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C62F9352FA2 for ; Wed, 14 Jan 2026 23:07:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768432050; cv=none; b=YHTWfWUXpR0TySzMdHhN1sYBIqEyUlN8KIRWpSBZC6zn1kZWK/DgaWhsjyi6fzxc7Z9BAzltRR2H0KkMh7C1zLj7hwvkrzV0ORLv6apDtYv2P97kxZcOWRBiai1fTtMs+I4l1Nier0tHKgSXHMoHQLlVSb5pBn3s2iTFaCHJqRw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768432050; c=relaxed/simple; bh=PIE3KM+mAuELpHFNHAUW9+jd8LipdcKYlilENTtFk5A=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=uTnDeTTCvx2Ie2gzhsBhjnA3Cowg7aunJdLRFqpXRKh+8lfPNyG6OT4qYWVE31BtHjiNXHHVkx76UlPjvSvkuOuQyS7+47P8TaTcY+PnumivOxO9lY+2XONusv03pHMeG7ID19Y1ogVuC2ZPIL2A5j6iBXPFGFw+U+IhXLaC//A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=1XyKGZll; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="1XyKGZll" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type; bh=cE0Lkb67ht9M5oQ7LmpBhT0gYI8iCahxni7CTG1vi3Q=; b=1XyKGZllCxrjUC/zx+CIFFpFK1 NdaeviO4BrLi6sg645eOuUWqE+4L9w5zxQhl/uosKFixmQuajHXd8gzDHkYKAhTzGPPHbSVfA4db1 BNqOflLqVymqWb+N3oGaxoT6YyOP3OVc1ourlUDpr0iimYhi1LOQWX4+Wo6g4BE/KMNv3Kzi9imyr SD0/iDEzc8dvpdaKlSKl+/zaaASwbcnnkL6tKWVzT/GU8QXWW9CXA3zkbeGy3/KyM4Uiok4KP0/Yl kxJPHYtSVdlgbs5sSG+xL/3kOTTdOWAV69U28sGwtoh94Kxg4aO2Ws3jUAKAsq73QEV45Q+geU1hR CqyuE0HA==; Received: from i53875b96.versanet.de ([83.135.91.150] helo=phil..) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1vg9xT-002N2m-Qu; Thu, 15 Jan 2026 00:07:24 +0100 From: Heiko Stuebner To: heiko@sntech.de Cc: quentin.schulz@cherry.de, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Heiko Stuebner Subject: [PATCH v3 2/5] arm64: dts: rockchip: Add HDMI node to RK3368 Date: Thu, 15 Jan 2026 00:07:04 +0100 Message-ID: <20260114230707.4175162-3-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20260114230707.4175162-1-heiko@sntech.de> References: <20260114230707.4175162-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Heiko Stuebner Add the HDMI controller node to the main SoC devicetree and hook it into the VOP. Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3368.dtsi | 43 ++++++++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts= /rockchip/rk3368.dtsi index f9e24b25274b..98d350768fd2 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi @@ -883,6 +883,11 @@ vop_out_dsi: endpoint@0 { reg =3D <0>; remote-endpoint =3D <&dsi_in_vop>; }; + + vop_out_hdmi: endpoint@1 { + reg =3D <1>; + remote-endpoint =3D <&hdmi_in_vop>; + }; }; }; =20 @@ -941,6 +946,37 @@ dphy: phy@ff968000 { status =3D "disabled"; }; =20 + hdmi: hdmi@ff980000 { + compatible =3D "rockchip,rk3368-dw-hdmi"; + reg =3D <0x0 0xff980000 0x0 0x20000>; + interrupts =3D ; + clocks =3D <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>, <&cru SCLK_HDMI= _CEC>; + clock-names =3D "iahb", "isfr", "cec"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&hdmi_i2c_xfer>; + power-domains =3D <&power RK3368_PD_VIO>; + reg-io-width =3D <4>; + rockchip,grf =3D <&grf>; + status =3D "disabled"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + hdmi_in: port@0 { + reg =3D <0>; + + hdmi_in_vop: endpoint { + remote-endpoint =3D <&vop_out_hdmi>; + }; + }; + + hdmi_out: port@1 { + reg =3D <1>; + }; + }; + }; + hevc_mmu: iommu@ff9a0440 { compatible =3D "rockchip,iommu"; reg =3D <0x0 0xff9a0440 0x0 0x40>, @@ -1204,6 +1240,13 @@ rmii_pins: rmii-pins { }; }; =20 + hdmi { + hdmi_i2c_xfer: hdmi-i2c-xfer { + rockchip,pins =3D <3 RK_PD2 1 &pcfg_pull_none>, + <3 RK_PD3 1 &pcfg_pull_none>; + }; + }; + i2c0 { i2c0_xfer: i2c0-xfer { rockchip,pins =3D <0 RK_PA6 1 &pcfg_pull_none>, --=20 2.47.2 From nobody Sun Feb 8 07:14:31 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C618335295D for ; Wed, 14 Jan 2026 23:07:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Thu, 15 Jan 2026 00:07:24 +0100 From: Heiko Stuebner To: heiko@sntech.de Cc: quentin.schulz@cherry.de, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Heiko Stuebner Subject: [PATCH v3 3/5] arm64: dts: rockchip: Enable HDMI output on RK3368-Lion-Haikou Date: Thu, 15 Jan 2026 00:07:05 +0100 Message-ID: <20260114230707.4175162-4-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20260114230707.4175162-1-heiko@sntech.de> References: <20260114230707.4175162-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Heiko Stuebner Enable the VOP and HDMI controller on the Lion-Haikou board. Signed-off-by: Heiko Stuebner Reviewed-by: Quentin Schulz --- .../boot/dts/rockchip/rk3368-lion-haikou.dts | 16 ++++++++++++++++ arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi | 5 +++++ 2 files changed, 21 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3368-lion-haikou.dts b/arch/arm= 64/boot/dts/rockchip/rk3368-lion-haikou.dts index abd1af97456a..ec843a1b0266 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368-lion-haikou.dts +++ b/arch/arm64/boot/dts/rockchip/rk3368-lion-haikou.dts @@ -58,6 +58,14 @@ vcc5v0_otg: regulator-vcc5v0-otg { }; }; =20 +&display_subsystem { + status =3D "okay"; +}; + +&hdmi { + status =3D "okay"; +}; + &i2c_lvds_blc { eeprom: eeprom@50 { compatible =3D "atmel,24c01"; @@ -101,6 +109,14 @@ &uart1 { status =3D "disabled"; }; =20 +&vop { + status =3D "okay"; +}; + +&vop_mmu { + status =3D "okay"; +}; + &pinctrl { pinctrl-names =3D "default"; pinctrl-0 =3D <&haikou_pin_hog>; diff --git a/arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi b/arch/arm64/boo= t/dts/rockchip/rk3368-lion.dtsi index 61c52bd91784..4b4305b90055 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi @@ -164,6 +164,11 @@ &gmac { status =3D "okay"; }; =20 +&hdmi { + avdd-0v9-supply =3D <&vdd10_video>; + avdd-1v8-supply =3D <&vcc18_video>; +}; + &i2c0 { status =3D "okay"; =20 --=20 2.47.2 From nobody Sun Feb 8 07:14:31 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0CBDC33BBC6 for ; Wed, 14 Jan 2026 23:07:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768432051; cv=none; b=AGjIEPQJV+w4ur4V4PGihkB9aKYjJG1YcnLg/Zv974oF529emmqb5A9k976x/6ZDJLzKG1/ZnwJFxj8eSCOpqfiqgP/E7OeAdbL078TSBtWcdCClxT4ILk4Brft7/5vcQPv8AVAQrW5wklHrm3lmBidiUiNMNOpRZLpQr3ByG1A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768432051; c=relaxed/simple; bh=HjxmhoGmIlYhbetrnE1ix/PisY1YTVEZ0CmVIH+YJg0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=jtWoXtzWJNooA8H/yutJ7z33tv2zO7kYN8CNP4B/wby4dSISZB6Hs2/mKPEupuC0PfeJiWCyvvYrJCzV/M98/pYvX/5jeZ4mOdTWtqOIwwAcVpRaMntwYl8f/+o1mBQACtmfalZlxbPPNxjSXdKkWdpFsIXZ4k7DrZho+LhC608= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=byj12oTE; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="byj12oTE" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type; bh=M3FyQ8l8W5vapyv4/AJjZuv6MrqDzDHS9HXxBaes7wo=; b=byj12oTETIGnqf641qCNP1nArD NLg5VSPfB0yBx0mNeI1sIv9AJTdmKQbRFcNegf80YXw4Ez27pA7KYdLPPHwvmydYtMg7NfoCi2YZw ccYC6VMFg8CIVfQsJnpItyUjYga/1slTRDak1co8LsO0edfAvmlllaaAD8ULFbUK7m9pdIL88+VcI YJ4/ugdiGNb0OIr6OTghJ5UuHpjzPOQhJIVo4HtI2neNVNLify7a2TwAD/c84iVuG2zT3poQM/iSb yNnNtrlgN63BpbEOk6GR3aPDfuIFmTrPpryk2L3D+pNayw92vsqe3zSUPELr8N2BLMrQ1vFcUkKLq Cum2OFBA==; Received: from i53875b96.versanet.de ([83.135.91.150] helo=phil..) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1vg9xU-002N2m-Ew; Thu, 15 Jan 2026 00:07:25 +0100 From: Heiko Stuebner To: heiko@sntech.de Cc: quentin.schulz@cherry.de, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Heiko Stuebner Subject: [PATCH v3 4/5] arm64: dts: rockchip: Enable pwm1 on rk3368-lion-haikou Date: Thu, 15 Jan 2026 00:07:06 +0100 Message-ID: <20260114230707.4175162-5-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20260114230707.4175162-1-heiko@sntech.de> References: <20260114230707.4175162-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Heiko Stuebner The pwm1 is exposed as BLT_CTRL signal on the MISC I/O pin header of the haikou baseboard and the Qseven standard specifies this signal is only for PWM (either for a panel backlight or generic PWM). So enable it in the Haikou baseboard for Lion. Suggested-by: Quentin Schulz Signed-off-by: Heiko Stuebner Reviewed-by: Quentin Schulz --- arch/arm64/boot/dts/rockchip/rk3368-lion-haikou.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3368-lion-haikou.dts b/arch/arm= 64/boot/dts/rockchip/rk3368-lion-haikou.dts index ec843a1b0266..1b3a498d3624 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368-lion-haikou.dts +++ b/arch/arm64/boot/dts/rockchip/rk3368-lion-haikou.dts @@ -74,6 +74,10 @@ eeprom: eeprom@50 { }; }; =20 +&pwm1 { + status =3D "okay"; +}; + &sdmmc { bus-width =3D <4>; cap-mmc-highspeed; --=20 2.47.2 From nobody Sun Feb 8 07:14:31 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4DFCB34EEEB for ; Wed, 14 Jan 2026 23:07:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768432051; cv=none; b=Lb0+YrQnE3t5FSk9SSBGuVa+aa/t0+Qzumo2HgAuR1WKN3DanpZF7NI41Aku+XyUQgOOBNTzxGR8/jfLG6mx4zHr7FXrwMgwAFgOp2us/ZnppDsUAGxHwh/jDLSTvoX6DAFeQOu9GZB+kSdIHh++aCeHvRkArLxH8gsyFTTBuUo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768432051; c=relaxed/simple; bh=QXopUg592YkQU/FjXzfG+0b8Zm/EWdFjppShdewho7E=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=eYcc5cxpzwKfddoXCkZhpK4fVCi4yMoDkGaLh2mGQxOw/r8IH/RRaX0178zMneXdHwPXqScxQ504+AyzEyE9K/DxKpG5SIYA6jRc1wou8dXj5+P5fY3H9VMkNGdxVSNCkjTQme/hgNdBrOVyD/O0T7cyhG4h0B/aNXL57tqz2ZU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=S1dAnkYh; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="S1dAnkYh" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type; bh=OQZnrxjj0Ml1xg/bRDRZ4mf5kTwd2a34imkpo4Xbxt4=; b=S1dAnkYhZz2+v1SzpXUsuOgZI3 AIyHT8WuiKj7FP8fUcYYQe8LWNuwlvtIV753zAp92pTsGAhbtKkVoNF3WmHU1twDz+hq1P3/lMrfm ShrOagBdERpKqc3+JNj3ibX/XrJTOAoBsMSd5LFXllGBPrsU2aBNDtdWuv8v+sdqlUWv2Yn+zhY7Y i62wdBcvXYuXBwRZy59HVjZgqOJgksZO9raV3lgO84PFJOYKUQf4kRoUhZ77r41Dh9B06ynlTbVZk ZcPZwwzovWN+ZtBFB2I4sly+mcP+q5gtscgWJVUXMUovwAz4kspgKnyb7sj7tfmJ5s3rdclkqJVs0 9GCI4GJQ==; Received: from i53875b96.versanet.de ([83.135.91.150] helo=phil..) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1vg9xU-002N2m-Ok; Thu, 15 Jan 2026 00:07:25 +0100 From: Heiko Stuebner To: heiko@sntech.de Cc: quentin.schulz@cherry.de, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Heiko Stuebner Subject: [PATCH v3 5/5] arm64: dts: rockchip: Add the Video-Demo overlay for Lion Haikou Date: Thu, 15 Jan 2026 00:07:07 +0100 Message-ID: <20260114230707.4175162-6-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20260114230707.4175162-1-heiko@sntech.de> References: <20260114230707.4175162-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Heiko Stuebner The video-demo adapter also works on the Lion SoM when running on a Haikou baseboard, so add an overlay for it. Tested-by: Quentin Schulz Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/Makefile | 5 + .../rk3368-lion-haikou-video-demo.dtso | 170 ++++++++++++++++++ 2 files changed, 175 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3368-lion-haikou-video-d= emo.dtso diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/ro= ckchip/Makefile index dbdda9783e93..64c4199f8a43 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -42,6 +42,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3368-evb-act8846.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3368-geekbox.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3368-lba3368.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3368-lion-haikou.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3368-lion-haikou-video-demo.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3368-orion-r68-meta.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3368-px5-evb.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3368-r88.dtb @@ -238,6 +239,10 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D px30-ringneck-haikou-= haikou-video-demo.dtb px30-ringneck-haikou-haikou-video-demo-dtbs :=3D px30-ringneck-haikou.dtb \ px30-ringneck-haikou-video-demo.dtbo =20 +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3368-lion-haikou-haikou-video-demo.dtb +rk3368-lion-haikou-haikou-video-demo-dtbs :=3D rk3368-lion-haikou.dtb \ + rk3368-lion-haikou-video-demo.dtbo + dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3399-puma-haikou-haikou-video-demo.dtb rk3399-puma-haikou-haikou-video-demo-dtbs :=3D rk3399-puma-haikou.dtb \ rk3399-puma-haikou-video-demo.dtbo diff --git a/arch/arm64/boot/dts/rockchip/rk3368-lion-haikou-video-demo.dts= o b/arch/arm64/boot/dts/rockchip/rk3368-lion-haikou-video-demo.dtso new file mode 100644 index 000000000000..2db0f3d9495b --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3368-lion-haikou-video-demo.dtso @@ -0,0 +1,170 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2025 Cherry Embedded Solutions GmbH + * + * DEVKIT ADDON CAM-TS-A01 + * https://embedded.cherry.de/product/development-kit/ + * + * DT-overlay for the camera / DSI demo appliance for Haikou boards. + * In the flavour for use with a Lion system-on-module. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include +#include + +&{/} { + backlight: backlight { + compatible =3D "pwm-backlight"; + power-supply =3D <&dc_12v>; + pwms =3D <&pwm1 0 25000 0>; + }; + + cam_afvdd_2v8: regulator-cam-afvdd-2v8 { + compatible =3D "regulator-fixed"; + gpio =3D <&pca9670 2 GPIO_ACTIVE_LOW>; + regulator-max-microvolt =3D <2800000>; + regulator-min-microvolt =3D <2800000>; + regulator-name =3D "cam-afvdd-2v8"; + vin-supply =3D <&vcc2v8_video>; + }; + + cam_avdd_2v8: regulator-cam-avdd-2v8 { + compatible =3D "regulator-fixed"; + gpio =3D <&pca9670 4 GPIO_ACTIVE_LOW>; + regulator-max-microvolt =3D <2800000>; + regulator-min-microvolt =3D <2800000>; + regulator-name =3D "cam-avdd-2v8"; + vin-supply =3D <&vcc2v8_video>; + }; + + cam_dovdd_1v8: regulator-cam-dovdd-1v8 { + compatible =3D "regulator-fixed"; + gpio =3D <&pca9670 3 GPIO_ACTIVE_LOW>; + regulator-max-microvolt =3D <1800000>; + regulator-min-microvolt =3D <1800000>; + regulator-name =3D "cam-dovdd-1v8"; + vin-supply =3D <&vcc1v8_video>; + }; + + cam_dvdd_1v2: regulator-cam-dvdd-1v2 { + compatible =3D "regulator-fixed"; + enable-active-high; + gpio =3D <&pca9670 5 GPIO_ACTIVE_HIGH>; + regulator-max-microvolt =3D <1200000>; + regulator-min-microvolt =3D <1200000>; + regulator-name =3D "cam-dvdd-1v2"; + vin-supply =3D <&vcc3v3_baseboard>; + }; + + vcc1v8_video: regulator-vcc1v8-video { + compatible =3D "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <1800000>; + regulator-min-microvolt =3D <1800000>; + regulator-name =3D "vcc1v8-video"; + vin-supply =3D <&vcc3v3_baseboard>; + }; + + vcc2v8_video: regulator-vcc2v8-video { + compatible =3D "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <2800000>; + regulator-min-microvolt =3D <2800000>; + regulator-name =3D "vcc2v8-video"; + vin-supply =3D <&vcc3v3_baseboard>; + }; + + video-adapter-leds { + compatible =3D "gpio-leds"; + + video-adapter-led { + color =3D ; + gpios =3D <&pca9670 7 GPIO_ACTIVE_HIGH>; + label =3D "video-adapter-led"; + linux,default-trigger =3D "none"; + }; + }; +}; + +&dphy { + status =3D "okay"; +}; + +&i2c_gp2 { + #address-cells =3D <1>; + #size-cells =3D <0>; + /* OV5675, GT911, DW9714 are limited to 400KHz */ + clock-frequency =3D <400000>; + + touchscreen@14 { + compatible =3D "goodix,gt911"; + reg =3D <0x14>; + interrupt-parent =3D <&gpio1>; + interrupts =3D ; + irq-gpios =3D <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; + pinctrl-0 =3D <&touch_int>; + pinctrl-names =3D "default"; + reset-gpios =3D <&pca9670 1 GPIO_ACTIVE_HIGH>; + AVDD28-supply =3D <&vcc2v8_video>; + VDDIO-supply =3D <&vcc3v3_baseboard>; + }; + + pca9670: gpio@27 { + compatible =3D "nxp,pca9670"; + reg =3D <0x27>; + gpio-controller; + #gpio-cells =3D <2>; + pinctrl-0 =3D <&pca9670_resetn>; + pinctrl-names =3D "default"; + reset-gpios =3D <&gpio1 RK_PA5 GPIO_ACTIVE_LOW>; + }; +}; + +&mipi_dsi { + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "okay"; + + panel@0 { + compatible =3D "leadtek,ltk050h3148w"; + reg =3D <0>; + backlight =3D <&backlight>; + iovcc-supply =3D <&vcc1v8_video>; + reset-gpios =3D <&pca9670 0 GPIO_ACTIVE_LOW>; + vci-supply =3D <&vcc2v8_video>; + + port { + mipi_in_panel: endpoint { + remote-endpoint =3D <&mipi_out_panel>; + }; + }; + }; +}; + +&mipi_out { + mipi_out_panel: endpoint { + remote-endpoint =3D <&mipi_in_panel>; + }; +}; + +&pinctrl { + pca9670 { + pca9670_resetn: pca9670-resetn { + rockchip,pins =3D <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + touch { + touch_int: touch-int { + rockchip,pins =3D <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; --=20 2.47.2