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[217.128.226.200]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-47f941a670dsm3098195e9.5.2026.01.14.14.12.14 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 14 Jan 2026 14:12:15 -0800 (PST) From: "benoit.masson" To: Jean Delvare , Guenter Roeck Cc: linux-hwmon@vger.kernel.org, linux-kernel@vger.kernel.org, Jonathan Corbet , linux-doc@vger.kernel.org, "benoit.masson" Subject: [PATCH v4 2/5] hwmon: it87: prepare for extended PWM temp maps Date: Wed, 14 Jan 2026 23:12:07 +0100 Message-ID: <20260114221210.98071-3-yahoo@perenite.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260114221210.98071-1-yahoo@perenite.com> References: <20260114221210.98071-1-yahoo@perenite.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Introduce helper logic for PWM-to-temperature mappings so newer register layouts can be supported without affecting legacy chips. Signed-off-by: benoit.masson --- drivers/hwmon/it87.c | 198 +++++++++++++++++++++++++++++++++---------- 1 file changed, 153 insertions(+), 45 deletions(-) diff --git a/drivers/hwmon/it87.c b/drivers/hwmon/it87.c index b50ba1cd2362..2d4264d05bc2 100644 --- a/drivers/hwmon/it87.c +++ b/drivers/hwmon/it87.c @@ -250,6 +250,7 @@ static const u8 IT87_REG_TEMP_OFFSET[] =3D { 0x56, 0x57= , 0x59 }; #define IT87_REG_FAN_MAIN_CTRL 0x13 #define IT87_REG_FAN_CTL 0x14 static const u8 IT87_REG_PWM[] =3D { 0x15, 0x16, 0x17, 0x7f, 0xa7,= 0xaf }; +static const u8 IT87_REG_PWM_8665[] =3D { 0x15, 0x16, 0x17, 0x1e, 0x1f,= 0x92 }; static const u8 IT87_REG_PWM_DUTY[] =3D { 0x63, 0x6b, 0x73, 0x7b, 0xa3,= 0xab }; =20 static const u8 IT87_REG_VIN[] =3D { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0= x26, @@ -280,6 +281,7 @@ static const u8 IT87_REG_AUTO_BASE[] =3D { 0x60, 0x68, = 0x70, 0x78, 0xa0, 0xa8 }; #define NUM_VIN_LIMIT 8 #define NUM_TEMP 6 #define NUM_TEMP_OFFSET ARRAY_SIZE(IT87_REG_TEMP_OFFSET) +#define IT87_PWM_OLD_NUM_TEMP 3 #define NUM_FAN ARRAY_SIZE(IT87_REG_FAN) #define NUM_FAN_DIV 3 #define NUM_PWM ARRAY_SIZE(IT87_REG_PWM) @@ -289,6 +291,7 @@ struct it87_devices { const char *name; const char * const model; u32 features; + const u8 *reg_pwm; u8 num_temp_limit; u8 num_temp_offset; u8 num_temp_map; @@ -327,6 +330,7 @@ struct it87_devices { #define FEAT_FOUR_PWM BIT(21) /* Supports four fan controls */ #define FEAT_FOUR_TEMP BIT(22) #define FEAT_FANCTL_ONOFF BIT(23) /* chip has FAN_CTL ON/OFF */ +#define FEAT_NEW_TEMPMAP BIT(24) /* PWM uses extended temp map */ =20 static const struct it87_devices it87_devices[] =3D { [it87] =3D { @@ -334,6 +338,7 @@ static const struct it87_devices it87_devices[] =3D { .model =3D "IT87F", .features =3D FEAT_OLD_AUTOPWM | FEAT_FANCTL_ONOFF, /* may need to overwrite */ + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 3, .num_temp_offset =3D 0, .num_temp_map =3D 3, @@ -343,6 +348,7 @@ static const struct it87_devices it87_devices[] =3D { .model =3D "IT8712F", .features =3D FEAT_OLD_AUTOPWM | FEAT_VID | FEAT_FANCTL_ONOFF, /* may need to overwrite */ + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 3, .num_temp_offset =3D 0, .num_temp_map =3D 3, @@ -353,6 +359,7 @@ static const struct it87_devices it87_devices[] =3D { .features =3D FEAT_16BIT_FANS | FEAT_VID | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 3, .num_temp_offset =3D 3, .num_temp_map =3D 3, @@ -363,6 +370,7 @@ static const struct it87_devices it87_devices[] =3D { .features =3D FEAT_16BIT_FANS | FEAT_VID | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 3, .num_temp_offset =3D 3, .num_temp_map =3D 3, @@ -374,6 +382,7 @@ static const struct it87_devices it87_devices[] =3D { .features =3D FEAT_16BIT_FANS | FEAT_VID | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 3, .num_temp_offset =3D 3, .num_temp_map =3D 3, @@ -386,6 +395,7 @@ static const struct it87_devices it87_devices[] =3D { | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 3, .num_temp_offset =3D 3, .num_temp_map =3D 3, @@ -399,6 +409,7 @@ static const struct it87_devices it87_devices[] =3D { | FEAT_TEMP_PECI | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 6, .num_temp_offset =3D 3, .num_temp_map =3D 3, @@ -411,6 +422,7 @@ static const struct it87_devices it87_devices[] =3D { | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FOUR_FANS | FEAT_FOUR_PWM | FEAT_FANCTL_ONOFF, + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 3, .num_temp_offset =3D 3, .num_temp_map =3D 3, @@ -427,6 +439,7 @@ static const struct it87_devices it87_devices[] =3D { /* 12mV ADC (OHM) */ /* 16 bit fans (OHM) */ /* three fans, always 16 bit (guesswork) */ + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 3, .num_temp_offset =3D 3, .num_temp_map =3D 3, @@ -442,6 +455,7 @@ static const struct it87_devices it87_devices[] =3D { /* 12mV ADC (HWSensors4, OHM) */ /* 16 bit fans (HWSensors4, OHM) */ /* three fans, always 16 bit (datasheet) */ + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 3, .num_temp_offset =3D 3, .num_temp_map =3D 3, @@ -453,6 +467,7 @@ static const struct it87_devices it87_devices[] =3D { .features =3D FEAT_16BIT_FANS | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 3, .num_temp_offset =3D 3, .num_temp_map =3D 3, @@ -464,6 +479,7 @@ static const struct it87_devices it87_devices[] =3D { .features =3D FEAT_16BIT_FANS | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 3, .num_temp_offset =3D 3, .num_temp_map =3D 3, @@ -475,6 +491,7 @@ static const struct it87_devices it87_devices[] =3D { .features =3D FEAT_16BIT_FANS | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 3, .num_temp_offset =3D 3, .num_temp_map =3D 3, @@ -486,6 +503,7 @@ static const struct it87_devices it87_devices[] =3D { .features =3D FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 3, .num_temp_offset =3D 3, .num_temp_map =3D 3, @@ -497,6 +515,7 @@ static const struct it87_devices it87_devices[] =3D { .features =3D FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF | FEAT_NOCONF, + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 3, .num_temp_offset =3D 3, .num_temp_map =3D 3, @@ -509,6 +528,7 @@ static const struct it87_devices it87_devices[] =3D { | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FANCTL_ONOFF | FEAT_NOCONF, + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 3, .num_temp_offset =3D 3, .num_temp_map =3D 3, @@ -521,6 +541,7 @@ static const struct it87_devices it87_devices[] =3D { .features =3D FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL | FEAT_AVCC3 | FEAT_PWM_FREQ2, + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 3, .num_temp_offset =3D 3, .num_temp_map =3D 4, @@ -533,6 +554,7 @@ static const struct it87_devices it87_devices[] =3D { | FEAT_TEMP_PECI | FEAT_SIX_FANS | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2 | FEAT_SIX_TEMP | FEAT_VIN3_5V | FEAT_FANCTL_ONOFF, + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 3, .num_temp_offset =3D 3, .num_temp_map =3D 3, @@ -545,6 +567,7 @@ static const struct it87_devices it87_devices[] =3D { | FEAT_TEMP_PECI | FEAT_FIVE_FANS | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_AVCC3 | FEAT_VIN3_5V | FEAT_FOUR_TEMP, + .reg_pwm =3D IT87_REG_PWM_8665, .num_temp_limit =3D 3, .num_temp_offset =3D 3, .num_temp_map =3D 4, @@ -558,6 +581,7 @@ static const struct it87_devices it87_devices[] =3D { | FEAT_TEMP_PECI | FEAT_SIX_FANS | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2 | FEAT_SIX_TEMP | FEAT_VIN3_5V | FEAT_FANCTL_ONOFF, + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 6, .num_temp_offset =3D 3, .num_temp_map =3D 3, @@ -570,6 +594,7 @@ static const struct it87_devices it87_devices[] =3D { | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FANCTL_ONOFF | FEAT_NOCONF, + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 3, .num_temp_offset =3D 3, .num_temp_map =3D 3, @@ -612,6 +637,7 @@ static const struct it87_devices it87_devices[] =3D { #define has_scaling(data) ((data)->features & (FEAT_12MV_ADC | \ FEAT_10_9MV_ADC)) #define has_fanctl_onoff(data) ((data)->features & FEAT_FANCTL_ONOFF) +#define has_new_tempmap(data) ((data)->features & FEAT_NEW_TEMPMAP) =20 struct it87_sio_data { int sioaddr; @@ -641,6 +667,7 @@ struct it87_data { int sioaddr; enum chips type; u32 features; + const u8 *reg_pwm; u8 num_temp_limit; u8 num_temp_offset; u8 num_temp_map; @@ -690,7 +717,9 @@ struct it87_data { u8 has_pwm; /* Bitfield, pwm control enabled */ u8 pwm_ctrl[NUM_PWM]; /* Register value */ u8 pwm_duty[NUM_PWM]; /* Manual PWM value set by user */ - u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */ + u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping */ + u8 pwm_temp_map_mask; + u8 pwm_temp_map_shift; =20 /* Automatic fan speed control registers */ u8 auto_pwm[NUM_AUTO_PWM][4]; /* [nr][3] is hard-coded */ @@ -772,6 +801,71 @@ static int pwm_from_reg(const struct it87_data *data, = u8 reg) return (reg & 0x7f) << 1; } =20 +static inline u8 pwm_temp_map_get(const struct it87_data *data, u8 ctrl) +{ + return (ctrl >> data->pwm_temp_map_shift) & + data->pwm_temp_map_mask; +} + +static inline u8 pwm_temp_map_set(const struct it87_data *data, u8 ctrl, + u8 map) +{ + ctrl &=3D ~(data->pwm_temp_map_mask << data->pwm_temp_map_shift); + return ctrl | ((map & data->pwm_temp_map_mask) + << data->pwm_temp_map_shift); +} + +static inline u8 pwm_num_temp_map(const struct it87_data *data) +{ + return data->num_temp_map; +} + +static unsigned int pwm_temp_channel(const struct it87_data *data, + int nr, u8 map) +{ + if (has_new_tempmap(data)) { + u8 num =3D pwm_num_temp_map(data); + + if (map >=3D num) + map =3D 0; + return map; + } + + if (map >=3D IT87_PWM_OLD_NUM_TEMP) + map =3D 0; + + if (nr >=3D IT87_PWM_OLD_NUM_TEMP) + map +=3D IT87_PWM_OLD_NUM_TEMP; + + return map; +} + +static int pwm_temp_map_from_channel(const struct it87_data *data, int nr, + unsigned int channel, u8 *map) +{ + if (has_new_tempmap(data)) { + u8 num =3D pwm_num_temp_map(data); + + if (channel >=3D num) + return -EINVAL; + *map =3D channel; + return 0; + } + + if (nr >=3D IT87_PWM_OLD_NUM_TEMP) { + if (channel < IT87_PWM_OLD_NUM_TEMP || + channel >=3D 2 * IT87_PWM_OLD_NUM_TEMP) + return -EINVAL; + channel -=3D IT87_PWM_OLD_NUM_TEMP; + } else { + if (channel >=3D IT87_PWM_OLD_NUM_TEMP) + return -EINVAL; + } + + *map =3D channel; + return 0; +} + static int DIV_TO_REG(int val) { int answer =3D 0; @@ -783,6 +877,11 @@ static int DIV_TO_REG(int val) =20 #define DIV_FROM_REG(val) BIT(val) =20 +static inline u16 it87_reg_pwm(const struct it87_data *data, int nr) +{ + return data->reg_pwm[nr]; +} + /* * PWM base frequencies. The frequency has to be divided by either 128 or = 256, * depending on the chip type, to calculate the actual PWM frequency. @@ -863,14 +962,22 @@ static void it87_write_value(struct it87_data *data, = u8 reg, u8 value) =20 static void it87_update_pwm_ctrl(struct it87_data *data, int nr) { - data->pwm_ctrl[nr] =3D it87_read_value(data, IT87_REG_PWM[nr]); + data->pwm_ctrl[nr] =3D it87_read_value(data, it87_reg_pwm(data, nr)); if (has_newer_autopwm(data)) { - data->pwm_temp_map[nr] =3D data->pwm_ctrl[nr] & 0x03; + data->pwm_temp_map[nr] =3D + pwm_temp_map_get(data, data->pwm_ctrl[nr]); + if (has_new_tempmap(data) && + data->pwm_temp_map[nr] >=3D pwm_num_temp_map(data)) + data->pwm_temp_map[nr] =3D 0; data->pwm_duty[nr] =3D it87_read_value(data, IT87_REG_PWM_DUTY[nr]); } else { if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */ - data->pwm_temp_map[nr] =3D data->pwm_ctrl[nr] & 0x03; + data->pwm_temp_map[nr] =3D + pwm_temp_map_get(data, data->pwm_ctrl[nr]); + if (has_new_tempmap(data) && + data->pwm_temp_map[nr] >=3D pwm_num_temp_map(data)) + data->pwm_temp_map[nr] =3D 0; else /* Manual mode */ data->pwm_duty[nr] =3D data->pwm_ctrl[nr] & 0x7f; } @@ -1600,6 +1707,8 @@ static ssize_t set_pwm_enable(struct device *dev, str= uct device_attribute *attr, if (err) return err; =20 + it87_update_pwm_ctrl(data, nr); + if (val =3D=3D 0) { if (nr < 3 && has_fanctl_onoff(data)) { int tmp; @@ -1619,27 +1728,30 @@ static ssize_t set_pwm_enable(struct device *dev, s= truct device_attribute *attr, data->pwm_duty[nr]); /* and set manual mode */ if (has_newer_autopwm(data)) { - ctrl =3D (data->pwm_ctrl[nr] & 0x7c) | - data->pwm_temp_map[nr]; + ctrl =3D pwm_temp_map_set(data, + data->pwm_ctrl[nr] & + ~0x80, + data->pwm_temp_map[nr]); } else { ctrl =3D data->pwm_duty[nr]; } data->pwm_ctrl[nr] =3D ctrl; - it87_write_value(data, IT87_REG_PWM[nr], ctrl); + it87_write_value(data, it87_reg_pwm(data, nr), ctrl); } } else { u8 ctrl; =20 if (has_newer_autopwm(data)) { - ctrl =3D (data->pwm_ctrl[nr] & 0x7c) | - data->pwm_temp_map[nr]; + ctrl =3D pwm_temp_map_set(data, + data->pwm_ctrl[nr] & ~0x80, + data->pwm_temp_map[nr]); if (val !=3D 1) ctrl |=3D 0x80; } else { ctrl =3D (val =3D=3D 1 ? data->pwm_duty[nr] : 0x80); } data->pwm_ctrl[nr] =3D ctrl; - it87_write_value(data, IT87_REG_PWM[nr], ctrl); + it87_write_value(data, it87_reg_pwm(data, nr), ctrl); =20 if (has_fanctl_onoff(data) && nr < 3) { /* set SmartGuardian mode */ @@ -1690,7 +1802,7 @@ static ssize_t set_pwm(struct device *dev, struct dev= ice_attribute *attr, */ if (!(data->pwm_ctrl[nr] & 0x80)) { data->pwm_ctrl[nr] =3D data->pwm_duty[nr]; - it87_write_value(data, IT87_REG_PWM[nr], + it87_write_value(data, it87_reg_pwm(data, nr), data->pwm_ctrl[nr]); } } @@ -1745,20 +1857,14 @@ static ssize_t show_pwm_temp_map(struct device *dev, struct sensor_device_attribute *sensor_attr =3D to_sensor_dev_attr(attr); struct it87_data *data =3D it87_update_device(dev); int nr =3D sensor_attr->index; - u8 num_map; - int map; + unsigned int channel; =20 if (IS_ERR(data)) return PTR_ERR(data); =20 - num_map =3D data->num_temp_map; - map =3D data->pwm_temp_map[nr]; - if (map >=3D num_map) - map =3D 0; /* Should never happen */ - if (nr >=3D num_map) /* pwm channels 3..6 map to temp4..6 */ - map +=3D num_map; + channel =3D pwm_temp_channel(data, nr, data->pwm_temp_map[nr]); =20 - return sprintf(buf, "%d\n", (int)BIT(map)); + return sprintf(buf, "%d\n", (int)BIT(channel)); } =20 static ssize_t set_pwm_temp_map(struct device *dev, @@ -1768,45 +1874,34 @@ static ssize_t set_pwm_temp_map(struct device *dev, struct sensor_device_attribute *sensor_attr =3D to_sensor_dev_attr(attr); struct it87_data *data =3D dev_get_drvdata(dev); int nr =3D sensor_attr->index; - u8 num_map =3D data->num_temp_map; long val; int err; - u8 reg; + unsigned int channel; + u8 map; =20 - if (kstrtol(buf, 10, &val) < 0) + if (kstrtol(buf, 10, &val) < 0 || val <=3D 0 || !is_power_of_2(val)) return -EINVAL; =20 - if (nr >=3D num_map) - val -=3D num_map; - - switch (val) { - case BIT(0): - reg =3D 0x00; - break; - case BIT(1): - reg =3D 0x01; - break; - case BIT(2): - reg =3D 0x02; - break; - default: + channel =3D __ffs(val); + if (pwm_temp_map_from_channel(data, nr, channel, &map)) return -EINVAL; - } =20 err =3D it87_lock(data); if (err) return err; =20 it87_update_pwm_ctrl(data, nr); - data->pwm_temp_map[nr] =3D reg; + data->pwm_temp_map[nr] =3D map; /* * If we are in automatic mode, write the temp mapping immediately; * otherwise, just store it for later use. */ if (data->pwm_ctrl[nr] & 0x80) { - data->pwm_ctrl[nr] =3D (data->pwm_ctrl[nr] & 0xfc) | - data->pwm_temp_map[nr]; - it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]); + data->pwm_ctrl[nr] =3D pwm_temp_map_set(data, + data->pwm_ctrl[nr], + data->pwm_temp_map[nr]); + it87_write_value(data, it87_reg_pwm(data, nr), + data->pwm_ctrl[nr]); } it87_unlock(data); return count; @@ -3357,7 +3452,10 @@ static void it87_init_device(struct platform_device = *pdev) * manual duty cycle. */ for (i =3D 0; i < NUM_AUTO_PWM; i++) { - data->pwm_temp_map[i] =3D i; + if (has_new_tempmap(data)) + data->pwm_temp_map[i] =3D 0; + else + data->pwm_temp_map[i] =3D i % IT87_PWM_OLD_NUM_TEMP; data->pwm_duty[i] =3D 0x7f; /* Full speed */ data->auto_pwm[i][3] =3D 0x7f; /* Full speed, hard-coded */ } @@ -3429,7 +3527,8 @@ static int it87_check_pwm(struct device *dev) =20 for (i =3D 0; i < ARRAY_SIZE(pwm); i++) pwm[i] =3D it87_read_value(data, - IT87_REG_PWM[i]); + it87_reg_pwm(data, + i)); =20 /* * If any fan is in automatic pwm mode, the polarity @@ -3444,7 +3543,8 @@ static int it87_check_pwm(struct device *dev) tmp | 0x87); for (i =3D 0; i < 3; i++) it87_write_value(data, - IT87_REG_PWM[i], + it87_reg_pwm(data, + i), 0x7f & ~pwm[i]); return 1; } @@ -3493,11 +3593,19 @@ static int it87_probe(struct platform_device *pdev) data->ec_special_config =3D sio_data->ec_special_config; chip =3D &it87_devices[sio_data->type]; data->features =3D chip->features; + data->reg_pwm =3D chip->reg_pwm; data->peci_mask =3D chip->peci_mask; data->old_peci_mask =3D chip->old_peci_mask; data->num_temp_limit =3D chip->num_temp_limit; data->num_temp_offset =3D chip->num_temp_offset; data->num_temp_map =3D chip->num_temp_map; + if (has_new_tempmap(data)) { + data->pwm_temp_map_mask =3D 0x07; + data->pwm_temp_map_shift =3D 3; + } else { + data->pwm_temp_map_mask =3D 0x03; + data->pwm_temp_map_shift =3D 0; + } /* * IT8705F Datasheet 0.4.1, 3h =3D=3D Version G. * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h =3D=3D Version J. --=20 2.50.1 (Apple Git-155)