From nobody Sun Feb 8 04:33:43 2026 Received: from mail-wm1-f42.google.com (mail-wm1-f42.google.com [209.85.128.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B4ACE3B52FB for ; Wed, 14 Jan 2026 22:12:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768428749; cv=none; b=GLMeqSfwZ9JCuGCJju3XbMPUFphJ6z2RXy3xBsU2+yv1tZ98WPpdVCIcvck86jvl8rZKIbPjAuiDamguvpxWDNh3yrTLHxriTgnRvUGq0hSG5c/l5s3pqPFGtVkNAmWWjoQ1dm5ilMhgNj75qzBa5wW7rvlO/IzLFYHIN3Nz6mQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768428749; c=relaxed/simple; bh=CZUPwjqpRwAkJ0G0ZvPsL1bCYGkLFpLiebXf66hSzCk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=UUMcQNk/XDxEoi6HPnCBPw4Y4e/T6hJQYY2EiWcJhpI50BnDSjCS5h3iPsK430UlgOnKz3txxNio0yACTY2G84zKe7HcQR73MA8BWgiu+3Ku6sE2gEXQp5TKzNToXeGps+XFmpaNXrYeCC+5fYH5HFzWiQxGlcd2wn8CSjgQghQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=perenite.com; spf=pass smtp.mailfrom=perenite.com; dkim=pass (2048-bit key) header.d=perenite-com.20230601.gappssmtp.com header.i=@perenite-com.20230601.gappssmtp.com header.b=waw0AWzb; arc=none smtp.client-ip=209.85.128.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=perenite.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=perenite.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=perenite-com.20230601.gappssmtp.com header.i=@perenite-com.20230601.gappssmtp.com header.b="waw0AWzb" Received: by mail-wm1-f42.google.com with SMTP id 5b1f17b1804b1-477ba2c1ca2so3549675e9.2 for ; Wed, 14 Jan 2026 14:12:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=perenite-com.20230601.gappssmtp.com; s=20230601; t=1768428735; x=1769033535; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=eYVrDxAFik9ZlMUAZjSOaSsJUzl9iKpSUm/XmRoX4Ic=; b=waw0AWzbjzK4Mf0cb5axGLzTyMJ+fcrARLe2Xi/f7ZJpHYfru1eRLjseWa6DhpfIv0 fNnjBq7oQLrkqW2+Exo/ZJLZme//VFWBelEcuYBPRYBm+q/rY9dA+n0iK8MdKOUZjzfT vGTHRhrXmWN+ubJ/6YjoL0a6n7lIVJ2WDyf8nn1/BJXgn2AXolc1SIZJ6QnXfiCHSpqg z7eBeKdi9p51PJ8DyKSWSbvwb11sEXkkeYk0rQmsJbdIM4ymWlSESSV74BpfKMRohAjK fMCsOyQ5dtkWfog8QKVL81oBKjRHTt/swUHIvGDsgQ/VRXPkqPbvno6jg6z5YiLDy1Ad XX1Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1768428735; x=1769033535; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=eYVrDxAFik9ZlMUAZjSOaSsJUzl9iKpSUm/XmRoX4Ic=; b=RKnpO/xFb/w8Ifg0hbaGUsA2T+49+tQU+L21HdiszNm5RdYZbvlFhBCJRHXQfPjCiR v7qqSoA1ZNqB46hQV6i1KD+4zcrlpwB0m8J/R+5qSmGcbm/GBqaIXuOMK579xS7s0zhj 5lHpsCib7e3oPCTfo/gUhPYZvYzSsYg8Mlja9wQC/B1LblA7/bEXsaGkSa4WFECydHQV jqGMDS9GjHmhk04NhjDtD62SpfZoKcIWKRayQx74lBBUIp7KQVWeZSvfsbwkCBxkhC3v w5fASv9gMRoLFxva90PCwK4U/gp6UeJSm3aunuDRO4PFh76BMHGG5Cjo4TRQT2XUzQgm /Fcg== X-Forwarded-Encrypted: i=1; AJvYcCVMCLnqKys8OM6oNZehAcsuGkGmTcSTiVKSIttNCEXhFgdF9OyEZxT1GQzdBpBu1zVeI7wCAqlsRDJ+fAY=@vger.kernel.org X-Gm-Message-State: AOJu0YwMLmucw4Tu2bqIRVo40ePzmvKW9/XWvyGb2yiwekl7Mei5TqeO rvUJe7b+hislRI1IuQXL/kLQcz6Wr3HZI11pUATzE6Mke500SmjSQnW7a67etJpDIQ== X-Gm-Gg: AY/fxX4f4ahd32TuVXjvwt6+rycWQ0MOiRaW5OwuTEqkpa/ztVrmtwvQADF6vTcALwW ZqAUR1Yp/IemlRrN3ahONIEzI9ZfhbBo6YMJ+poAGykTaBmGSlyUuzsoTjWGQusw+7KiHQbrA9f aCgiLOo0SeEKbenABVOZ6b0rS5WPOYM7eQx4Vr1TnrSKD+H52/ELjR0618QjqMHnnV+fiOHcTB4 eUGWunjGClh5Xr7An4PVqB2m5t+0YyVIzU62Dx5Fi+2HDKeKLs6SB4ZuGfMdptGKEQAvdcS1LXj /iRMTrc8NtLJa6I2dXLVlW1NgyDCbqDUz4by03H7aGVKNoD9dAl95pGXZ+vEO1fSzDG0GGG0acA GgLY9D0SpiwFPQXSfk6OtystdgsV9zxiLRi3kfSaZvVj9gKV/TLCIo9Gy7/cKzM6X0ZxGlO0gke VBO4CZEX1zkEjP91bAawWnv4z2U6tOWFu1zbUOQDWevpAC9oYpl7WiKVlUjqbiNtMpAkr8AAic4 cQJzpYKrz9GcvA24w== X-Received: by 2002:a05:600c:3ba4:b0:477:9574:d641 with SMTP id 5b1f17b1804b1-47ee334f7b8mr53242725e9.22.1768428734465; Wed, 14 Jan 2026 14:12:14 -0800 (PST) Received: from localhost.localdomain (217-128-226-200.ftth.fr.orangecustomers.net. [217.128.226.200]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-47f941a670dsm3098195e9.5.2026.01.14.14.12.13 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 14 Jan 2026 14:12:13 -0800 (PST) From: "benoit.masson" To: Jean Delvare , Guenter Roeck Cc: linux-hwmon@vger.kernel.org, linux-kernel@vger.kernel.org, Jonathan Corbet , linux-doc@vger.kernel.org, "benoit.masson" Subject: [PATCH v4 1/5] hwmon: it87: describe per-chip temperature resources Date: Wed, 14 Jan 2026 23:12:06 +0100 Message-ID: <20260114221210.98071-2-yahoo@perenite.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260114221210.98071-1-yahoo@perenite.com> References: <20260114221210.98071-1-yahoo@perenite.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add per-chip temp limit/offset/map counts and wire the driver to use them. This keeps existing chips on the previous defaults while allowing newer chips to advertise larger resources. Signed-off-by: benoit.masson --- drivers/hwmon/it87.c | 144 ++++++++++++++++++++++++++++++++----------- 1 file changed, 109 insertions(+), 35 deletions(-) diff --git a/drivers/hwmon/it87.c b/drivers/hwmon/it87.c index e233aafa8856..b50ba1cd2362 100644 --- a/drivers/hwmon/it87.c +++ b/drivers/hwmon/it87.c @@ -280,7 +280,6 @@ static const u8 IT87_REG_AUTO_BASE[] =3D { 0x60, 0x68, = 0x70, 0x78, 0xa0, 0xa8 }; #define NUM_VIN_LIMIT 8 #define NUM_TEMP 6 #define NUM_TEMP_OFFSET ARRAY_SIZE(IT87_REG_TEMP_OFFSET) -#define NUM_TEMP_LIMIT 3 #define NUM_FAN ARRAY_SIZE(IT87_REG_FAN) #define NUM_FAN_DIV 3 #define NUM_PWM ARRAY_SIZE(IT87_REG_PWM) @@ -290,6 +289,9 @@ struct it87_devices { const char *name; const char * const model; u32 features; + u8 num_temp_limit; + u8 num_temp_offset; + u8 num_temp_map; u8 peci_mask; u8 old_peci_mask; u8 smbus_bitmap; /* SMBus enable bits in extra config register */ @@ -300,7 +302,6 @@ struct it87_devices { #define FEAT_NEWER_AUTOPWM BIT(1) #define FEAT_OLD_AUTOPWM BIT(2) #define FEAT_16BIT_FANS BIT(3) -#define FEAT_TEMP_OFFSET BIT(4) #define FEAT_TEMP_PECI BIT(5) #define FEAT_TEMP_OLD_PECI BIT(6) #define FEAT_FAN16_CONFIG BIT(7) /* Need to enable 16-bit fans */ @@ -333,43 +334,61 @@ static const struct it87_devices it87_devices[] =3D { .model =3D "IT87F", .features =3D FEAT_OLD_AUTOPWM | FEAT_FANCTL_ONOFF, /* may need to overwrite */ + .num_temp_limit =3D 3, + .num_temp_offset =3D 0, + .num_temp_map =3D 3, }, [it8712] =3D { .name =3D "it8712", .model =3D "IT8712F", .features =3D FEAT_OLD_AUTOPWM | FEAT_VID | FEAT_FANCTL_ONOFF, /* may need to overwrite */ + .num_temp_limit =3D 3, + .num_temp_offset =3D 0, + .num_temp_map =3D 3, }, [it8716] =3D { .name =3D "it8716", .model =3D "IT8716F", - .features =3D FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID + .features =3D FEAT_16BIT_FANS | FEAT_VID | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, + .num_temp_limit =3D 3, + .num_temp_offset =3D 3, + .num_temp_map =3D 3, }, [it8718] =3D { .name =3D "it8718", .model =3D "IT8718F", - .features =3D FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID + .features =3D FEAT_16BIT_FANS | FEAT_VID | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, + .num_temp_limit =3D 3, + .num_temp_offset =3D 3, + .num_temp_map =3D 3, .old_peci_mask =3D 0x4, }, [it8720] =3D { .name =3D "it8720", .model =3D "IT8720F", - .features =3D FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID + .features =3D FEAT_16BIT_FANS | FEAT_VID | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, + .num_temp_limit =3D 3, + .num_temp_offset =3D 3, + .num_temp_map =3D 3, .old_peci_mask =3D 0x4, }, [it8721] =3D { .name =3D "it8721", .model =3D "IT8721F", .features =3D FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI + | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, + .num_temp_limit =3D 3, + .num_temp_offset =3D 3, + .num_temp_map =3D 3, .peci_mask =3D 0x05, .old_peci_mask =3D 0x02, /* Actually reports PCH */ }, @@ -377,18 +396,24 @@ static const struct it87_devices it87_devices[] =3D { .name =3D "it8728", .model =3D "IT8728F", .features =3D FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS + | FEAT_TEMP_PECI | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, + .num_temp_limit =3D 6, + .num_temp_offset =3D 3, + .num_temp_map =3D 3, .peci_mask =3D 0x07, }, [it8732] =3D { .name =3D "it8732", .model =3D "IT8732F", .features =3D FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI + | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FOUR_FANS | FEAT_FOUR_PWM | FEAT_FANCTL_ONOFF, + .num_temp_limit =3D 3, + .num_temp_offset =3D 3, + .num_temp_map =3D 3, .peci_mask =3D 0x07, .old_peci_mask =3D 0x02, /* Actually reports PCH */ }, @@ -396,73 +421,97 @@ static const struct it87_devices it87_devices[] =3D { .name =3D "it8771", .model =3D "IT8771E", .features =3D FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL + | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, /* PECI: guesswork */ /* 12mV ADC (OHM) */ /* 16 bit fans (OHM) */ /* three fans, always 16 bit (guesswork) */ + .num_temp_limit =3D 3, + .num_temp_offset =3D 3, + .num_temp_map =3D 3, .peci_mask =3D 0x07, }, [it8772] =3D { .name =3D "it8772", .model =3D "IT8772E", .features =3D FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL + | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, /* PECI (coreboot) */ /* 12mV ADC (HWSensors4, OHM) */ /* 16 bit fans (HWSensors4, OHM) */ /* three fans, always 16 bit (datasheet) */ + .num_temp_limit =3D 3, + .num_temp_offset =3D 3, + .num_temp_map =3D 3, .peci_mask =3D 0x07, }, [it8781] =3D { .name =3D "it8781", .model =3D "IT8781F", - .features =3D FEAT_16BIT_FANS | FEAT_TEMP_OFFSET + .features =3D FEAT_16BIT_FANS | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, + .num_temp_limit =3D 3, + .num_temp_offset =3D 3, + .num_temp_map =3D 3, .old_peci_mask =3D 0x4, }, [it8782] =3D { .name =3D "it8782", .model =3D "IT8782F", - .features =3D FEAT_16BIT_FANS | FEAT_TEMP_OFFSET + .features =3D FEAT_16BIT_FANS | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, + .num_temp_limit =3D 3, + .num_temp_offset =3D 3, + .num_temp_map =3D 3, .old_peci_mask =3D 0x4, }, [it8783] =3D { .name =3D "it8783", .model =3D "IT8783E/F", - .features =3D FEAT_16BIT_FANS | FEAT_TEMP_OFFSET + .features =3D FEAT_16BIT_FANS | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, + .num_temp_limit =3D 3, + .num_temp_offset =3D 3, + .num_temp_map =3D 3, .old_peci_mask =3D 0x4, }, [it8786] =3D { .name =3D "it8786", .model =3D "IT8786E", .features =3D FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL + | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, + .num_temp_limit =3D 3, + .num_temp_offset =3D 3, + .num_temp_map =3D 3, .peci_mask =3D 0x07, }, [it8790] =3D { .name =3D "it8790", .model =3D "IT8790E", .features =3D FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL + | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF | FEAT_NOCONF, + .num_temp_limit =3D 3, + .num_temp_offset =3D 3, + .num_temp_map =3D 3, .peci_mask =3D 0x07, }, [it8792] =3D { .name =3D "it8792", .model =3D "IT8792E/IT8795E", .features =3D FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI + | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FANCTL_ONOFF | FEAT_NOCONF, + .num_temp_limit =3D 3, + .num_temp_offset =3D 3, + .num_temp_map =3D 3, .peci_mask =3D 0x07, .old_peci_mask =3D 0x02, /* Actually reports PCH */ }, @@ -470,45 +519,60 @@ static const struct it87_devices it87_devices[] =3D { .name =3D "it8603", .model =3D "IT8603E", .features =3D FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL + | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL | FEAT_AVCC3 | FEAT_PWM_FREQ2, + .num_temp_limit =3D 3, + .num_temp_offset =3D 3, + .num_temp_map =3D 4, .peci_mask =3D 0x07, }, [it8620] =3D { .name =3D "it8620", .model =3D "IT8620E", .features =3D FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS + | FEAT_TEMP_PECI | FEAT_SIX_FANS | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2 | FEAT_SIX_TEMP | FEAT_VIN3_5V | FEAT_FANCTL_ONOFF, + .num_temp_limit =3D 3, + .num_temp_offset =3D 3, + .num_temp_map =3D 3, .peci_mask =3D 0x07, }, [it8622] =3D { .name =3D "it8622", .model =3D "IT8622E", .features =3D FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS + | FEAT_TEMP_PECI | FEAT_FIVE_FANS | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_AVCC3 | FEAT_VIN3_5V | FEAT_FOUR_TEMP, - .peci_mask =3D 0x07, + .num_temp_limit =3D 3, + .num_temp_offset =3D 3, + .num_temp_map =3D 4, + .peci_mask =3D 0x0f, .smbus_bitmap =3D BIT(1) | BIT(2), }, [it8628] =3D { .name =3D "it8628", .model =3D "IT8628E", .features =3D FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS + | FEAT_TEMP_PECI | FEAT_SIX_FANS | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2 | FEAT_SIX_TEMP | FEAT_VIN3_5V | FEAT_FANCTL_ONOFF, + .num_temp_limit =3D 6, + .num_temp_offset =3D 3, + .num_temp_map =3D 3, .peci_mask =3D 0x07, }, [it87952] =3D { .name =3D "it87952", .model =3D "IT87952E", .features =3D FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS - | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI + | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FANCTL_ONOFF | FEAT_NOCONF, + .num_temp_limit =3D 3, + .num_temp_offset =3D 3, + .num_temp_map =3D 3, .peci_mask =3D 0x07, .old_peci_mask =3D 0x02, /* Actually reports PCH */ }, @@ -519,7 +583,6 @@ static const struct it87_devices it87_devices[] =3D { #define has_10_9mv_adc(data) ((data)->features & FEAT_10_9MV_ADC) #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM) #define has_old_autopwm(data) ((data)->features & FEAT_OLD_AUTOPWM) -#define has_temp_offset(data) ((data)->features & FEAT_TEMP_OFFSET) #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \ ((data)->peci_mask & BIT(nr))) #define has_temp_old_peci(data, nr) \ @@ -578,6 +641,9 @@ struct it87_data { int sioaddr; enum chips type; u32 features; + u8 num_temp_limit; + u8 num_temp_offset; + u8 num_temp_map; u8 peci_mask; u8 old_peci_mask; =20 @@ -926,12 +992,12 @@ static struct it87_data *it87_update_device(struct de= vice *dev) data->temp[i][0] =3D it87_read_value(data, IT87_REG_TEMP(i)); =20 - if (has_temp_offset(data) && i < NUM_TEMP_OFFSET) + if (i < data->num_temp_offset) data->temp[i][3] =3D it87_read_value(data, IT87_REG_TEMP_OFFSET[i]); =20 - if (i >=3D NUM_TEMP_LIMIT) + if (i >=3D data->num_temp_limit) continue; =20 data->temp[i][1] =3D @@ -1679,16 +1745,18 @@ static ssize_t show_pwm_temp_map(struct device *dev, struct sensor_device_attribute *sensor_attr =3D to_sensor_dev_attr(attr); struct it87_data *data =3D it87_update_device(dev); int nr =3D sensor_attr->index; + u8 num_map; int map; =20 if (IS_ERR(data)) return PTR_ERR(data); =20 + num_map =3D data->num_temp_map; map =3D data->pwm_temp_map[nr]; - if (map >=3D 3) + if (map >=3D num_map) map =3D 0; /* Should never happen */ - if (nr >=3D 3) /* pwm channels 3..6 map to temp4..6 */ - map +=3D 3; + if (nr >=3D num_map) /* pwm channels 3..6 map to temp4..6 */ + map +=3D num_map; =20 return sprintf(buf, "%d\n", (int)BIT(map)); } @@ -1700,6 +1768,7 @@ static ssize_t set_pwm_temp_map(struct device *dev, struct sensor_device_attribute *sensor_attr =3D to_sensor_dev_attr(attr); struct it87_data *data =3D dev_get_drvdata(dev); int nr =3D sensor_attr->index; + u8 num_map =3D data->num_temp_map; long val; int err; u8 reg; @@ -1707,8 +1776,8 @@ static ssize_t set_pwm_temp_map(struct device *dev, if (kstrtol(buf, 10, &val) < 0) return -EINVAL; =20 - if (nr >=3D 3) - val -=3D 3; + if (nr >=3D num_map) + val -=3D num_map; =20 switch (val) { case BIT(0): @@ -2362,7 +2431,7 @@ static umode_t it87_temp_is_visible(struct kobject *k= obj, return attr->mode; } =20 - if (a =3D=3D 5 && !has_temp_offset(data)) + if (a =3D=3D 5 && i >=3D data->num_temp_offset) return 0; =20 if (a =3D=3D 6 && !data->has_beep) @@ -3206,7 +3275,7 @@ static void it87_check_limit_regs(struct it87_data *d= ata) if (reg =3D=3D 0xff) it87_write_value(data, IT87_REG_VIN_MIN(i), 0); } - for (i =3D 0; i < NUM_TEMP_LIMIT; i++) { + for (i =3D 0; i < data->num_temp_limit; i++) { reg =3D it87_read_value(data, IT87_REG_TEMP_HIGH(i)); if (reg =3D=3D 0xff) it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127); @@ -3399,6 +3468,7 @@ static int it87_probe(struct platform_device *pdev) struct resource *res; struct device *dev =3D &pdev->dev; struct it87_sio_data *sio_data =3D dev_get_platdata(dev); + const struct it87_devices *chip; int enable_pwm_interface; struct device *hwmon_dev; int err; @@ -3421,9 +3491,13 @@ static int it87_probe(struct platform_device *pdev) data->type =3D sio_data->type; data->smbus_bitmap =3D sio_data->smbus_bitmap; data->ec_special_config =3D sio_data->ec_special_config; - data->features =3D it87_devices[sio_data->type].features; - data->peci_mask =3D it87_devices[sio_data->type].peci_mask; - data->old_peci_mask =3D it87_devices[sio_data->type].old_peci_mask; + chip =3D &it87_devices[sio_data->type]; + data->features =3D chip->features; + data->peci_mask =3D chip->peci_mask; + data->old_peci_mask =3D chip->old_peci_mask; + data->num_temp_limit =3D chip->num_temp_limit; + data->num_temp_offset =3D chip->num_temp_offset; + data->num_temp_map =3D chip->num_temp_map; /* * IT8705F Datasheet 0.4.1, 3h =3D=3D Version G. * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h =3D=3D Version J. --=20 2.50.1 (Apple Git-155) From nobody Sun Feb 8 04:33:43 2026 Received: from mail-wm1-f50.google.com (mail-wm1-f50.google.com [209.85.128.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 63BB1358D1B for ; Wed, 14 Jan 2026 22:12:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768428750; cv=none; b=YSAF0jMexhWqNztYGD+qO9FLAfmfN0WzOd/pLkwadLLC5STU2bPkl8Yrt/UdTd0Gwnb36Jsrdbg5MfNf1hE+hGXqPmWzYrsDLWk74eFfRBs+57X5FgzfhWIOx9fOyM+JZGFE+Z5lj62sX/PENnDMKgyFSwKaRNKZqgkL3ph5les= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768428750; c=relaxed/simple; bh=srQNe1bdxPtarkPHtN+SaizPLzfJBPNYBGeND/TdZ3k=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=GstknZxzhxs7Z2QIwhM22PLGS3kk+oh4m9TWMe70YGSmGWf5ujyvrpJRS24Ecg0AmC6lgtW/oJ/5UJWHaoeCzqDtqD36eAj6ohjNJ1bTkdMgO8K7bygGg8b2Rrok7gBha0u8c4lwHBCexrdaVQGlOaKc6raDjyY/gbpzaMuBiiY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=perenite.com; spf=pass smtp.mailfrom=perenite.com; dkim=pass (2048-bit key) header.d=perenite-com.20230601.gappssmtp.com header.i=@perenite-com.20230601.gappssmtp.com header.b=u6Bo2sCh; arc=none smtp.client-ip=209.85.128.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=perenite.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=perenite.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=perenite-com.20230601.gappssmtp.com header.i=@perenite-com.20230601.gappssmtp.com header.b="u6Bo2sCh" Received: by mail-wm1-f50.google.com with SMTP id 5b1f17b1804b1-47f5c2283b6so1618235e9.1 for ; Wed, 14 Jan 2026 14:12:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=perenite-com.20230601.gappssmtp.com; s=20230601; t=1768428736; x=1769033536; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=V9n/8zfCD6P7G2M5f9LemgItBkNY+iI9RuUXt9g5qnc=; b=u6Bo2sChlcDG1mezipCfYiUHxUghIfHERYt/pEWX4a6QmpNdv7bLz3PnWZcxSHsAl/ mPPH9qXt3MoayNBbPB8ISz5zu8GZLX/CbsI8JvECp6aoheZxVlHPeGmCOwrE90DeVz2c 2p3LFA/UEN6/c5XOujzazNRJiyOUTFuAR/4GPYmjczA2WJDSyiedhbi+alXZt7Xb2UVV fgdGY2dVmYa82sGKtHWKFynDhvxFP3DaN6Ri6bRy1D9bdKqzXyevZh8CCQWc+zFcph+U KZZCh2EfNWDmbTwkrQJP7Y2T5B8CKb3ogTQQyuJdDPywTQB0EMI3mQBh2pyMflviykdn odkQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1768428736; x=1769033536; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=V9n/8zfCD6P7G2M5f9LemgItBkNY+iI9RuUXt9g5qnc=; b=Hm8k6yPizIucL9v6qTqK6LTjoTWNMYJtJYV9qWBeUAQd4gIQVbuohgUJ+RZQLLuGNt KzRaykWq79B3dTaTxUni9ZvSGh+vjx1htj+fe8RmLDTleaYIXDIhDAMdMHuKii2NKf1K 9PPLK14QdinsthbkFLt6XWSIY++FkLG9yk5DQTrC5R0+udz5mVzKA1i8H4tnMkP1rqTJ jOi6m6OEkKIIf00D+B6K/deAXjXkcZNl4qk23jRcWfFqC0uAg9jMZpBWFPrILaSIV/lB p+wqegQReNSMiTTkNVfTO/+3ggowiePHjgWfvAu/U3+95C8yk4SDP37+1V5avgs8JRJw LB2Q== X-Forwarded-Encrypted: i=1; AJvYcCW7nIgjEdBKcfAQBN+zf3RcK/fmDIHAdzhm5H3otwvurFuoeUbd0UlteepKyg+Y7raBADx3vGYijfFrp9Y=@vger.kernel.org X-Gm-Message-State: AOJu0Yzia5GnhjT30TBU8SPM7hY7Qd1AjyGwTXrJaapWcCX13veYomum RbcDMgSnqr6+ZQP9xzl2vMpfsO2ylYmWlB29LXu8VacvrEaWX3ZQxgCZkH3MBJASjg== X-Gm-Gg: AY/fxX5BpJYd64dZqG4RyKReDP+/wL8MSJ4NuCS4MoRxDUjbxyAcJvMmfG4xYHI1TUe +1INxO/7iGAR7ncO931hQmZ6IeU7FmOOvmYxBBb0wrO9MYF6fC3TdGG+fVebfB0Iw7rJBYfSlr7 QLfO/wRKFlekT2otO38cTmC9ti42SJJaHcmtW5V9rYoq5APH2NTpqwlCxoTdp8N+dyZg3FQw7LL +r6zd4I/KSZRKj1dytaK72i46wTbfJk8agdDnGUZdN1zYK4e5cX7XnbgJ2K8ogxPhVYIfVeF2EI yVnAPx7FfMqX/w/DXOivaBVw87tecoi/BQG4g8zrgYHn+4fMYEIkLHtQSLA9R8KtF1cE0597b6f X3vOIy5SJ30D8O+fDvikT2+9Tp77OA6lwbf/NV8rjMeJPRp8ChU5tYnnrc4HxXSIKMaaunTRRaX L5HUJ08PFsYsMGzmJvhfON350B7ALPSrSeeBdkxVWsfaVoghh0ylgBuRPtIYMu6YCsa4PXKlMIA 46eE7I9HHb5/W/xgA== X-Received: by 2002:a05:600c:1c15:b0:47d:3ead:7439 with SMTP id 5b1f17b1804b1-47ee339e454mr43477545e9.37.1768428735785; Wed, 14 Jan 2026 14:12:15 -0800 (PST) Received: from localhost.localdomain (217-128-226-200.ftth.fr.orangecustomers.net. [217.128.226.200]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-47f941a670dsm3098195e9.5.2026.01.14.14.12.14 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 14 Jan 2026 14:12:15 -0800 (PST) From: "benoit.masson" To: Jean Delvare , Guenter Roeck Cc: linux-hwmon@vger.kernel.org, linux-kernel@vger.kernel.org, Jonathan Corbet , linux-doc@vger.kernel.org, "benoit.masson" Subject: [PATCH v4 2/5] hwmon: it87: prepare for extended PWM temp maps Date: Wed, 14 Jan 2026 23:12:07 +0100 Message-ID: <20260114221210.98071-3-yahoo@perenite.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260114221210.98071-1-yahoo@perenite.com> References: <20260114221210.98071-1-yahoo@perenite.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Introduce helper logic for PWM-to-temperature mappings so newer register layouts can be supported without affecting legacy chips. Signed-off-by: benoit.masson --- drivers/hwmon/it87.c | 198 +++++++++++++++++++++++++++++++++---------- 1 file changed, 153 insertions(+), 45 deletions(-) diff --git a/drivers/hwmon/it87.c b/drivers/hwmon/it87.c index b50ba1cd2362..2d4264d05bc2 100644 --- a/drivers/hwmon/it87.c +++ b/drivers/hwmon/it87.c @@ -250,6 +250,7 @@ static const u8 IT87_REG_TEMP_OFFSET[] =3D { 0x56, 0x57= , 0x59 }; #define IT87_REG_FAN_MAIN_CTRL 0x13 #define IT87_REG_FAN_CTL 0x14 static const u8 IT87_REG_PWM[] =3D { 0x15, 0x16, 0x17, 0x7f, 0xa7,= 0xaf }; +static const u8 IT87_REG_PWM_8665[] =3D { 0x15, 0x16, 0x17, 0x1e, 0x1f,= 0x92 }; static const u8 IT87_REG_PWM_DUTY[] =3D { 0x63, 0x6b, 0x73, 0x7b, 0xa3,= 0xab }; =20 static const u8 IT87_REG_VIN[] =3D { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0= x26, @@ -280,6 +281,7 @@ static const u8 IT87_REG_AUTO_BASE[] =3D { 0x60, 0x68, = 0x70, 0x78, 0xa0, 0xa8 }; #define NUM_VIN_LIMIT 8 #define NUM_TEMP 6 #define NUM_TEMP_OFFSET ARRAY_SIZE(IT87_REG_TEMP_OFFSET) +#define IT87_PWM_OLD_NUM_TEMP 3 #define NUM_FAN ARRAY_SIZE(IT87_REG_FAN) #define NUM_FAN_DIV 3 #define NUM_PWM ARRAY_SIZE(IT87_REG_PWM) @@ -289,6 +291,7 @@ struct it87_devices { const char *name; const char * const model; u32 features; + const u8 *reg_pwm; u8 num_temp_limit; u8 num_temp_offset; u8 num_temp_map; @@ -327,6 +330,7 @@ struct it87_devices { #define FEAT_FOUR_PWM BIT(21) /* Supports four fan controls */ #define FEAT_FOUR_TEMP BIT(22) #define FEAT_FANCTL_ONOFF BIT(23) /* chip has FAN_CTL ON/OFF */ +#define FEAT_NEW_TEMPMAP BIT(24) /* PWM uses extended temp map */ =20 static const struct it87_devices it87_devices[] =3D { [it87] =3D { @@ -334,6 +338,7 @@ static const struct it87_devices it87_devices[] =3D { .model =3D "IT87F", .features =3D FEAT_OLD_AUTOPWM | FEAT_FANCTL_ONOFF, /* may need to overwrite */ + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 3, .num_temp_offset =3D 0, .num_temp_map =3D 3, @@ -343,6 +348,7 @@ static const struct it87_devices it87_devices[] =3D { .model =3D "IT8712F", .features =3D FEAT_OLD_AUTOPWM | FEAT_VID | FEAT_FANCTL_ONOFF, /* may need to overwrite */ + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 3, .num_temp_offset =3D 0, .num_temp_map =3D 3, @@ -353,6 +359,7 @@ static const struct it87_devices it87_devices[] =3D { .features =3D FEAT_16BIT_FANS | FEAT_VID | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 3, .num_temp_offset =3D 3, .num_temp_map =3D 3, @@ -363,6 +370,7 @@ static const struct it87_devices it87_devices[] =3D { .features =3D FEAT_16BIT_FANS | FEAT_VID | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 3, .num_temp_offset =3D 3, .num_temp_map =3D 3, @@ -374,6 +382,7 @@ static const struct it87_devices it87_devices[] =3D { .features =3D FEAT_16BIT_FANS | FEAT_VID | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 3, .num_temp_offset =3D 3, .num_temp_map =3D 3, @@ -386,6 +395,7 @@ static const struct it87_devices it87_devices[] =3D { | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 3, .num_temp_offset =3D 3, .num_temp_map =3D 3, @@ -399,6 +409,7 @@ static const struct it87_devices it87_devices[] =3D { | FEAT_TEMP_PECI | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 6, .num_temp_offset =3D 3, .num_temp_map =3D 3, @@ -411,6 +422,7 @@ static const struct it87_devices it87_devices[] =3D { | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FOUR_FANS | FEAT_FOUR_PWM | FEAT_FANCTL_ONOFF, + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 3, .num_temp_offset =3D 3, .num_temp_map =3D 3, @@ -427,6 +439,7 @@ static const struct it87_devices it87_devices[] =3D { /* 12mV ADC (OHM) */ /* 16 bit fans (OHM) */ /* three fans, always 16 bit (guesswork) */ + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 3, .num_temp_offset =3D 3, .num_temp_map =3D 3, @@ -442,6 +455,7 @@ static const struct it87_devices it87_devices[] =3D { /* 12mV ADC (HWSensors4, OHM) */ /* 16 bit fans (HWSensors4, OHM) */ /* three fans, always 16 bit (datasheet) */ + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 3, .num_temp_offset =3D 3, .num_temp_map =3D 3, @@ -453,6 +467,7 @@ static const struct it87_devices it87_devices[] =3D { .features =3D FEAT_16BIT_FANS | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 3, .num_temp_offset =3D 3, .num_temp_map =3D 3, @@ -464,6 +479,7 @@ static const struct it87_devices it87_devices[] =3D { .features =3D FEAT_16BIT_FANS | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 3, .num_temp_offset =3D 3, .num_temp_map =3D 3, @@ -475,6 +491,7 @@ static const struct it87_devices it87_devices[] =3D { .features =3D FEAT_16BIT_FANS | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 3, .num_temp_offset =3D 3, .num_temp_map =3D 3, @@ -486,6 +503,7 @@ static const struct it87_devices it87_devices[] =3D { .features =3D FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF, + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 3, .num_temp_offset =3D 3, .num_temp_map =3D 3, @@ -497,6 +515,7 @@ static const struct it87_devices it87_devices[] =3D { .features =3D FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_FANCTL_ONOFF | FEAT_NOCONF, + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 3, .num_temp_offset =3D 3, .num_temp_map =3D 3, @@ -509,6 +528,7 @@ static const struct it87_devices it87_devices[] =3D { | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FANCTL_ONOFF | FEAT_NOCONF, + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 3, .num_temp_offset =3D 3, .num_temp_map =3D 3, @@ -521,6 +541,7 @@ static const struct it87_devices it87_devices[] =3D { .features =3D FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL | FEAT_AVCC3 | FEAT_PWM_FREQ2, + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 3, .num_temp_offset =3D 3, .num_temp_map =3D 4, @@ -533,6 +554,7 @@ static const struct it87_devices it87_devices[] =3D { | FEAT_TEMP_PECI | FEAT_SIX_FANS | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2 | FEAT_SIX_TEMP | FEAT_VIN3_5V | FEAT_FANCTL_ONOFF, + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 3, .num_temp_offset =3D 3, .num_temp_map =3D 3, @@ -545,6 +567,7 @@ static const struct it87_devices it87_devices[] =3D { | FEAT_TEMP_PECI | FEAT_FIVE_FANS | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 | FEAT_AVCC3 | FEAT_VIN3_5V | FEAT_FOUR_TEMP, + .reg_pwm =3D IT87_REG_PWM_8665, .num_temp_limit =3D 3, .num_temp_offset =3D 3, .num_temp_map =3D 4, @@ -558,6 +581,7 @@ static const struct it87_devices it87_devices[] =3D { | FEAT_TEMP_PECI | FEAT_SIX_FANS | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2 | FEAT_SIX_TEMP | FEAT_VIN3_5V | FEAT_FANCTL_ONOFF, + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 6, .num_temp_offset =3D 3, .num_temp_map =3D 3, @@ -570,6 +594,7 @@ static const struct it87_devices it87_devices[] =3D { | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_FANCTL_ONOFF | FEAT_NOCONF, + .reg_pwm =3D IT87_REG_PWM, .num_temp_limit =3D 3, .num_temp_offset =3D 3, .num_temp_map =3D 3, @@ -612,6 +637,7 @@ static const struct it87_devices it87_devices[] =3D { #define has_scaling(data) ((data)->features & (FEAT_12MV_ADC | \ FEAT_10_9MV_ADC)) #define has_fanctl_onoff(data) ((data)->features & FEAT_FANCTL_ONOFF) +#define has_new_tempmap(data) ((data)->features & FEAT_NEW_TEMPMAP) =20 struct it87_sio_data { int sioaddr; @@ -641,6 +667,7 @@ struct it87_data { int sioaddr; enum chips type; u32 features; + const u8 *reg_pwm; u8 num_temp_limit; u8 num_temp_offset; u8 num_temp_map; @@ -690,7 +717,9 @@ struct it87_data { u8 has_pwm; /* Bitfield, pwm control enabled */ u8 pwm_ctrl[NUM_PWM]; /* Register value */ u8 pwm_duty[NUM_PWM]; /* Manual PWM value set by user */ - u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */ + u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping */ + u8 pwm_temp_map_mask; + u8 pwm_temp_map_shift; =20 /* Automatic fan speed control registers */ u8 auto_pwm[NUM_AUTO_PWM][4]; /* [nr][3] is hard-coded */ @@ -772,6 +801,71 @@ static int pwm_from_reg(const struct it87_data *data, = u8 reg) return (reg & 0x7f) << 1; } =20 +static inline u8 pwm_temp_map_get(const struct it87_data *data, u8 ctrl) +{ + return (ctrl >> data->pwm_temp_map_shift) & + data->pwm_temp_map_mask; +} + +static inline u8 pwm_temp_map_set(const struct it87_data *data, u8 ctrl, + u8 map) +{ + ctrl &=3D ~(data->pwm_temp_map_mask << data->pwm_temp_map_shift); + return ctrl | ((map & data->pwm_temp_map_mask) + << data->pwm_temp_map_shift); +} + +static inline u8 pwm_num_temp_map(const struct it87_data *data) +{ + return data->num_temp_map; +} + +static unsigned int pwm_temp_channel(const struct it87_data *data, + int nr, u8 map) +{ + if (has_new_tempmap(data)) { + u8 num =3D pwm_num_temp_map(data); + + if (map >=3D num) + map =3D 0; + return map; + } + + if (map >=3D IT87_PWM_OLD_NUM_TEMP) + map =3D 0; + + if (nr >=3D IT87_PWM_OLD_NUM_TEMP) + map +=3D IT87_PWM_OLD_NUM_TEMP; + + return map; +} + +static int pwm_temp_map_from_channel(const struct it87_data *data, int nr, + unsigned int channel, u8 *map) +{ + if (has_new_tempmap(data)) { + u8 num =3D pwm_num_temp_map(data); + + if (channel >=3D num) + return -EINVAL; + *map =3D channel; + return 0; + } + + if (nr >=3D IT87_PWM_OLD_NUM_TEMP) { + if (channel < IT87_PWM_OLD_NUM_TEMP || + channel >=3D 2 * IT87_PWM_OLD_NUM_TEMP) + return -EINVAL; + channel -=3D IT87_PWM_OLD_NUM_TEMP; + } else { + if (channel >=3D IT87_PWM_OLD_NUM_TEMP) + return -EINVAL; + } + + *map =3D channel; + return 0; +} + static int DIV_TO_REG(int val) { int answer =3D 0; @@ -783,6 +877,11 @@ static int DIV_TO_REG(int val) =20 #define DIV_FROM_REG(val) BIT(val) =20 +static inline u16 it87_reg_pwm(const struct it87_data *data, int nr) +{ + return data->reg_pwm[nr]; +} + /* * PWM base frequencies. The frequency has to be divided by either 128 or = 256, * depending on the chip type, to calculate the actual PWM frequency. @@ -863,14 +962,22 @@ static void it87_write_value(struct it87_data *data, = u8 reg, u8 value) =20 static void it87_update_pwm_ctrl(struct it87_data *data, int nr) { - data->pwm_ctrl[nr] =3D it87_read_value(data, IT87_REG_PWM[nr]); + data->pwm_ctrl[nr] =3D it87_read_value(data, it87_reg_pwm(data, nr)); if (has_newer_autopwm(data)) { - data->pwm_temp_map[nr] =3D data->pwm_ctrl[nr] & 0x03; + data->pwm_temp_map[nr] =3D + pwm_temp_map_get(data, data->pwm_ctrl[nr]); + if (has_new_tempmap(data) && + data->pwm_temp_map[nr] >=3D pwm_num_temp_map(data)) + data->pwm_temp_map[nr] =3D 0; data->pwm_duty[nr] =3D it87_read_value(data, IT87_REG_PWM_DUTY[nr]); } else { if (data->pwm_ctrl[nr] & 0x80) /* Automatic mode */ - data->pwm_temp_map[nr] =3D data->pwm_ctrl[nr] & 0x03; + data->pwm_temp_map[nr] =3D + pwm_temp_map_get(data, data->pwm_ctrl[nr]); + if (has_new_tempmap(data) && + data->pwm_temp_map[nr] >=3D pwm_num_temp_map(data)) + data->pwm_temp_map[nr] =3D 0; else /* Manual mode */ data->pwm_duty[nr] =3D data->pwm_ctrl[nr] & 0x7f; } @@ -1600,6 +1707,8 @@ static ssize_t set_pwm_enable(struct device *dev, str= uct device_attribute *attr, if (err) return err; =20 + it87_update_pwm_ctrl(data, nr); + if (val =3D=3D 0) { if (nr < 3 && has_fanctl_onoff(data)) { int tmp; @@ -1619,27 +1728,30 @@ static ssize_t set_pwm_enable(struct device *dev, s= truct device_attribute *attr, data->pwm_duty[nr]); /* and set manual mode */ if (has_newer_autopwm(data)) { - ctrl =3D (data->pwm_ctrl[nr] & 0x7c) | - data->pwm_temp_map[nr]; + ctrl =3D pwm_temp_map_set(data, + data->pwm_ctrl[nr] & + ~0x80, + data->pwm_temp_map[nr]); } else { ctrl =3D data->pwm_duty[nr]; } data->pwm_ctrl[nr] =3D ctrl; - it87_write_value(data, IT87_REG_PWM[nr], ctrl); + it87_write_value(data, it87_reg_pwm(data, nr), ctrl); } } else { u8 ctrl; =20 if (has_newer_autopwm(data)) { - ctrl =3D (data->pwm_ctrl[nr] & 0x7c) | - data->pwm_temp_map[nr]; + ctrl =3D pwm_temp_map_set(data, + data->pwm_ctrl[nr] & ~0x80, + data->pwm_temp_map[nr]); if (val !=3D 1) ctrl |=3D 0x80; } else { ctrl =3D (val =3D=3D 1 ? data->pwm_duty[nr] : 0x80); } data->pwm_ctrl[nr] =3D ctrl; - it87_write_value(data, IT87_REG_PWM[nr], ctrl); + it87_write_value(data, it87_reg_pwm(data, nr), ctrl); =20 if (has_fanctl_onoff(data) && nr < 3) { /* set SmartGuardian mode */ @@ -1690,7 +1802,7 @@ static ssize_t set_pwm(struct device *dev, struct dev= ice_attribute *attr, */ if (!(data->pwm_ctrl[nr] & 0x80)) { data->pwm_ctrl[nr] =3D data->pwm_duty[nr]; - it87_write_value(data, IT87_REG_PWM[nr], + it87_write_value(data, it87_reg_pwm(data, nr), data->pwm_ctrl[nr]); } } @@ -1745,20 +1857,14 @@ static ssize_t show_pwm_temp_map(struct device *dev, struct sensor_device_attribute *sensor_attr =3D to_sensor_dev_attr(attr); struct it87_data *data =3D it87_update_device(dev); int nr =3D sensor_attr->index; - u8 num_map; - int map; + unsigned int channel; =20 if (IS_ERR(data)) return PTR_ERR(data); =20 - num_map =3D data->num_temp_map; - map =3D data->pwm_temp_map[nr]; - if (map >=3D num_map) - map =3D 0; /* Should never happen */ - if (nr >=3D num_map) /* pwm channels 3..6 map to temp4..6 */ - map +=3D num_map; + channel =3D pwm_temp_channel(data, nr, data->pwm_temp_map[nr]); =20 - return sprintf(buf, "%d\n", (int)BIT(map)); + return sprintf(buf, "%d\n", (int)BIT(channel)); } =20 static ssize_t set_pwm_temp_map(struct device *dev, @@ -1768,45 +1874,34 @@ static ssize_t set_pwm_temp_map(struct device *dev, struct sensor_device_attribute *sensor_attr =3D to_sensor_dev_attr(attr); struct it87_data *data =3D dev_get_drvdata(dev); int nr =3D sensor_attr->index; - u8 num_map =3D data->num_temp_map; long val; int err; - u8 reg; + unsigned int channel; + u8 map; =20 - if (kstrtol(buf, 10, &val) < 0) + if (kstrtol(buf, 10, &val) < 0 || val <=3D 0 || !is_power_of_2(val)) return -EINVAL; =20 - if (nr >=3D num_map) - val -=3D num_map; - - switch (val) { - case BIT(0): - reg =3D 0x00; - break; - case BIT(1): - reg =3D 0x01; - break; - case BIT(2): - reg =3D 0x02; - break; - default: + channel =3D __ffs(val); + if (pwm_temp_map_from_channel(data, nr, channel, &map)) return -EINVAL; - } =20 err =3D it87_lock(data); if (err) return err; =20 it87_update_pwm_ctrl(data, nr); - data->pwm_temp_map[nr] =3D reg; + data->pwm_temp_map[nr] =3D map; /* * If we are in automatic mode, write the temp mapping immediately; * otherwise, just store it for later use. */ if (data->pwm_ctrl[nr] & 0x80) { - data->pwm_ctrl[nr] =3D (data->pwm_ctrl[nr] & 0xfc) | - data->pwm_temp_map[nr]; - it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]); + data->pwm_ctrl[nr] =3D pwm_temp_map_set(data, + data->pwm_ctrl[nr], + data->pwm_temp_map[nr]); + it87_write_value(data, it87_reg_pwm(data, nr), + data->pwm_ctrl[nr]); } it87_unlock(data); return count; @@ -3357,7 +3452,10 @@ static void it87_init_device(struct platform_device = *pdev) * manual duty cycle. */ for (i =3D 0; i < NUM_AUTO_PWM; i++) { - data->pwm_temp_map[i] =3D i; + if (has_new_tempmap(data)) + data->pwm_temp_map[i] =3D 0; + else + data->pwm_temp_map[i] =3D i % IT87_PWM_OLD_NUM_TEMP; data->pwm_duty[i] =3D 0x7f; /* Full speed */ data->auto_pwm[i][3] =3D 0x7f; /* Full speed, hard-coded */ } @@ -3429,7 +3527,8 @@ static int it87_check_pwm(struct device *dev) =20 for (i =3D 0; i < ARRAY_SIZE(pwm); i++) pwm[i] =3D it87_read_value(data, - IT87_REG_PWM[i]); + it87_reg_pwm(data, + i)); =20 /* * If any fan is in automatic pwm mode, the polarity @@ -3444,7 +3543,8 @@ static int it87_check_pwm(struct device *dev) tmp | 0x87); for (i =3D 0; i < 3; i++) it87_write_value(data, - IT87_REG_PWM[i], + it87_reg_pwm(data, + i), 0x7f & ~pwm[i]); return 1; } @@ -3493,11 +3593,19 @@ static int it87_probe(struct platform_device *pdev) data->ec_special_config =3D sio_data->ec_special_config; chip =3D &it87_devices[sio_data->type]; data->features =3D chip->features; + data->reg_pwm =3D chip->reg_pwm; data->peci_mask =3D chip->peci_mask; data->old_peci_mask =3D chip->old_peci_mask; data->num_temp_limit =3D chip->num_temp_limit; data->num_temp_offset =3D chip->num_temp_offset; data->num_temp_map =3D chip->num_temp_map; + if (has_new_tempmap(data)) { + data->pwm_temp_map_mask =3D 0x07; + data->pwm_temp_map_shift =3D 3; + } else { + data->pwm_temp_map_mask =3D 0x03; + data->pwm_temp_map_shift =3D 0; + } /* * IT8705F Datasheet 0.4.1, 3h =3D=3D Version G. * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h =3D=3D Version J. --=20 2.50.1 (Apple Git-155) From nobody Sun Feb 8 04:33:43 2026 Received: from mail-wm1-f52.google.com (mail-wm1-f52.google.com [209.85.128.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A115D3AEF4F for ; Wed, 14 Jan 2026 22:12:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768428756; cv=none; b=Qe15CKZwCVdgIdDH61fBXoNW5ne6StsrHh+6g7AONQa55lTghlOpL7a0ypg+scFvRS0xoiuDGU1OLlaacfvx0A9oMyNTHcsVJ0azGEueC7DNRrBMJlFp9RitCGa17Eu9BioUVhkGYYnYUeMZvV2BZNhIjRuYLXm7lW5LxIz22+M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768428756; c=relaxed/simple; bh=AqQ7D7MZG5dCwk0+FI4LPwFjNnbWzQHDbkY9jbK4f6A=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=AF492ORQR7Hpp7cwdtJPLmrho1SmB/T5YlDP/Q/xwklmqNOrmjgXr/fMWFw4f8NjLuVnLBspkMjtdYBncfFCj6QCd1sLnnOooD8ZjfBnx5AdgyRkpLbeQEX3vM1yWWK5kAiQYfu8TL9VYVYPh/KCgiIPfLLob+jhNFeYSCrgBWQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=perenite.com; spf=pass smtp.mailfrom=perenite.com; dkim=pass (2048-bit key) header.d=perenite-com.20230601.gappssmtp.com header.i=@perenite-com.20230601.gappssmtp.com header.b=Jv6dA1Q/; arc=none smtp.client-ip=209.85.128.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=perenite.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=perenite.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=perenite-com.20230601.gappssmtp.com header.i=@perenite-com.20230601.gappssmtp.com header.b="Jv6dA1Q/" Received: by mail-wm1-f52.google.com with SMTP id 5b1f17b1804b1-47ee0291921so2186845e9.3 for ; Wed, 14 Jan 2026 14:12:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=perenite-com.20230601.gappssmtp.com; s=20230601; t=1768428737; x=1769033537; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=TEwZJiV03fJ628aCuxgNtJ0Js2UxACV5+XtPBkCCvVM=; b=Jv6dA1Q/hdZge3jWWBPueAxiXQ57z4IkxAOcHwLHAax7UImoRVPKoDw4PdF7or/BEL tej1t2vHhKUjuBEBiU5D6Hm46nD8B7ybeyVavhyNiboR+m36UQ+Dra2LN7P28rOXyryx LcR1yAz7I+T+wliVw1Lh53Cu9bMGd0fjtOY1ZIjQROoAnHW7HwHQpyfHLQOwaPyCEnNR KIVxR0sS040IasR11+3jBsCk9p7Qwm8+fQivNsssLU4U5pNRIfGba2XAhmInrLebNxK0 732MN3yXf81aRMtdoFY/1WcCKvw6iNiAd1g0WkjyeD3m4oWmD1tg3goLI6yun8QyOSi7 zmTw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1768428737; x=1769033537; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=TEwZJiV03fJ628aCuxgNtJ0Js2UxACV5+XtPBkCCvVM=; b=rmQ5WSQuEvgmQpoo0yKdr5dUbtze595NN42Ayhm8IBK7X9igE+S8Br8bgscHz4wyVu Y9SLdLLSLTLUzMLj7PYMfWZ/Y4hBbZhnB0I6NyEL9w1if4KWsIS9dxMQDhvja3BZRPur gAFc/dECLYhhiBFjKYAFn4gLbCEcefoYto75i+/4muT6VYNhdNDqI5UG3wLVaBYGwsbp 7cHkx6yNWHIuLgpnVWysSfjpAcN2okMOtvl3P9O45Exgz/KRQ/lDw7meGbt0zufS33xy XAKzHdTxmOQQ+/PtHwHZqft88AhxnJ/zFEmItuuiVtJusZbHMGZNMCwi86tav1jqZLPD Kdxg== X-Forwarded-Encrypted: i=1; AJvYcCXl+fn/6bbPMmLO2LmCcVT7hJNX9ALab/PeSTIxFT/s5m3EQ/4o3xY4iq6Sv3T0s5qA9zTtF8TsYN2+PFg=@vger.kernel.org X-Gm-Message-State: AOJu0YzG2IaXUB4dW3pfX8jTIx7jaEJikgQssykgbbmP+VTg32bohE08 Q4+r4Rhka+JybT33AAVDiBaOK+ZEF2q2UczuTlzjDD5KHAwyS2fmmNXmqtEcFFKB6g== X-Gm-Gg: AY/fxX7VZ1EdJKDj/s0juhMqclr5YDTVIyTAri1OId//f2vWTN+4gQgxn3L7oulsDL5 6omKsyX0RXbQpiY/XEkkTl4Jx9kqIL2U0BKMmyiV6MHzd0rar5+ijmbhAR3o/hxltmz3Aef37hh KQaB6cUlr7geLDoplaI8BjXjtmtZ0Mrec/Ef8BD60VYGE+Av40+7gnerxNhS1tJ7+ITo6EoCfya Bltufc2y9rW0BDbd61g9tLSs8bPi7OwwpUvkhkIz2apb4U/7t4OifgIOX5418al6vP6jEVrVWNN PqSUl7Wcswj8pgnUNSgVzdSjP5hSWjZWC/H9rPZczrUP/LFrmNY2SWWV7wHNiEhtKzJwc5jrTQ0 t2lMV/9xxw2mvZ7m2vfIJOMWCRC3Zq+J/9uC9Bkvj+8BOt/YU9hb+0uovfLmjYhI3FGRNHfC+se 0+QXZK+OK4nL85ah8FZxlS550ZcdoHelVqZq+Sy9VDakMNCWFdpPRjy0FVXAXYIhAYwaZdiFKqj MeTiOujFwNgdLGirw== X-Received: by 2002:a05:600c:1f92:b0:47a:94fc:d057 with SMTP id 5b1f17b1804b1-47ee332fa41mr38400435e9.2.1768428736813; Wed, 14 Jan 2026 14:12:16 -0800 (PST) Received: from localhost.localdomain (217-128-226-200.ftth.fr.orangecustomers.net. [217.128.226.200]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-47f941a670dsm3098195e9.5.2026.01.14.14.12.15 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 14 Jan 2026 14:12:16 -0800 (PST) From: "benoit.masson" To: Jean Delvare , Guenter Roeck Cc: linux-hwmon@vger.kernel.org, linux-kernel@vger.kernel.org, Jonathan Corbet , linux-doc@vger.kernel.org, "benoit.masson" Subject: [PATCH v4 3/5] hwmon: it87: expose additional temperature limits Date: Wed, 14 Jan 2026 23:12:08 +0100 Message-ID: <20260114221210.98071-4-yahoo@perenite.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260114221210.98071-1-yahoo@perenite.com> References: <20260114221210.98071-1-yahoo@perenite.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Expose extra temp min/max/offset/type/alarm attributes when a chip reports more than three temperature resources. Signed-off-by: benoit.masson --- drivers/hwmon/it87.c | 58 ++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 53 insertions(+), 5 deletions(-) diff --git a/drivers/hwmon/it87.c b/drivers/hwmon/it87.c index 2d4264d05bc2..368ae68ace15 100644 --- a/drivers/hwmon/it87.c +++ b/drivers/hwmon/it87.c @@ -1334,8 +1334,26 @@ static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_I= WUSR, show_temp, set_temp, static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp, set_temp, 2, 3); static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0); +static SENSOR_DEVICE_ATTR_2(temp4_min, S_IRUGO | S_IWUSR, show_temp, set_t= emp, + 3, 1); +static SENSOR_DEVICE_ATTR_2(temp4_max, S_IRUGO | S_IWUSR, show_temp, set_t= emp, + 3, 2); +static SENSOR_DEVICE_ATTR_2(temp4_offset, S_IRUGO | S_IWUSR, show_temp, + set_temp, 3, 3); static SENSOR_DEVICE_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0); +static SENSOR_DEVICE_ATTR_2(temp5_min, S_IRUGO | S_IWUSR, show_temp, set_t= emp, + 4, 1); +static SENSOR_DEVICE_ATTR_2(temp5_max, S_IRUGO | S_IWUSR, show_temp, set_t= emp, + 4, 2); +static SENSOR_DEVICE_ATTR_2(temp5_offset, S_IRUGO | S_IWUSR, show_temp, + set_temp, 4, 3); static SENSOR_DEVICE_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0); +static SENSOR_DEVICE_ATTR_2(temp6_min, S_IRUGO | S_IWUSR, show_temp, set_t= emp, + 5, 1); +static SENSOR_DEVICE_ATTR_2(temp6_max, S_IRUGO | S_IWUSR, show_temp, set_t= emp, + 5, 2); +static SENSOR_DEVICE_ATTR_2(temp6_offset, S_IRUGO | S_IWUSR, show_temp, + set_temp, 5, 3); =20 static int get_temp_type(struct it87_data *data, int index) { @@ -1461,6 +1479,12 @@ static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IW= USR, show_temp_type, set_temp_type, 1); static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type, set_temp_type, 2); +static SENSOR_DEVICE_ATTR(temp4_type, S_IRUGO | S_IWUSR, show_temp_type, + set_temp_type, 3); +static SENSOR_DEVICE_ATTR(temp5_type, S_IRUGO | S_IWUSR, show_temp_type, + set_temp_type, 4); +static SENSOR_DEVICE_ATTR(temp6_type, S_IRUGO | S_IWUSR, show_temp_type, + set_temp_type, 5); =20 /* 6 Fans */ =20 @@ -2290,6 +2314,9 @@ static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_a= larm, NULL, 7); static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16); static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17); static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18); +static SENSOR_DEVICE_ATTR(temp4_alarm, S_IRUGO, show_alarm, NULL, 19); +static SENSOR_DEVICE_ATTR(temp5_alarm, S_IRUGO, show_alarm, NULL, 20); +static SENSOR_DEVICE_ATTR(temp6_alarm, S_IRUGO, show_alarm, NULL, 21); static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR, show_alarm, clear_intrusion, 4); =20 @@ -2350,6 +2377,9 @@ static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWU= SR, show_beep, set_beep, 2); static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2); static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2); +static SENSOR_DEVICE_ATTR(temp4_beep, S_IRUGO, show_beep, NULL, 2); +static SENSOR_DEVICE_ATTR(temp5_beep, S_IRUGO, show_beep, NULL, 2); +static SENSOR_DEVICE_ATTR(temp6_beep, S_IRUGO, show_beep, NULL, 2); =20 static ssize_t vrm_show(struct device *dev, struct device_attribute *attr, char *buf) @@ -2512,14 +2542,12 @@ static umode_t it87_temp_is_visible(struct kobject = *kobj, int i =3D index / 7; /* temperature index */ int a =3D index % 7; /* attribute index */ =20 - if (index >=3D 21) { - i =3D index - 21 + 3; - a =3D 0; - } - if (!(data->has_temp & BIT(i))) return 0; =20 + if (a && i >=3D data->num_temp_limit) + return 0; + if (a =3D=3D 3) { if (get_temp_type(data, i) =3D=3D 0) return 0; @@ -2561,8 +2589,28 @@ static struct attribute *it87_attributes_temp[] =3D { &sensor_dev_attr_temp3_beep.dev_attr.attr, =20 &sensor_dev_attr_temp4_input.dev_attr.attr, /* 21 */ + &sensor_dev_attr_temp4_max.dev_attr.attr, + &sensor_dev_attr_temp4_min.dev_attr.attr, + &sensor_dev_attr_temp4_type.dev_attr.attr, + &sensor_dev_attr_temp4_alarm.dev_attr.attr, + &sensor_dev_attr_temp4_offset.dev_attr.attr, + &sensor_dev_attr_temp4_beep.dev_attr.attr, + &sensor_dev_attr_temp5_input.dev_attr.attr, + &sensor_dev_attr_temp5_max.dev_attr.attr, + &sensor_dev_attr_temp5_min.dev_attr.attr, + &sensor_dev_attr_temp5_type.dev_attr.attr, + &sensor_dev_attr_temp5_alarm.dev_attr.attr, + &sensor_dev_attr_temp5_offset.dev_attr.attr, + &sensor_dev_attr_temp5_beep.dev_attr.attr, + &sensor_dev_attr_temp6_input.dev_attr.attr, + &sensor_dev_attr_temp6_max.dev_attr.attr, + &sensor_dev_attr_temp6_min.dev_attr.attr, + &sensor_dev_attr_temp6_type.dev_attr.attr, + &sensor_dev_attr_temp6_alarm.dev_attr.attr, + &sensor_dev_attr_temp6_offset.dev_attr.attr, + &sensor_dev_attr_temp6_beep.dev_attr.attr, NULL }; =20 --=20 2.50.1 (Apple Git-155) From nobody Sun Feb 8 04:33:43 2026 Received: from mail-wm1-f42.google.com (mail-wm1-f42.google.com [209.85.128.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 92A143AEF52 for ; Wed, 14 Jan 2026 22:12:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768428752; cv=none; b=E8MEJLPmC1HtTyOYBeoXkQ+5pMWAKdRQI/Ymm8IlkHK/g1XPVvMwb1GVT90qXVHpqo09UHHkT3DLGQlvwviDxws+JKCIOLYJHIhmkYisjEuf3lWUnP+H12hwJdcQZ6Xbx+iwVH5+v3pjEgfMGzAovPmUV76r8XejSmmI1QZP9yA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768428752; c=relaxed/simple; bh=HcuqsBAtZvOWyIs4Xt0uhzuCiOOW+T+QxtanzaAEL14=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=hYyhrD1R4peJ/zIv3algEvFaAYBjivWjJEm/FUNhfqbjs1q/yCHbu7Nct3TF0uCtlg6+e19K/vas6JHy8hf6TPxe7p4vOrhiGDxy0uXjbbhIKxt1GPuLG5ipO8URnS4S++NsyQ64BTzmlJmbiRZDiMejH7YVmy+IhVkgwt4ZC40= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=perenite.com; spf=pass smtp.mailfrom=perenite.com; dkim=pass (2048-bit key) header.d=perenite-com.20230601.gappssmtp.com header.i=@perenite-com.20230601.gappssmtp.com header.b=JvK+Vr+B; arc=none smtp.client-ip=209.85.128.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=perenite.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=perenite.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=perenite-com.20230601.gappssmtp.com header.i=@perenite-com.20230601.gappssmtp.com header.b="JvK+Vr+B" Received: by mail-wm1-f42.google.com with SMTP id 5b1f17b1804b1-47ee974e230so2687485e9.2 for ; Wed, 14 Jan 2026 14:12:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=perenite-com.20230601.gappssmtp.com; s=20230601; t=1768428738; x=1769033538; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=B9JJU809fV3hatrHlPxX8QZ9hS3VlNGwjApCyrU92DA=; b=JvK+Vr+BbahaQVDnNmy06A3QitSf6QvFTk92pcdPV5x1VMLpV+X934MoHhJCi1HU9R yBL9TDz9HocPqBzBex7RkkZyqw0Zeb3hrAStbYr+JONNWRX85quTtsddiSalx3MShbES Aw1prFRcl9AvRGNumHe26IvI04Ch5mJHexL12NkOxeB7JLibL+ED1vcBR1ZxDrc0D5RN r8HDDm3BiVgQeIFxxMRP0SzeApf1HKzYt7KIPCZqUyOaXWjTaRfTepUnievVM1kcmuxO hTv5h7fm2s2NHNTKtIVpHyvpJwoQJBA09nrDU4XcYXIbs+fomudMhTOA4yHXOHvhvH+U 67Eg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1768428738; x=1769033538; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=B9JJU809fV3hatrHlPxX8QZ9hS3VlNGwjApCyrU92DA=; b=NYGjb4QUxFosixzc9NUtg64r7MHAqD9u8oWFkCNSoXUfMbE6S3FtZQwnOb+gse+u3R pAwDFiXEuqCeEgTIlh2y2c82kTKkqh6kFg8ZiHY1hRwBGTKKAO9qiMbSVH2ajg4z6NqZ eNoQjuqeZepqovM23ZFYIEE1OxEvL86NzQ3/Aa+oiKkMn6BZu7zJ2/ZYAb34cJDDprMn ynPQ9LzVWxePX3eBtnNY5ABeoiH4c5HSMYw4D9FAAt46ARadRVZNtg0kL5c8UYstp7XO tMPTmMkCDA0iGhWPUYREjKwzDXx926/9d0Ji2Q3+OymPI0JHp1V6gO0itpZWB1F0rxAH euiQ== X-Forwarded-Encrypted: i=1; AJvYcCWlCFdTblEocbeV0mJz01V36qBqSMbq+Y/Ny2t6mr5BfX7dVTXiqzfX2xGDqeAES8LRuYFHmvT++Gt9rKU=@vger.kernel.org X-Gm-Message-State: AOJu0YxHrirokYkMYsCjNNw3hBNpamqLSKYE7Z9cw4CrtdIg28aHN2Iz 1ODMOFgnizA3nAiyn9oB8+1xHmQt0vbFAthzGgAkwjVAOhppmRo6GVWyMDevURYivQ== X-Gm-Gg: AY/fxX4X5zxsge5kWm/uGr4Kvwn2tPCNa8dxuCRj/kVg5s3DWY+FaGIimMi+Bg0NhDD sQtUxrkAt/V82Foz9KI0di4aPlkQqZlWisCl1QkEmpyr1WGAuhcFxZLOQncxGJeNSUPcZSv2AGx 3Sjsa2o5Tm3TPAcsfT8pe1UQ3WZbUuu3bWVLdSJGuyJrbkQI0PZm86p5boZIJoYyjGbjKSfyCod 6K8QirSHg8+9AvnpXcS1h633cDvC6JAVMgrSPhVX7NPCRBHWyrkY1hBBg75iBygLRKHWJ4uCBxG rlSP7y+OdOqREXb88gQnt26NRlg+S72lNQwQ/ILRWTr9XzPilGl0AGL/XhIcFUJdSUaF2ZxinXe g++SW3Bvi9m9VAeYtkh2Q2q2TbLkV+jzDdnl0BxvQ6QeRfAJX36kdmG4YUxqvzqK81sb/f2z/QP pGbpN4XLQuHCYpJHTs1NXxbVFpRQpMfhEu7k5bQvUfNhywXk7i+Y47ucET1/b+fo+7aAN/UnlV0 RkPuU/0XSApQ+b0oQ== X-Received: by 2002:a05:600c:a318:b0:47e:e952:86ca with SMTP id 5b1f17b1804b1-47ee9528812mr13358225e9.2.1768428737713; Wed, 14 Jan 2026 14:12:17 -0800 (PST) Received: from localhost.localdomain (217-128-226-200.ftth.fr.orangecustomers.net. [217.128.226.200]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-47f941a670dsm3098195e9.5.2026.01.14.14.12.16 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 14 Jan 2026 14:12:17 -0800 (PST) From: "benoit.masson" To: Jean Delvare , Guenter Roeck Cc: linux-hwmon@vger.kernel.org, linux-kernel@vger.kernel.org, Jonathan Corbet , linux-doc@vger.kernel.org, "benoit.masson" Subject: [PATCH v4 4/5] hwmon: it87: add IT8613E identification Date: Wed, 14 Jan 2026 23:12:09 +0100 Message-ID: <20260114221210.98071-5-yahoo@perenite.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260114221210.98071-1-yahoo@perenite.com> References: <20260114221210.98071-1-yahoo@perenite.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Teach the Super I/O probe path to recognize IT8613E and advertise its model name in the supported device list. Signed-off-by: benoit.masson --- drivers/hwmon/it87.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/hwmon/it87.c b/drivers/hwmon/it87.c index 368ae68ace15..4453bf3e8ef4 100644 --- a/drivers/hwmon/it87.c +++ b/drivers/hwmon/it87.c @@ -35,6 +35,7 @@ * IT8790E Super I/O chip w/LPC interface * IT8792E Super I/O chip w/LPC interface * IT87952E Super I/O chip w/LPC interface + * IT8613E Super I/O chip w/LPC interface * Sis950 A clone of the IT8705F * * Copyright (C) 2001 Chris Gauthron @@ -64,7 +65,7 @@ =20 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732, it8771, it8772, it8781, it8782, it8783, it8786, it8790, - it8792, it8603, it8620, it8622, it8628, it87952 }; + it8792, it8603, it8613, it8620, it8622, it8628, it87952 }; =20 static struct platform_device *it87_pdev[2]; =20 @@ -158,6 +159,7 @@ static inline void superio_exit(int ioreg, bool noexit) #define IT8786E_DEVID 0x8786 #define IT8790E_DEVID 0x8790 #define IT8603E_DEVID 0x8603 +#define IT8613E_DEVID 0x8613 #define IT8620E_DEVID 0x8620 #define IT8622E_DEVID 0x8622 #define IT8623E_DEVID 0x8623 @@ -547,6 +549,10 @@ static const struct it87_devices it87_devices[] =3D { .num_temp_map =3D 4, .peci_mask =3D 0x07, }, + [it8613] =3D { + .name =3D "it8613", + .model =3D "IT8613E", + }, [it8620] =3D { .name =3D "it8620", .model =3D "IT8620E", @@ -2988,6 +2994,9 @@ static int __init it87_find(int sioaddr, unsigned sho= rt *address, case IT8623E_DEVID: sio_data->type =3D it8603; break; + case IT8613E_DEVID: + sio_data->type =3D it8613; + break; case IT8620E_DEVID: sio_data->type =3D it8620; break; --=20 2.50.1 (Apple Git-155) From nobody Sun Feb 8 04:33:43 2026 Received: from mail-wm1-f47.google.com (mail-wm1-f47.google.com [209.85.128.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6AEF13A9015 for ; Wed, 14 Jan 2026 22:12:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.47 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768428771; cv=none; b=TrSpxSSHDDKKpONPVUHbu+jf6OHQUYyd24U2LN09VtiImG4rj47mOzTNz70mtq+etKGUyMTAr33gaLlnPsStFVTAGiBTJCletx3DyFe8O/XeQMXb7yeysiQQQT0qqnGrsGnRiHZrPfR1yl+jHfGSrqme069KkAYx63N28ObTPN4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768428771; c=relaxed/simple; bh=W+mERa2bshCV1HgasC8vl/IXM22iJcfrOm3qbS2eccc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=hiSzbn9mE0ANm1Hi2829ijIiruZyN0MEXN+/rFQjlaCjS65hXOTfa7ob6mtqTSrpgdPK7gL3xI+wu3F+WSrAWRWr5Sz/sb2eVx0mIVYTBDn2z9oGH6HiIYEd2IAmvDIaPsqmPKvNWH8QdKwaaCc7ur09Zi9RpSHGckWli4aE4Ps= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=perenite.com; spf=pass smtp.mailfrom=perenite.com; dkim=pass (2048-bit key) header.d=perenite-com.20230601.gappssmtp.com header.i=@perenite-com.20230601.gappssmtp.com header.b=gqJKUKfT; arc=none smtp.client-ip=209.85.128.47 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=perenite.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=perenite.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=perenite-com.20230601.gappssmtp.com header.i=@perenite-com.20230601.gappssmtp.com header.b="gqJKUKfT" Received: by mail-wm1-f47.google.com with SMTP id 5b1f17b1804b1-47ee974e230so2687575e9.2 for ; Wed, 14 Jan 2026 14:12:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=perenite-com.20230601.gappssmtp.com; s=20230601; t=1768428739; x=1769033539; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=/l+g792kSXhbsjX0MXutJrSM3vyj28X2EglOqZxof90=; b=gqJKUKfTrDrdP+rvTyNDaKosQpGMIY8SrBROm5d3tgNoFC3qw9nc+DTIf5wjuq/Pn6 MG+XmJNw1Sxa7AEz1M7kAN/nWEBdxm2XlxhizjN2v2NRtHSMQ9we7f2e0w1FMM6OTxJv uMFa+BhkzxS6U0M8l8bf9UxHVGTbn1gspXxRjwxlnp1dvzwQNBzEwNddw3mhjTaWbi8i NzgMLeyi0uJm/FvlnZAvlrcJNMcbA1+MHJyE6yXn4PLVLSOBIWEd6/HCHy6Y6xsdwaB2 +dfnSh8+d2lFzPxM1RETn7MpvvjmJQpKxLz2GllC+fB2iJx4PTNeyfPUWXnsYX3fBiU9 8Vdw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1768428739; x=1769033539; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=/l+g792kSXhbsjX0MXutJrSM3vyj28X2EglOqZxof90=; b=OZQU7FAJnjsCwLnGMcrTpD5By4/aXdHM+VzOEUJln459yykh3ebKRYXRwgmpeqzMqz m7Sh1kHIBm8lHtp1Cs/ZnfbMoUZKOVlxUx6QfjBoMn2g5xc67aFGxN81LPh6QC/oiGu/ WjyMvOQKPHf5BhH5glSdQytQFW2Oy5YMlOLZhIAUgyWkVxyR/C8t+ghe1445CWFhdR2s 6o+Pq/OKj2Lp3AFbkrWYPpLIKIrS+4VS1XxhUEhkWLM3r5nrUJSrEtOJ5TBUG+R8nw4R aTeHADF79n1mQm4C8vZw0aSimck1j/X49cAyLpGWs814uSkQvypKBOLoGqnAA/I3q+um vLwA== X-Forwarded-Encrypted: i=1; AJvYcCW2XGsgOm3wJo3EHvRu5RE3oSlYIbYIaJRMULh3p9WDhgMYFkv1i0/90AObnQRERpW79Ad8FiiJQMnj6CY=@vger.kernel.org X-Gm-Message-State: AOJu0YyJf86C2I9eckNxupaVJOO5jCbbo7aPg6o7NxlTwXhrzhISQGca JTR1bb5ctkzb/P4l2RLSoWHHvAGdqpduU2dIeYFGdRAn8I9s3gF6nhn2gEnYZBesCg== X-Gm-Gg: AY/fxX4fGvFn7vJ3PDRRZmYXHRFarb1dIe5J12Doqr/9mSR12JacqNWK1ujubZgWYGJ 96Yoockr5HnIVAlrS3CcYvNwTEMI416P644//GJx13iVvSFkX8yqWKxRpWAIOzncU10kBwfe1ba BsLFLr0qGZsrnzjBMoKiSiudFupAdxfH1WNlK+sbLxsmc1bgYxncZFuECdRjVKgcmcOTyNkXQqs MkGmXZ5ylaysOqEgbzcgFQqK78PgcDsIslxWA8d7V5AUkziVH6I7KX2njM0hwCmEsVF/8JKxgyL HqvA5kIWHEV1C6B3kyf5dY5o1S8i7GyQH7kigi+AMCSZgA9XifMv+4hBRgTi2EyMDZeepWZS07d 55gtc+T0uJHZ9M/7vHKJ4HWA+2F1uJpu3+iwNkpaS1soL1hZwCwIYpUOTAnEPlM7VePeS9E++1Q WRUgDwasV9Km9tKgQtDgfYMyfpNRYxVHJBRgKSE6jFcQhwM8iYEvAz/3Pe+vBLIX6LjQUuvcgnv d9VvKWe/Qc38pfKyQ== X-Received: by 2002:a05:600c:45c8:b0:477:9a28:b0a4 with SMTP id 5b1f17b1804b1-47ee3071491mr51527195e9.0.1768428738756; Wed, 14 Jan 2026 14:12:18 -0800 (PST) Received: from localhost.localdomain (217-128-226-200.ftth.fr.orangecustomers.net. [217.128.226.200]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-47f941a670dsm3098195e9.5.2026.01.14.14.12.17 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 14 Jan 2026 14:12:18 -0800 (PST) From: "benoit.masson" To: Jean Delvare , Guenter Roeck Cc: linux-hwmon@vger.kernel.org, linux-kernel@vger.kernel.org, Jonathan Corbet , linux-doc@vger.kernel.org, "benoit.masson" Subject: [PATCH v4 5/5] hwmon: it87: add IT8613E configuration Date: Wed, 14 Jan 2026 23:12:10 +0100 Message-ID: <20260114221210.98071-6-yahoo@perenite.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260114221210.98071-1-yahoo@perenite.com> References: <20260114221210.98071-1-yahoo@perenite.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add IT8613E feature flags, resource counts, ADC scaling, and GPIO quirk handling, then document the chip in the hwmon guide. Signed-off-by: benoit.masson --- Documentation/hwmon/it87.rst | 8 ++++++ drivers/hwmon/it87.c | 52 +++++++++++++++++++++++++++++++++++- 2 files changed, 59 insertions(+), 1 deletion(-) diff --git a/Documentation/hwmon/it87.rst b/Documentation/hwmon/it87.rst index 5cef4f265000..fa968be84f7c 100644 --- a/Documentation/hwmon/it87.rst +++ b/Documentation/hwmon/it87.rst @@ -11,6 +11,14 @@ Supported chips: =20 Datasheet: Not publicly available =20 + * IT8613E + + Prefix: 'it8613' + + Addresses scanned: from Super I/O config space (8 I/O ports) + + Datasheet: Not publicly available + * IT8620E =20 Prefix: 'it8620' diff --git a/drivers/hwmon/it87.c b/drivers/hwmon/it87.c index 4453bf3e8ef4..6a0ee13bc95f 100644 --- a/drivers/hwmon/it87.c +++ b/drivers/hwmon/it87.c @@ -333,6 +333,7 @@ struct it87_devices { #define FEAT_FOUR_TEMP BIT(22) #define FEAT_FANCTL_ONOFF BIT(23) /* chip has FAN_CTL ON/OFF */ #define FEAT_NEW_TEMPMAP BIT(24) /* PWM uses extended temp map */ +#define FEAT_11MV_ADC BIT(25) =20 static const struct it87_devices it87_devices[] =3D { [it87] =3D { @@ -552,6 +553,14 @@ static const struct it87_devices it87_devices[] =3D { [it8613] =3D { .name =3D "it8613", .model =3D "IT8613E", + .features =3D FEAT_NEWER_AUTOPWM | FEAT_11MV_ADC | FEAT_16BIT_FANS + | FEAT_TEMP_PECI | FEAT_FIVE_FANS + | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2 + | FEAT_AVCC3 | FEAT_NEW_TEMPMAP, + .num_temp_limit =3D 6, + .num_temp_offset =3D 6, + .num_temp_map =3D 6, + .peci_mask =3D 0x07, }, [it8620] =3D { .name =3D "it8620", @@ -612,6 +621,7 @@ static const struct it87_devices it87_devices[] =3D { #define has_16bit_fans(data) ((data)->features & FEAT_16BIT_FANS) #define has_12mv_adc(data) ((data)->features & FEAT_12MV_ADC) #define has_10_9mv_adc(data) ((data)->features & FEAT_10_9MV_ADC) +#define has_11mv_adc(data) ((data)->features & FEAT_11MV_ADC) #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM) #define has_old_autopwm(data) ((data)->features & FEAT_OLD_AUTOPWM) #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \ @@ -641,7 +651,8 @@ static const struct it87_devices it87_devices[] =3D { #define has_vin3_5v(data) ((data)->features & FEAT_VIN3_5V) #define has_noconf(data) ((data)->features & FEAT_NOCONF) #define has_scaling(data) ((data)->features & (FEAT_12MV_ADC | \ - FEAT_10_9MV_ADC)) + FEAT_10_9MV_ADC | \ + FEAT_11MV_ADC)) #define has_fanctl_onoff(data) ((data)->features & FEAT_FANCTL_ONOFF) #define has_new_tempmap(data) ((data)->features & FEAT_NEW_TEMPMAP) =20 @@ -748,6 +759,8 @@ static int adc_lsb(const struct it87_data *data, int nr) lsb =3D 120; else if (has_10_9mv_adc(data)) lsb =3D 109; + else if (has_11mv_adc(data)) + lsb =3D 110; else lsb =3D 160; if (data->in_scaled & BIT(nr)) @@ -3171,6 +3184,43 @@ static int __init it87_find(int sioaddr, unsigned sh= ort *address, sio_data->skip_in |=3D BIT(5); /* No VIN5 */ sio_data->skip_in |=3D BIT(6); /* No VIN6 */ =20 + sio_data->beep_pin =3D superio_inb(sioaddr, + IT87_SIO_BEEP_PIN_REG) & 0x3f; + } else if (sio_data->type =3D=3D it8613) { + int reg27, reg29, reg2a; + + superio_select(sioaddr, GPIO); + + /* Check for pwm3, fan3, pwm5, fan5 */ + reg27 =3D superio_inb(sioaddr, IT87_SIO_GPIO3_REG); + if (!(reg27 & BIT(1))) + sio_data->skip_fan |=3D BIT(4); + if (reg27 & BIT(3)) + sio_data->skip_pwm |=3D BIT(4); + if (reg27 & BIT(6)) + sio_data->skip_pwm |=3D BIT(2); + if (reg27 & BIT(7)) + sio_data->skip_fan |=3D BIT(2); + + /* Check for pwm2, fan2 */ + reg29 =3D superio_inb(sioaddr, IT87_SIO_GPIO5_REG); + if (reg29 & BIT(1)) + sio_data->skip_pwm |=3D BIT(1); + if (reg29 & BIT(2)) + sio_data->skip_fan |=3D BIT(1); + + /* Check for pwm4, fan4 */ + reg2a =3D superio_inb(sioaddr, IT87_SIO_PINX1_REG); + if (!(reg2a & BIT(0)) || (reg29 & BIT(7))) { + sio_data->skip_fan |=3D BIT(3); + sio_data->skip_pwm |=3D BIT(3); + } + + sio_data->skip_pwm |=3D BIT(0); /* No pwm1 */ + sio_data->skip_fan |=3D BIT(0); /* No fan1 */ + sio_data->skip_in |=3D BIT(3); /* No VIN3 */ + sio_data->skip_in |=3D BIT(6); /* No VIN6 */ + sio_data->beep_pin =3D superio_inb(sioaddr, IT87_SIO_BEEP_PIN_REG) & 0x3f; } else if (sio_data->type =3D=3D it8620 || sio_data->type =3D=3D it8628) { --=20 2.50.1 (Apple Git-155)