From nobody Sun Feb 8 07:08:08 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.14]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 40D3037F113; Wed, 14 Jan 2026 08:20:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.14 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768378808; cv=none; b=nh0eGTE+wwzSMLTZh4CNaKFImwLdA+hwf8SkVYZwvo+1j9nGjrew80uTsBSQvqEcHDHJIB8kXHxom+x5cRn7Apt3HYhxhPSzAb7juZ3xcc4gg23a1f/0+64FfQamH19C/LBQ/2uoLBSW588jeiBBQ0n6lZrU8j/r+KU4ViAmI3M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768378808; c=relaxed/simple; bh=GT5HmCAZ6dh6XeFOBC3Z6TVXmDJ2gi/nEihxD5w2ojA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=mAfvyM7gE7FbZd4r3EGTdTQFmgKAYu58xfI+x7dp0qEknmfx6RJYBOzz0F2hki3YYCLpMqDUecB+WOalxpNJf3rVRNw+U/qVjM26K1xDnrL98U/aE57gIwHkq4KVmFHC3IqWYKsbfpD0SyiDEEBGHkk2eEHVIXR83Kov9k09MlM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=CQdJaxf4; arc=none smtp.client-ip=198.175.65.14 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="CQdJaxf4" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1768378803; x=1799914803; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=GT5HmCAZ6dh6XeFOBC3Z6TVXmDJ2gi/nEihxD5w2ojA=; b=CQdJaxf4SXKPl/jxnI0mRD7BfLkF+H+ugoYndjydrQk5NVt8b5cWKP3H MstdAPq4GlZjmEUVJLpc4lcmU4opF0mgkGJootM3hmUh+MOpE1Ty7v5pv zziMD0K6IMAKlzhV7cxcMfTaXb9qBloIT/85qO3c4I7QPiuWh0qiPFZgh JtPbQZYRCRPF4mP0XLhSkksEhh49UsumQ8KFIqb1pr/MxvEOVO7z2I8J9 3EbwjnrivA0OQofSGhp+4jsjSKfx6xGzk4NO6yv2zzdh0ejhC+tTriyn5 EwYJ4gRw104wpDCAwGa4NwdZeDifPngxGg0AP+CPlVmJvNR3eUpWIDpCD g==; X-CSE-ConnectionGUID: L510ANHBQHSdlUQF5AUlDw== X-CSE-MsgGUID: MQYbNEplSt+S/qUE41gaow== X-IronPort-AV: E=McAfee;i="6800,10657,11670"; a="73513052" X-IronPort-AV: E=Sophos;i="6.21,225,1763452800"; d="scan'208";a="73513052" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by orvoesa106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Jan 2026 00:19:59 -0800 X-CSE-ConnectionGUID: 53hSZIwaSBGkrgH9uZNH9g== X-CSE-MsgGUID: VPSgyxmKRCq+UljWlhUcZQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,225,1763452800"; d="scan'208";a="204627059" Received: from black.igk.intel.com ([10.91.253.5]) by orviesa007.jf.intel.com with ESMTP; 14 Jan 2026 00:19:58 -0800 Received: by black.igk.intel.com (Postfix, from userid 1003) id EC98399; Wed, 14 Jan 2026 09:19:55 +0100 (CET) From: Andy Shevchenko To: Andy Shevchenko , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Andi Shyti , Mika Westerberg , Jan Dabros Subject: [PATCH v1 1/2] i2c: designware: Remove not-going-to-be-supported code for Baikal SoC Date: Wed, 14 Jan 2026 09:17:50 +0100 Message-ID: <20260114081954.252160-2-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260114081954.252160-1-andriy.shevchenko@linux.intel.com> References: <20260114081954.252160-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" As noticed in the discussion [1] the Baikal SoC and platforms are not going to be finalized, hence remove stale code. Link: https://lore.kernel.org/lkml/22b92ddf-6321-41b5-8073-f9c7064d3432@inf= radead.org/ [1] Signed-off-by: Andy Shevchenko Acked-by: Mika Westerberg --- drivers/i2c/busses/Kconfig | 1 - drivers/i2c/busses/i2c-designware-core.h | 1 - drivers/i2c/busses/i2c-designware-platdrv.c | 68 --------------------- 3 files changed, 70 deletions(-) diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index 860812e224a0..e11d50750e63 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig @@ -580,7 +580,6 @@ if I2C_DESIGNWARE_CORE config I2C_DESIGNWARE_PLATFORM tristate "Synopsys DesignWare Platform driver" depends on (ACPI && COMMON_CLK) || !ACPI - select MFD_SYSCON if MIPS_BAIKAL_T1 default I2C_DESIGNWARE_CORE help If you say yes to this option, support will be included for the diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/= i2c-designware-core.h index 2a7decc24931..cf0364079b55 100644 --- a/drivers/i2c/busses/i2c-designware-core.h +++ b/drivers/i2c/busses/i2c-designware-core.h @@ -314,7 +314,6 @@ struct dw_i2c_dev { #define ACCESS_POLLING BIT(3) =20 #define MODEL_MSCC_OCELOT BIT(8) -#define MODEL_BAIKAL_BT1 BIT(9) #define MODEL_AMD_NAVI_GPU BIT(10) #define MODEL_WANGXUN_SP BIT(11) #define MODEL_MASK GENMASK(11, 8) diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/buss= es/i2c-designware-platdrv.c index 077b34535ec7..2e532f16691b 100644 --- a/drivers/i2c/busses/i2c-designware-platdrv.c +++ b/drivers/i2c/busses/i2c-designware-platdrv.c @@ -37,70 +37,6 @@ static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *de= v) return clk_get_rate(dev->clk) / HZ_PER_KHZ; } =20 -#ifdef CONFIG_OF -#define BT1_I2C_CTL 0x100 -#define BT1_I2C_CTL_ADDR_MASK GENMASK(7, 0) -#define BT1_I2C_CTL_WR BIT(8) -#define BT1_I2C_CTL_GO BIT(31) -#define BT1_I2C_DI 0x104 -#define BT1_I2C_DO 0x108 - -static int bt1_i2c_read(void *context, unsigned int reg, unsigned int *val) -{ - struct dw_i2c_dev *dev =3D context; - int ret; - - /* - * Note these methods shouldn't ever fail because the system controller - * registers are memory mapped. We check the return value just in case. - */ - ret =3D regmap_write(dev->sysmap, BT1_I2C_CTL, - BT1_I2C_CTL_GO | (reg & BT1_I2C_CTL_ADDR_MASK)); - if (ret) - return ret; - - return regmap_read(dev->sysmap, BT1_I2C_DO, val); -} - -static int bt1_i2c_write(void *context, unsigned int reg, unsigned int val) -{ - struct dw_i2c_dev *dev =3D context; - int ret; - - ret =3D regmap_write(dev->sysmap, BT1_I2C_DI, val); - if (ret) - return ret; - - return regmap_write(dev->sysmap, BT1_I2C_CTL, - BT1_I2C_CTL_GO | BT1_I2C_CTL_WR | (reg & BT1_I2C_CTL_ADDR_MASK)); -} - -static const struct regmap_config bt1_i2c_cfg =3D { - .reg_bits =3D 32, - .val_bits =3D 32, - .reg_stride =3D 4, - .fast_io =3D true, - .reg_read =3D bt1_i2c_read, - .reg_write =3D bt1_i2c_write, - .max_register =3D DW_IC_COMP_TYPE, -}; - -static int bt1_i2c_request_regs(struct dw_i2c_dev *dev) -{ - dev->sysmap =3D syscon_node_to_regmap(dev->dev->of_node->parent); - if (IS_ERR(dev->sysmap)) - return PTR_ERR(dev->sysmap); - - dev->map =3D devm_regmap_init(dev->dev, NULL, dev, &bt1_i2c_cfg); - return PTR_ERR_OR_ZERO(dev->map); -} -#else -static int bt1_i2c_request_regs(struct dw_i2c_dev *dev) -{ - return -ENODEV; -} -#endif - static int dw_i2c_get_parent_regmap(struct dw_i2c_dev *dev) { dev->map =3D dev_get_regmap(dev->dev->parent, NULL); @@ -127,9 +63,6 @@ static int dw_i2c_plat_request_regs(struct dw_i2c_dev *d= ev) return dw_i2c_get_parent_regmap(dev); =20 switch (dev->flags & MODEL_MASK) { - case MODEL_BAIKAL_BT1: - ret =3D bt1_i2c_request_regs(dev); - break; case MODEL_WANGXUN_SP: ret =3D dw_i2c_get_parent_regmap(dev); break; @@ -334,7 +267,6 @@ static void dw_i2c_plat_remove(struct platform_device *= pdev) } =20 static const struct of_device_id dw_i2c_of_match[] =3D { - { .compatible =3D "baikal,bt1-sys-i2c", .data =3D (void *)MODEL_BAIKAL_BT= 1 }, { .compatible =3D "mscc,ocelot-i2c", .data =3D (void *)MODEL_MSCC_OCELOT = }, { .compatible =3D "snps,designware-i2c" }, {} --=20 2.50.1 From nobody Sun Feb 8 07:08:08 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B247A37C0F2; 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X-CSE-ConnectionGUID: ZvJXwFesTKmJ826l5G0fIg== X-CSE-MsgGUID: +yTtFq7SRCScklyj2mDNbQ== X-IronPort-AV: E=McAfee;i="6800,10657,11670"; a="69757981" X-IronPort-AV: E=Sophos;i="6.21,225,1763452800"; d="scan'208";a="69757981" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Jan 2026 00:19:59 -0800 X-CSE-ConnectionGUID: Peol8wtRQ4O7jkqHxL8ZGQ== X-CSE-MsgGUID: rcYNFXQ3TCikkeTzvL995A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,225,1763452800"; d="scan'208";a="204676472" Received: from black.igk.intel.com ([10.91.253.5]) by orviesa008.jf.intel.com with ESMTP; 14 Jan 2026 00:19:58 -0800 Received: by black.igk.intel.com (Postfix, from userid 1003) id F0D239B; Wed, 14 Jan 2026 09:19:55 +0100 (CET) From: Andy Shevchenko To: Andy Shevchenko , linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Andi Shyti , Mika Westerberg , Jan Dabros Subject: [PATCH v1 2/2] i2c: designware: Use device_is_compatible() instead of custom approach Date: Wed, 14 Jan 2026 09:17:51 +0100 Message-ID: <20260114081954.252160-3-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260114081954.252160-1-andriy.shevchenko@linux.intel.com> References: <20260114081954.252160-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" We use MODEL_MSCC_OCELOT effectively is a flag for comparing against "compatible" property. Use device_is_compatible() directly to make it clear. Signed-off-by: Andy Shevchenko --- drivers/i2c/busses/i2c-designware-common.c | 6 +----- drivers/i2c/busses/i2c-designware-core.h | 1 - drivers/i2c/busses/i2c-designware-platdrv.c | 2 +- 3 files changed, 2 insertions(+), 7 deletions(-) diff --git a/drivers/i2c/busses/i2c-designware-common.c b/drivers/i2c/busse= s/i2c-designware-common.c index 5b1e8f74c4ac..c766d9821975 100644 --- a/drivers/i2c/busses/i2c-designware-common.c +++ b/drivers/i2c/busses/i2c-designware-common.c @@ -238,14 +238,10 @@ static void i2c_dw_of_configure(struct device *device) struct platform_device *pdev =3D to_platform_device(device); struct dw_i2c_dev *dev =3D dev_get_drvdata(device); =20 - switch (dev->flags & MODEL_MASK) { - case MODEL_MSCC_OCELOT: + if (device_is_compatible(dev->dev, "mscc,ocelot-i2c")) { dev->ext =3D devm_platform_ioremap_resource(pdev, 1); if (!IS_ERR(dev->ext)) dev->set_sda_hold_time =3D mscc_twi_set_sda_hold_time; - break; - default: - break; } } =20 diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/= i2c-designware-core.h index cf0364079b55..10055f0e0ec3 100644 --- a/drivers/i2c/busses/i2c-designware-core.h +++ b/drivers/i2c/busses/i2c-designware-core.h @@ -313,7 +313,6 @@ struct dw_i2c_dev { #define ARBITRATION_SEMAPHORE BIT(2) #define ACCESS_POLLING BIT(3) =20 -#define MODEL_MSCC_OCELOT BIT(8) #define MODEL_AMD_NAVI_GPU BIT(10) #define MODEL_WANGXUN_SP BIT(11) #define MODEL_MASK GENMASK(11, 8) diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/buss= es/i2c-designware-platdrv.c index 2e532f16691b..4e6fe3b55322 100644 --- a/drivers/i2c/busses/i2c-designware-platdrv.c +++ b/drivers/i2c/busses/i2c-designware-platdrv.c @@ -267,7 +267,7 @@ static void dw_i2c_plat_remove(struct platform_device *= pdev) } =20 static const struct of_device_id dw_i2c_of_match[] =3D { - { .compatible =3D "mscc,ocelot-i2c", .data =3D (void *)MODEL_MSCC_OCELOT = }, + { .compatible =3D "mscc,ocelot-i2c" }, { .compatible =3D "snps,designware-i2c" }, {} }; --=20 2.50.1