From nobody Sat Feb 7 15:40:15 2026 Received: from mail-pg1-f174.google.com (mail-pg1-f174.google.com [209.85.215.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C90AB34D4E4 for ; Tue, 13 Jan 2026 17:34:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.215.174 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768325643; cv=none; b=dQtMlR4nEvF7zjup6ixYCmxHSJLvrrDWLEKefFR8OG06XlYYGBrffpP8yfxkgQM+N0BmWg9PF8M9hCvy814UollP9jxV0sgezAhQsei3au2bPjh3GKgfGywX2Ac1c551dZR9oHZMLiOWr5vWeADqMS1OD4cMNAXrk5NejmI0bHw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768325643; c=relaxed/simple; bh=eSn6OwD3SrFNXw5tP/h9H/Ii7V8Im22C2P69wloFwSM=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version:Content-Type; b=Jpg1ylLE6UtKW31iq5kmU8MstwvlbvdkgqG+VU6OBmR4IUwElQQoorv+RwfuWbEU6MKAiDB2oqaCOk1Vexh8vPgKagxFUKwwsyKqVm7Ss16hFRidLTgVF1h3D79JAH33a23FDucZ59d+j+pxqf+2nI2C2vtwaxRKNuB3h4oM6jw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=X6Z+xc5m; arc=none smtp.client-ip=209.85.215.174 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="X6Z+xc5m" Received: by mail-pg1-f174.google.com with SMTP id 41be03b00d2f7-bde0f62464cso3227512a12.2 for ; Tue, 13 Jan 2026 09:34:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1768325641; x=1768930441; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=o9AYRVJbls5kMz4af/phakvFWuIaNCCibN2SZ7D9nuU=; b=X6Z+xc5mtXg0NqS0JuUbt1276ipKGNu0R4ckTAgVXUlKTUMiBwO5lSK2x1UTTsCLDD /QIv8UUd46Dk4FI7bKy0ArpNtGt9/v4UYFj//SRFAZa7iJxZxYVXLIc1/GmFFbT3PNDK Ph9N9Z6jzPIOymVNTKo7AkHkpKN4UWa739o1NArSz3RA+r4bkLo5tpwsw7xRxPgAYEYh /AAj4H8ro7dYitL2oQJTKqd/16r6B25ymhHrrOs0hugGI7QVS0fl+qoytta50+WrkHjG za/cEWO9sds43hlDIoCealBxoDEb+3L9q33ao+CfHkoMSEL005lg5FLzTQZGEubYJ6Fg /hLg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1768325641; x=1768930441; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=o9AYRVJbls5kMz4af/phakvFWuIaNCCibN2SZ7D9nuU=; b=NEtY7GSL/zsJlZqpzD2UV63S6xj0i54dJElmQJXiZflFyl/ti5P9q1VlMoE929EpzY RV9oHBvOAILCHH1+AcbEayIrKe70b0Ec5fhzWrpZuajZzhxOGxpmLiBv3vOZeFt63+fV vGqVy95Jyn6jA2N7c+6h3jttMdNOVsmIINTqpLUZLX183cXTJvRb45qR9CXswIFpHbdZ QGz7pK9dtMgwrm9iDsqvFacsgovjihvfueCJAlXLjSmEiYeQq0PXNQd5e1dXH3nq3lPL mEZIpGakbBZeHoA40FcyKoE/OsLaKalD3pkKRLQRsATSr8Hs9nVcY3q4wDO0Ps9Y+5as Sd+A== X-Forwarded-Encrypted: i=1; AJvYcCW+gjOXsuZO+7i0rznPXT1SVQ0e8lslX3EO4TrnheRZRNTeDneuk8EWaFtHJWnuag5GML5sUk8qgbx1z8o=@vger.kernel.org X-Gm-Message-State: AOJu0YzvfvlRDPsQINoyg9KzsU8dPYM8x/E99WMFZ7BsKgAKUqz4qw9g 14Yb1Ercm79xN0Vyl4KVxwM10nTt9Dii+7e6cntKiKq6UkgODg4DByw= X-Gm-Gg: AY/fxX4dt44a7XSLzhkG3ES2whE57VNZc8BQ7VH4+WcdQ2+7CARyjpZ/QeU6Niqk8xA Fg5i56ggdJiFujiq/HWVliU6MuVNqMnGAviocpqjLzGUt3vuihLT3mLtyBIiPS9Jen9gHHaC2Gf 7JgW0UhLsrKtdOMBEdRYIFPaLj/HVN5TvMMDXsen0Use/ZzEF9D/Tgv7qY/iFJEHngF021TI+Fb PrE37GyYXzJnFf+P+oHcyvI8l7GNXxJevXfT3XG2vi1e5qJAp/CDGYw3haor7RC1X1izYrt2zgW /JeLljhg3IfKI/S8vMkZ2sfuYF+nFm/5HXK47nKmVLHPGDCEjiLTvkbC8VxyH0xaW0/z3p+oc40 V4LDJlMfb2wkhV1Ocmu3ixOYkxvDlU2FSL0VQEaDBcVK77bb5jUWuAg3Qa1b7gkN5iKrjhoDEW1 YbPTRygUToiNkxvFje9g== X-Google-Smtp-Source: AGHT+IFVIOA0i/RAZfOle5Rnk5OR3hAeebkOKtj4cj5B/mfjbUzBpEhX9pRkYTvlm8gfa3/cjIZpdw== X-Received: by 2002:a05:6a20:2450:b0:361:3bdb:26df with SMTP id adf61e73a8af0-3898f889453mr21192202637.5.1768325640779; Tue, 13 Jan 2026 09:34:00 -0800 (PST) Received: from at.. ([171.61.166.29]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-81f66f9cf38sm4568854b3a.53.2026.01.13.09.33.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 Jan 2026 09:34:00 -0800 (PST) From: Atharva Tiwari To: Cc: Atharva Tiwari , Bjorn Helgaas , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Mahesh J Salgaonkar , "Oliver O'Halloran" , Andreas Noever , Mika Westerberg , Yehezkel Bernat , Lukas Wunner , Dave Jiang , Giovanni Cabiddu , Kuppuswamy Sathyanarayanan , Feng Tang , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-usb@vger.kernel.org Subject: [PATCH RESEND v6] PCI/portdev: Disable AER for Titan Ridge 4C 2018 Date: Tue, 13 Jan 2026 17:33:41 +0000 Message-ID: <20260113173351.1417-1-atharvatiwarilinuxdev@gmail.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Disable AER for Intel Titan Ridge 4C 2018 (used in T2 iMacs, where the warnings appear) that generate continuous pcieport warnings. such as: pcieport 0000:00:1c.4: AER: Correctable error message received from 0000:07= :00.0 pcieport 0000:07:00.0: PCIe Bus Error: severity=3DCorrectable, type=3DData = Link Layer, (Receiver ID) pcieport 0000:07:00.0: device [8086:15ea] error status/mask=3D00000080/00= 002000 pcieport 0000:07:00.0: [ 7] BadDLLP macOS also disables AER for Thunderbolt devices and controllers in their dr= ivers. Closes: https://bugzilla.kernel.org/show_bug.cgi?id=3D220651 Signed-off-by: Atharva Tiwari --- Changes since v5: - Used the correct name for DMI check - Used DECLARE_PCI_FIXUP_EARLY instead of DECLARE_PCI_FIXUP_FINAL to disable aer, before the aer init function Changes since v4: - Used lowercase hex letters - Used DMI_BOARD_VENDOR instead of DMI_SYS_VENDOR Chnages since v3: - Fixed Grammer mistakes Changes since v2: - Transferred logic to arch/x86/pci/fixup.c to only target x86 - Added DMI quirk to only target Apple=C2=A0Systems Changes since v1: - Transferred logic to drivers/pci/quicks.c --- --- arch/x86/pci/fixup.c | 12 ++++++++++++ drivers/pci/pcie/aer.c | 3 +++ drivers/pci/pcie/portdrv.c | 2 +- include/linux/pci.h | 1 + 4 files changed, 17 insertions(+), 1 deletion(-) diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c index 25076a5acd96..402387e41450 100644 --- a/arch/x86/pci/fixup.c +++ b/arch/x86/pci/fixup.c @@ -1081,3 +1081,15 @@ static void quirk_tuxeo_rp_d3(struct pci_dev *pdev) } DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x1502, quirk_tuxeo_rp_d3); #endif /* CONFIG_SUSPEND */ + +#ifdef CONFIG_PCIEAER + +static void quirk_disable_aer(struct pci_dev *pdev) +{ + if (dmi_match(DMI_BOARD_VENDOR, "Apple Inc.")) + pdev->no_aer =3D 1; +} +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x15ea, quirk_disable_aer); +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x15eb, quirk_disable_aer); +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x15ec, quirk_disable_aer); +#endif /* CONFIG_PCIEAER */ diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c index e0bcaa896803..45604564ce6f 100644 --- a/drivers/pci/pcie/aer.c +++ b/drivers/pci/pcie/aer.c @@ -389,6 +389,9 @@ void pci_aer_init(struct pci_dev *dev) { int n; =20 + if (dev->no_aer) + return; + dev->aer_cap =3D pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); if (!dev->aer_cap) return; diff --git a/drivers/pci/pcie/portdrv.c b/drivers/pci/pcie/portdrv.c index 38a41ccf79b9..ab904a224296 100644 --- a/drivers/pci/pcie/portdrv.c +++ b/drivers/pci/pcie/portdrv.c @@ -240,7 +240,7 @@ static int get_port_device_capability(struct pci_dev *d= ev) if ((pci_pcie_type(dev) =3D=3D PCI_EXP_TYPE_ROOT_PORT || pci_pcie_type(dev) =3D=3D PCI_EXP_TYPE_RC_EC) && dev->aer_cap && pci_aer_available() && - (pcie_ports_native || host->native_aer)) + (pcie_ports_native || host->native_aer) && !dev->no_aer) services |=3D PCIE_PORT_SERVICE_AER; #endif =20 diff --git a/include/linux/pci.h b/include/linux/pci.h index 864775651c6f..f447f86c6bdf 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -440,6 +440,7 @@ struct pci_dev { unsigned int multifunction:1; /* Multi-function device */ =20 unsigned int is_busmaster:1; /* Is busmaster */ + unsigned int no_aer:1; /* May not use AER */ unsigned int no_msi:1; /* May not use MSI */ unsigned int no_64bit_msi:1; /* May only use 32-bit MSIs */ unsigned int block_cfg_access:1; /* Config space access blocked */ --=20 2.43.0