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Tue, 13 Jan 2026 04:53:18 -0800 (PST) From: Biju X-Google-Original-From: Biju To: Thomas Gleixner Cc: Biju Das , Fabrizio Castro , linux-kernel@vger.kernel.org, Geert Uytterhoeven , Prabhakar Mahadev Lad , Biju Das , linux-renesas-soc@vger.kernel.org, stable@vger.kernel.org Subject: [PATCH 1/2] irqchip/renesas-rzv2h: Prevent TINT spurious interrupt during resume Date: Tue, 13 Jan 2026 12:53:11 +0000 Message-ID: <20260113125315.359967-2-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260113125315.359967-1-biju.das.jz@bp.renesas.com> References: <20260113125315.359967-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Biju Das A glitch in the edge detection circuit can cause a spurious interrupt. The hardware manual recommends clearing the status flag after setting the ICU_TSSRk register as a countermeasure. Currently, a spurious IRQ is generated on the resume path of s2idle for the PMIC RTC TINT interrupt due to a glitch related to unnecessary enabling/disabling of the TINT enable bit. Fix this issue by not setting TSSR(TINT Source) and TITSR(TINT Detection Method Selection) registers if the values are the same as those set in these registers. Fixes: 0d7605e75ac2 ("irqchip: Add RZ/V2H(P) Interrupt Control Unit (ICU) d= river") Cc: stable@vger.kernel.org Signed-off-by: Biju Das --- drivers/irqchip/irq-renesas-rzv2h.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/irqchip/irq-renesas-rzv2h.c b/drivers/irqchip/irq-rene= sas-rzv2h.c index 0c44b6109842..9b4565375e83 100644 --- a/drivers/irqchip/irq-renesas-rzv2h.c +++ b/drivers/irqchip/irq-renesas-rzv2h.c @@ -328,6 +328,7 @@ static int rzv2h_tint_set_type(struct irq_data *d, unsi= gned int type) u32 titsr, titsr_k, titsel_n, tien; struct rzv2h_icu_priv *priv; u32 tssr, tssr_k, tssel_n; + u32 titsr_cur, tssr_cur; unsigned int hwirq; u32 tint, sense; int tint_nr; @@ -376,12 +377,18 @@ static int rzv2h_tint_set_type(struct irq_data *d, un= signed int type) guard(raw_spinlock)(&priv->lock); =20 tssr =3D readl_relaxed(priv->base + priv->info->t_offs + ICU_TSSR(tssr_k)= ); + titsr =3D readl_relaxed(priv->base + priv->info->t_offs + ICU_TITSR(titsr= _k)); + + tssr_cur =3D field_get(ICU_TSSR_TSSEL_MASK(tssel_n, priv->info->field_wid= th), tssr); + titsr_cur =3D field_get(ICU_TITSR_TITSEL_MASK(titsel_n), titsr); + if (tssr_cur =3D=3D tint && titsr_cur =3D=3D sense) + return 0; + tssr &=3D ~(ICU_TSSR_TSSEL_MASK(tssel_n, priv->info->field_width) | tien); tssr |=3D ICU_TSSR_TSSEL_PREP(tint, tssel_n, priv->info->field_width); =20 writel_relaxed(tssr, priv->base + priv->info->t_offs + ICU_TSSR(tssr_k)); =20 - titsr =3D readl_relaxed(priv->base + priv->info->t_offs + ICU_TITSR(titsr= _k)); titsr &=3D ~ICU_TITSR_TITSEL_MASK(titsel_n); titsr |=3D ICU_TITSR_TITSEL_PREP(sense, titsel_n); =20 --=20 2.43.0 From nobody Mon Feb 9 08:12:25 2026 Received: from mail-wm1-f41.google.com (mail-wm1-f41.google.com [209.85.128.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 69A5738F923 for ; Tue, 13 Jan 2026 12:53:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Tue, 13 Jan 2026 04:53:18 -0800 (PST) Received: from biju.lan ([2a00:23c4:a758:8a01:6e35:f12b:dc2b:8e25]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-47d7f4184cbsm423744265e9.6.2026.01.13.04.53.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 Jan 2026 04:53:18 -0800 (PST) From: Biju X-Google-Original-From: Biju To: Thomas Gleixner Cc: Biju Das , Fabrizio Castro , linux-kernel@vger.kernel.org, Geert Uytterhoeven , Prabhakar Mahadev Lad , Biju Das , linux-renesas-soc@vger.kernel.org Subject: [PATCH 2/2] irqchip/renesas-rzv2h: Add suspend/resume support Date: Tue, 13 Jan 2026 12:53:12 +0000 Message-ID: <20260113125315.359967-3-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260113125315.359967-1-biju.das.jz@bp.renesas.com> References: <20260113125315.359967-1-biju.das.jz@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Biju Das On RZ/G3E using PSCI, s2ram powers down the SoC. Add suspend/resume callbacks to restore IRQ type for NMI, TINT and external IRQ interrupts. Signed-off-by: Biju Das --- drivers/irqchip/irq-renesas-rzv2h.c | 60 +++++++++++++++++++++++++++-- 1 file changed, 57 insertions(+), 3 deletions(-) diff --git a/drivers/irqchip/irq-renesas-rzv2h.c b/drivers/irqchip/irq-rene= sas-rzv2h.c index 9b4565375e83..6fc9e96d3169 100644 --- a/drivers/irqchip/irq-renesas-rzv2h.c +++ b/drivers/irqchip/irq-renesas-rzv2h.c @@ -20,6 +20,7 @@ #include #include #include +#include =20 /* DT "interrupts" indexes */ #define ICU_IRQ_START 1 @@ -89,6 +90,18 @@ #define ICU_RZG3E_TSSEL_MAX_VAL 0x8c #define ICU_RZV2H_TSSEL_MAX_VAL 0x55 =20 +/** + * struct rzv2h_irqc_reg_cache - registers cache (necessary for suspend/re= sume) + * @nitsr: ICU_NITSR register + * @iitsr: ICU_IITSR register + * @titsr: ICU_TITSR registers + */ +struct rzv2h_irqc_reg_cache { + u32 nitsr; + u32 iitsr; + u32 titsr[2]; +}; + /** * struct rzv2h_hw_info - Interrupt Control Unit controller hardware info = structure. * @tssel_lut: TINT lookup table @@ -118,13 +131,15 @@ struct rzv2h_hw_info { * @fwspec: IRQ firmware specific data * @lock: Lock to serialize access to hardware registers * @info: Pointer to struct rzv2h_hw_info + * @cache: Registers cache for suspend/resume */ -struct rzv2h_icu_priv { +static struct rzv2h_icu_priv { void __iomem *base; struct irq_fwspec fwspec[ICU_NUM_IRQ]; raw_spinlock_t lock; const struct rzv2h_hw_info *info; -}; + struct rzv2h_irqc_reg_cache cache; +} *rzv2h_icu_data; =20 void rzv2h_icu_register_dma_req(struct platform_device *icu_dev, u8 dmac_i= ndex, u8 dmac_channel, u16 req_no) @@ -419,6 +434,44 @@ static int rzv2h_icu_set_type(struct irq_data *d, unsi= gned int type) return irq_chip_set_type_parent(d, IRQ_TYPE_LEVEL_HIGH); } =20 +static int rzv2h_irqc_irq_suspend(void *data) +{ + struct rzv2h_irqc_reg_cache *cache =3D &rzv2h_icu_data->cache; + void __iomem *base =3D rzv2h_icu_data->base; + + cache->nitsr =3D readl_relaxed(base + ICU_NITSR); + cache->iitsr =3D readl_relaxed(base + ICU_IITSR); + for (u8 i =3D 0; i < 2; i++) + cache->titsr[i] =3D readl_relaxed(base + rzv2h_icu_data->info->t_offs + = ICU_TITSR(i)); + + return 0; +} + +static void rzv2h_irqc_irq_resume(void *data) +{ + struct rzv2h_irqc_reg_cache *cache =3D &rzv2h_icu_data->cache; + void __iomem *base =3D rzv2h_icu_data->base; + + /* + * Restore only interrupt type. TSSRx will be restored at the + * request of pin controller to avoid spurious interrupts due + * to invalid PIN states. + */ + for (u8 i =3D 0; i < 2; i++) + writel_relaxed(cache->titsr[i], base + rzv2h_icu_data->info->t_offs + IC= U_TITSR(i)); + writel_relaxed(cache->iitsr, base + ICU_IITSR); + writel_relaxed(cache->nitsr, base + ICU_NITSR); +} + +static const struct syscore_ops rzv2h_irqc_syscore_ops =3D { + .suspend =3D rzv2h_irqc_irq_suspend, + .resume =3D rzv2h_irqc_irq_resume, +}; + +static struct syscore rzv2h_irqc_syscore =3D { + .ops =3D &rzv2h_irqc_syscore_ops, +}; + static const struct irq_chip rzv2h_icu_chip =3D { .name =3D "rzv2h-icu", .irq_eoi =3D rzv2h_icu_eoi, @@ -502,7 +555,6 @@ static int rzv2h_icu_probe_common(struct platform_devic= e *pdev, struct device_no { struct irq_domain *irq_domain, *parent_domain; struct device_node *node =3D pdev->dev.of_node; - struct rzv2h_icu_priv *rzv2h_icu_data; struct reset_control *resetn; int ret; =20 @@ -560,6 +612,8 @@ static int rzv2h_icu_probe_common(struct platform_devic= e *pdev, struct device_no =20 rzv2h_icu_data->info =3D hw_info; =20 + register_syscore(&rzv2h_irqc_syscore); + /* * coccicheck complains about a missing put_device call before returning,= but it's a false * positive. We still need &pdev->dev after successfully returning from t= his function. --=20 2.43.0