From nobody Sat Feb 7 08:44:59 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A502A241690; Tue, 13 Jan 2026 22:12:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768342327; cv=none; b=LDjy/j0HNPZ0vywLFQCllrsw5icLb34gHsgF4SAaO5/Uw7gFo2qAXCzD0lv79ER4oYC1burtnUJEEJv4anXm6gOQh+CicOTR7lpbbP4okkzcRSyXV7Gqe/0Bo/Dh61eaNbE5aTnlFw79dEesrxGT7lRgMi2y3ChxY/5awSyJH8Y= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768342327; c=relaxed/simple; bh=z9Z05zc/VWYsbYT8EM5TL2vypSw4nX+Y7bZcGHAZZrM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=aRNrlsxWENSDzorcG311LF+pIZkJHttfytPxaIn9w9ncwaz7xAkjTnvXuDUTcxtXXtJt7mkU40kvh/9T2XafC8j5JycIp7+fPfc//u5iZCGP7z7ngsUvBnTeH6ayizODQWMKcZZWDv9Zht0bjBN2jOrTZv8Ia7eawb0xmD74hdE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=iLa9WMRa; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="iLa9WMRa" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E8D60C16AAE; Tue, 13 Jan 2026 22:12:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1768342325; bh=z9Z05zc/VWYsbYT8EM5TL2vypSw4nX+Y7bZcGHAZZrM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=iLa9WMRa0BI5mFgcBhKgbGqCqCyqiwiJ/6PFb+vhdT0ADLaybSrsgmuXzXWpPEIHO heA+m6ymnnOLn9ve0MBQk+F4gzAhZmf4w1jOmPl6lJ2xl61L2WXVT42ytZemRdHAm1 MODsE1aLcKOESSF62wbUyMFPRLvGTQ99RvGXc8cHtrSk+jfRLiSzY3buGGGmfFjVcq C6bsQ86ydXweYz0f1JNZtc97D/ZBHO2QF5aI6FVxfnNYhRUpDNUa0HIYoWSAbDyKzP 4llQnjdLBP4xEABt+SUP8gtsbotKPFjCXGgLBlWcPLm+qSPfo1qUrJfC1c/fO6nHBW kdyMR7SN+84xg== From: Conor Dooley To: linux-kernel@vger.kernel.org Cc: conor@kernel.org, Conor Dooley , Daire McNamara , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Claudiu Beznea , linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v3 1/3] clk: microchip: drop POLARFIRE from ARCH_MICROCHIP_POLARFIRE Date: Tue, 13 Jan 2026 22:11:45 +0000 Message-ID: <20260113-doing-surplus-dc45866f71d4@spud> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260113-snagged-blemish-52af3d00d88e@spud> References: <20260113-snagged-blemish-52af3d00d88e@spud> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=853; i=conor.dooley@microchip.com; h=from:subject:message-id; bh=FjTWJC1wwS572Ik3G363c372pfHUYilsmPiBl9AksjM=; b=owGbwMvMwCVWscWwfUFT0iXG02pJDJlph9UKVaf39veueVPBdfJ7xK4LS37bOJ3V2efFVGIeH LDNq/J0RwkLgxgXg6yYIkvi7b4WqfV/XHY497yFmcPKBDKEgYtTACYStZHhx1PL3/oqT4KWP9g/ 6/0RH4m5oVHX9nwUOxttmzj1MbOmOiPD/KrzVZG+q5W7HnJ9/Jt5QVpKKH/ZxEvrcrXLZR7p+Mz mBQA= X-Developer-Key: i=conor.dooley@microchip.com; a=openpgp; fpr=F9ECA03CF54F12CD01F1655722E2C55B37CF380C Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Conor Dooley This driver is used by non-polarfire devices now, and the ARCH_MICROCHIP symbol has been defined for some time on RISCV so drop it without any functional change. Signed-off-by: Conor Dooley --- drivers/clk/microchip/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/microchip/Kconfig b/drivers/clk/microchip/Kconfig index 1b9e43eb5497..0c03b14699bf 100644 --- a/drivers/clk/microchip/Kconfig +++ b/drivers/clk/microchip/Kconfig @@ -5,8 +5,8 @@ config COMMON_CLK_PIC32 =20 config MCHP_CLK_MPFS bool "Clk driver for PolarFire SoC" - depends on ARCH_MICROCHIP_POLARFIRE || COMPILE_TEST - default ARCH_MICROCHIP_POLARFIRE + depends on ARCH_MICROCHIP || COMPILE_TEST + default y depends on MFD_SYSCON select AUXILIARY_BUS select REGMAP_MMIO --=20 2.51.0 From nobody Sat Feb 7 08:44:59 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 47934354AC7; Tue, 13 Jan 2026 22:12:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Tue, 13 Jan 2026 22:12:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1768342328; bh=hhOL3Ebuv8HCu7aFlXPxRjmRk8hM7W0i6or4f1TWUtw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mro7RMswWNzVyH+/XdlrD54TiCu+5sASSEfsPTgeDoI+wRdDE0JL6HJDGL/rqfkFt w6dRRyAYyoVB/RUp1VGxKYH6dHJIMUW8fusKVebBIQGqN3LOXJ5bUyl5/a2bmEAz8F CMFfF95FO650X/I6JMatPOqLtRPwrc0tgkf6KPc9TPoz4GxojnBw0eXHWhWlYn9vTb A9OahDAVZ0X5YWb23xzZlYkGR4HkpAwVSdCS949kdbcUxB3+wEIHcJMJnCQ7jSOh5t ZWN1YtlcM8Bw1Dy4AH2uvHNeqZcWrbASITp1kHZrYwPIuLHPqlG9Ywlds4SLhHDhb0 JAe0KtCnu74lg== From: Conor Dooley To: linux-kernel@vger.kernel.org Cc: conor@kernel.org, Conor Dooley , Daire McNamara , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Claudiu Beznea , linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, Pierre-Henry Moussay Subject: [PATCH v3 2/3] dt-bindings: clock: mpfs-ccc: Add pic64gx compatibility Date: Tue, 13 Jan 2026 22:11:46 +0000 Message-ID: <20260113-guise-conceded-88030697b831@spud> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260113-snagged-blemish-52af3d00d88e@spud> References: <20260113-snagged-blemish-52af3d00d88e@spud> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1114; i=conor.dooley@microchip.com; h=from:subject:message-id; bh=Z6twspJZK67KIShOCoO30te6Ga2fX6fNsTohld1qusQ=; b=owGbwMvMwCVWscWwfUFT0iXG02pJDJlph9WzZwpa/heOv37H891523KfKjZh5QQmZs3bDDOMM vZJ/XnbUcrCIMbFICumyJJ4u69Fav0flx3OPW9h5rAygQxh4OIUgInYczEyPI9xnn2sxPZQ3Eop +TS9j6GT7fqqXqU6/buYIvmqm8t6BcP/WqmNkrU3GKrvBimlrFZ5bPxcdeuzmVIHWleLBXb2+X5 hBgA= X-Developer-Key: i=conor.dooley@microchip.com; a=openpgp; fpr=F9ECA03CF54F12CD01F1655722E2C55B37CF380C Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Pierre-Henry Moussay pic64gx SoC Clock Conditioning Circuitry is compatibles with the Polarfire SoC Signed-off-by: Pierre-Henry Moussay Acked-by: Conor Dooley Reviewed-by: Claudiu Beznea Acked-by: Rob Herring (Arm) Signed-off-by: Conor Dooley --- .../devicetree/bindings/clock/microchip,mpfs-ccc.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yam= l b/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml index f1770360798f..9a6b50527c42 100644 --- a/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml +++ b/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml @@ -17,7 +17,11 @@ description: | =20 properties: compatible: - const: microchip,mpfs-ccc + oneOf: + - items: + - const: microchip,pic64gx-ccc + - const: microchip,mpfs-ccc + - const: microchip,mpfs-ccc =20 reg: items: --=20 2.51.0 From nobody Sat Feb 7 08:44:59 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 40A44352F98; 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dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ckhfq/su" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 81689C116C6; Tue, 13 Jan 2026 22:12:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1768342331; bh=28SFQN8Tnumdev8ylgHSFbtz98QUFPG1RsovO8KRHrE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ckhfq/suIKuhvaMuOr780x/hkTKkcGahNklE+Tr1T6YGG9oi7RpP+4esk/EI7tx93 QECxZEXR+th+48q2IV7UMsYRuIDeAhh5x3d020i/9AeA8fICKHicO212HYVVv0YIqI 5SFy829TBOT2hKZIM37JngyOyyHSFK3YyJd5DQ34OcIKHMVfTYhEYYTONeTxJcReDK b1LjmVughVgH7w7POgNaJMnfi9k+lW/zqpWojftXYxWMYKeHsZBcymGX/+7OUTc/wQ 63NKLrBxKWmX/7vidKEriZgQHLrceTIMW0yAk22fGDnjzmWMZ82YrT914C76jHHLK0 /Xjdlf/izYsgQ== From: Conor Dooley To: linux-kernel@vger.kernel.org Cc: conor@kernel.org, Conor Dooley , Daire McNamara , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Claudiu Beznea , linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, Pierre-Henry Moussay , Krzysztof Kozlowski Subject: [PATCH v3 3/3] dt-bindings: clock: mpfs-clkcfg: Add pic64gx compatibility Date: Tue, 13 Jan 2026 22:11:47 +0000 Message-ID: <20260113-glue-justifier-566ffab2ffd3@spud> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260113-snagged-blemish-52af3d00d88e@spud> References: <20260113-snagged-blemish-52af3d00d88e@spud> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1501; i=conor.dooley@microchip.com; h=from:subject:message-id; bh=2bDhTZLUYJ0LPw3YfkkGQ1+HBQ8bn68ICCZRyZt/Obw=; b=owGbwMvMwCVWscWwfUFT0iXG02pJDJlph9V76l4sco0wN/9lWFc8b7v8FgPLz81zs5WiUx59X 9DZu6++o5SFQYyLQVZMkSXxdl+L1Po/Ljuce97CzGFlAhnCwMUpABMxDWP4K5x28LrNFyPdFS/b 2OLDAu9o75zuuX6TS0ho/LMdVoZMsgz/M/VZznJtKj1+faqk3vfy2ZH12iq95jW8VwV3L2LzUHr FBgA= X-Developer-Key: i=conor.dooley@microchip.com; a=openpgp; fpr=F9ECA03CF54F12CD01F1655722E2C55B37CF380C Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Pierre-Henry Moussay pic64gx has a clock controller compatible with mpfs-clkcfg. Don't permit the deprecated configuration that was never supported for this SoC. Signed-off-by: Pierre-Henry Moussay Co-developed-by: Conor Dooley Acked-by: Krzysztof Kozlowski Reviewed-by: Claudiu Beznea Signed-off-by: Conor Dooley --- .../bindings/clock/microchip,mpfs-clkcfg.yaml | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.= yaml b/Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml index ee4f31596d97..a23703c281d1 100644 --- a/Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml +++ b/Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml @@ -19,7 +19,11 @@ description: | =20 properties: compatible: - const: microchip,mpfs-clkcfg + oneOf: + - items: + - const: microchip,pic64gx-clkcfg + - const: microchip,mpfs-clkcfg + - const: microchip,mpfs-clkcfg =20 reg: oneOf: @@ -69,6 +73,16 @@ required: - clocks - '#clock-cells' =20 +if: + properties: + compatible: + contains: + const: microchip,pic64gx-clkcfg +then: + properties: + reg: + maxItems: 1 + additionalProperties: false =20 examples: --=20 2.51.0