From nobody Mon Feb 9 19:38:00 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 379C437B405 for ; Mon, 12 Jan 2026 17:03:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768237404; cv=none; b=dVEWhZktQnREFwqPKhDrW/rhLh4ThXjY/EaNou3N8E9cJm/ql07fZpbmR6AfEeo9HVOVVZjKT/l/Rd5IsOW8ot31hLZMss0B5VAbaeGuz0c/uPbqXJpxxMovBtsOYcAiHVQaKqIbUoimTfuOBd+QO+xAUDwr2tXkg3aLB6zkI9A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768237404; c=relaxed/simple; bh=+elwpVIWD19PeLqVO4oeXE496/P9r/BlAMmxdNofKSg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=UMOLcqzjpdCK8MbQrWxUjdQDtkJ6JmfiGH2jc7O5Vmt68p3iu3WiOHBl95xY28D4dzFfSqpiJAs0iq4zyxRx2f7s+N2IpnI5QYqeZHCAwdA3yTnObFC8UDY9yfYwhMZab+hBBRORj/bAWKeCMFoMKegRotmVyKNr3ckMZGiu/tQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id ECEAD153B; Mon, 12 Jan 2026 09:03:11 -0800 (PST) Received: from e134344.cambridge.arm.com (e134344.arm.com [10.1.196.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 8F48E3F694; Mon, 12 Jan 2026 09:03:13 -0800 (PST) From: Ben Horgan To: ben.horgan@arm.com Cc: amitsinght@marvell.com, baisheng.gao@unisoc.com, baolin.wang@linux.alibaba.com, carl@os.amperecomputing.com, dave.martin@arm.com, david@kernel.org, dfustini@baylibre.com, fenghuay@nvidia.com, gshan@redhat.com, james.morse@arm.com, jonathan.cameron@huawei.com, kobak@nvidia.com, lcherian@marvell.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, peternewman@google.com, punit.agrawal@oss.qualcomm.com, quic_jiles@quicinc.com, reinette.chatre@intel.com, rohit.mathew@arm.com, scott@os.amperecomputing.com, sdonthineni@nvidia.com, tan.shaopeng@fujitsu.com, xhao@linux.alibaba.com, catalin.marinas@arm.com, will@kernel.org, corbet@lwn.net, maz@kernel.org, oupton@kernel.org, joey.gouly@arm.com, suzuki.poulose@arm.com, kvmarm@lists.linux.dev Subject: [PATCH v3 38/47] arm_mpam: resctrl: Add empty definitions for assorted resctrl functions Date: Mon, 12 Jan 2026 16:59:05 +0000 Message-ID: <20260112165914.4086692-39-ben.horgan@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260112165914.4086692-1-ben.horgan@arm.com> References: <20260112165914.4086692-1-ben.horgan@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: James Morse A few resctrl features and hooks need to be provided, but aren't needed or supported on MPAM platforms. resctrl has individual hooks to separately enable and disable the closid/partid and rmid/pmg context switching code. For MPAM this is all the same thing, as the value in struct task_struct is used to cache the value that should be written to hardware. arm64's context switching code is enabled once MPAM is usable, but doesn't touch the hardware unless the value has changed. For now event configuration is not supported, and can be turned off by returning 'false' from resctrl_arch_is_evt_configurable(). The new io_alloc feature is not supported either, always return false from the enable helper to indicate and fail the enable. Add this, and empty definitions for the other hooks. Reviewed-by: Jonathan Cameron Signed-off-by: James Morse Signed-off-by: Ben Horgan --- drivers/resctrl/mpam_resctrl.c | 27 +++++++++++++++++++++++++++ include/linux/arm_mpam.h | 9 +++++++++ 2 files changed, 36 insertions(+) diff --git a/drivers/resctrl/mpam_resctrl.c b/drivers/resctrl/mpam_resctrl.c index a6be3ce84241..8e2fea2e51d3 100644 --- a/drivers/resctrl/mpam_resctrl.c +++ b/drivers/resctrl/mpam_resctrl.c @@ -103,6 +103,23 @@ bool resctrl_arch_mon_capable(void) return exposed_mon_capable; } =20 +bool resctrl_arch_is_evt_configurable(enum resctrl_event_id evt) +{ + return false; +} + +void resctrl_arch_mon_event_config_read(void *info) +{ +} + +void resctrl_arch_mon_event_config_write(void *info) +{ +} + +void resctrl_arch_reset_rmid_all(struct rdt_resource *r, struct rdt_mon_do= main *d) +{ +} + bool resctrl_arch_get_cdp_enabled(enum resctrl_res_level rid) { switch (rid) { @@ -1129,6 +1146,16 @@ int resctrl_arch_mbm_cntr_assign_set(struct rdt_reso= urce *r, bool enable) return -EINVAL; } =20 +int resctrl_arch_io_alloc_enable(struct rdt_resource *r, bool enable) +{ + return -EOPNOTSUPP; +} + +bool resctrl_arch_get_io_alloc_enabled(struct rdt_resource *r) +{ + return false; +} + static int mpam_resctrl_control_init(struct mpam_resctrl_res *res) { struct mpam_class *class =3D res->class; diff --git a/include/linux/arm_mpam.h b/include/linux/arm_mpam.h index 86d5e326d2bd..f92a36187a52 100644 --- a/include/linux/arm_mpam.h +++ b/include/linux/arm_mpam.h @@ -67,6 +67,15 @@ struct rdt_resource; void *resctrl_arch_mon_ctx_alloc(struct rdt_resource *r, enum resctrl_even= t_id evtid); void resctrl_arch_mon_ctx_free(struct rdt_resource *r, enum resctrl_event_= id evtid, void *ctx); =20 +/* + * The CPU configuration for MPAM is cheap to write, and is only written i= f it + * has changed. No need for fine grained enables. + */ +static inline void resctrl_arch_enable_mon(void) { } +static inline void resctrl_arch_disable_mon(void) { } +static inline void resctrl_arch_enable_alloc(void) { } +static inline void resctrl_arch_disable_alloc(void) { } + static inline unsigned int resctrl_arch_round_mon_val(unsigned int val) { return val; --=20 2.43.0