From nobody Mon Feb 9 20:59:34 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 6FCB6379962 for ; Mon, 12 Jan 2026 17:02:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768237337; cv=none; b=exeoUpNx2wuOxI8BgOUav7uvPS8pRVWD8XfvsFE9B6LuidN2rR9714F46HZJFt4UNEWjb+F8KIssvdqPWKojWJKsjInZprnieBuoHzBOLO6PUQK8MxHTZ9GRYKZ7p5uBwPqmTINWqfmxFmYx19tMnQKz3ny86D/BSbd3PjJxW6E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768237337; c=relaxed/simple; bh=Gn4VoHl8oLD79m2frVjhCmEUM5uS1TNpkx8fZ5FMwt8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=UDOWFk8bAGoWfdSkQxh4TxkwBN1VtJscVasA29lVm/Cu2bOdB+iYRcwjVgoDfppN38WbEzjGvemdcMew7s3+fRCelPdx21OhAmVFSuiP6mic28HGNpuskKQmUVjuvjg8orJgNHsP+SQiw/Pjfj7l9zlx938Rkq7RsZyIIf56QVM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3BF431596; Mon, 12 Jan 2026 09:02:06 -0800 (PST) Received: from e134344.cambridge.arm.com (e134344.arm.com [10.1.196.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id D23A23F694; Mon, 12 Jan 2026 09:02:07 -0800 (PST) From: Ben Horgan To: ben.horgan@arm.com Cc: amitsinght@marvell.com, baisheng.gao@unisoc.com, baolin.wang@linux.alibaba.com, carl@os.amperecomputing.com, dave.martin@arm.com, david@kernel.org, dfustini@baylibre.com, fenghuay@nvidia.com, gshan@redhat.com, james.morse@arm.com, jonathan.cameron@huawei.com, kobak@nvidia.com, lcherian@marvell.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, peternewman@google.com, punit.agrawal@oss.qualcomm.com, quic_jiles@quicinc.com, reinette.chatre@intel.com, rohit.mathew@arm.com, scott@os.amperecomputing.com, sdonthineni@nvidia.com, tan.shaopeng@fujitsu.com, xhao@linux.alibaba.com, catalin.marinas@arm.com, will@kernel.org, corbet@lwn.net, maz@kernel.org, oupton@kernel.org, joey.gouly@arm.com, suzuki.poulose@arm.com, kvmarm@lists.linux.dev Subject: [PATCH v3 26/47] arm_mpam: resctrl: Wait for cacheinfo to be ready Date: Mon, 12 Jan 2026 16:58:53 +0000 Message-ID: <20260112165914.4086692-27-ben.horgan@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260112165914.4086692-1-ben.horgan@arm.com> References: <20260112165914.4086692-1-ben.horgan@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In order to calculate the rmid realloc threshold the size of the cache needs to be known. Cache domains will also be named after the cache id. So that this information can be extracted from cacheinfo we need to wait for it to be ready. The cacheinfo information is populated in device_initcall() so we wait for that. Signed-off-by: James Morse [horgan: split out from another patch] Signed-off-by: Ben Horgan Reviewed-by: Jonathan Cameron --- This is moved into it's own patch to allow all uses of cacheinfo to be valid when they are introduced. --- drivers/resctrl/mpam_resctrl.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/resctrl/mpam_resctrl.c b/drivers/resctrl/mpam_resctrl.c index 92b2a2d4b51d..3ca977527698 100644 --- a/drivers/resctrl/mpam_resctrl.c +++ b/drivers/resctrl/mpam_resctrl.c @@ -16,6 +16,7 @@ #include #include #include +#include =20 #include =20 @@ -45,6 +46,13 @@ static bool exposed_mon_capable; */ static bool cdp_enabled; =20 +/* + * We use cacheinfo to discover the size of the caches and their id. cache= info + * populates this from a device_initcall(). mpam_resctrl_setup() must wait. + */ +static bool cacheinfo_ready; +static DECLARE_WAIT_QUEUE_HEAD(wait_cacheinfo_ready); + bool resctrl_arch_alloc_capable(void) { return exposed_alloc_capable; @@ -745,6 +753,8 @@ int mpam_resctrl_setup(void) struct mpam_resctrl_res *res; enum resctrl_res_level rid; =20 + wait_event(wait_cacheinfo_ready, cacheinfo_ready); + cpus_read_lock(); for_each_mpam_resctrl_control(res, rid) { INIT_LIST_HEAD_RCU(&res->resctrl_res.ctrl_domains); @@ -784,6 +794,15 @@ int mpam_resctrl_setup(void) return 0; } =20 +static int __init __cacheinfo_ready(void) +{ + cacheinfo_ready =3D true; + wake_up(&wait_cacheinfo_ready); + + return 0; +} +device_initcall_sync(__cacheinfo_ready); + #ifdef CONFIG_MPAM_KUNIT_TEST #include "test_mpam_resctrl.c" #endif --=20 2.43.0