From nobody Tue Feb 10 04:02:36 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 5011B376BCB for ; Mon, 12 Jan 2026 17:00:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768237253; cv=none; b=Os2pDmDZSAZrV/h0aDB1ybP0hXK2IYMejshK8WYPlaxOk1s7m4Hq87lJtvXoJvl7nYkJsh1xmh++zte/+nSKfcG4Aq2gNM9BxBeQ/v4+aFfck22MWDKwvu5fUb1DijGcmwB3HkhAWsA94yH9SFsUzz/TSrFtdcGrv65fGN+pJo8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768237253; c=relaxed/simple; bh=HqG8agNoHiCm7JtYmDR6pGTG40xW7D+3RJZ5pNK2rM8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=XVObnSisTXZ7dc7PNfXsmdbQACoV2CUwmKyhmX91/T1lSwLjgtIWyYcEx74tezwipy0GpI3jV28oJaLzBLdts83K3V9y9RVSuZdz+VViamnBJkCmH/COBsZPR65l78BwrY8P+PGCe6MMWRoZVE+2irlrAW1PDm24u++QUMrOM60= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0DED415A1; Mon, 12 Jan 2026 09:00:44 -0800 (PST) Received: from e134344.cambridge.arm.com (e134344.arm.com [10.1.196.46]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 7BFEA3F694; Mon, 12 Jan 2026 09:00:45 -0800 (PST) From: Ben Horgan To: ben.horgan@arm.com Cc: amitsinght@marvell.com, baisheng.gao@unisoc.com, baolin.wang@linux.alibaba.com, carl@os.amperecomputing.com, dave.martin@arm.com, david@kernel.org, dfustini@baylibre.com, fenghuay@nvidia.com, gshan@redhat.com, james.morse@arm.com, jonathan.cameron@huawei.com, kobak@nvidia.com, lcherian@marvell.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, peternewman@google.com, punit.agrawal@oss.qualcomm.com, quic_jiles@quicinc.com, reinette.chatre@intel.com, rohit.mathew@arm.com, scott@os.amperecomputing.com, sdonthineni@nvidia.com, tan.shaopeng@fujitsu.com, xhao@linux.alibaba.com, catalin.marinas@arm.com, will@kernel.org, corbet@lwn.net, maz@kernel.org, oupton@kernel.org, joey.gouly@arm.com, suzuki.poulose@arm.com, kvmarm@lists.linux.dev, Dave Martin Subject: [PATCH v3 11/47] arm64: mpam: Add helpers to change a task or cpu's MPAM PARTID/PMG values Date: Mon, 12 Jan 2026 16:58:38 +0000 Message-ID: <20260112165914.4086692-12-ben.horgan@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260112165914.4086692-1-ben.horgan@arm.com> References: <20260112165914.4086692-1-ben.horgan@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: James Morse Care must be taken when modifying the PARTID and PMG of a task in any per-task structure as writing these values may race with the task being scheduled in, and reading the modified values. Add helpers to set the task properties, and the CPU default value. These use WRITE_ONCE() that pairs with the READ_ONCE() in mpam_get_regval() to avoid causing torn values. CC: Dave Martin Reviewed-by: Jonathan Cameron Signed-off-by: James Morse Signed-off-by: Ben Horgan --- Changes since rfc: Keep comment attached to mpam_get_regval() Add internal helper, __mpam_regval() (Jonathan) --- arch/arm64/include/asm/mpam.h | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm64/include/asm/mpam.h b/arch/arm64/include/asm/mpam.h index 7b3d3abad162..c9b73f1af7ce 100644 --- a/arch/arm64/include/asm/mpam.h +++ b/arch/arm64/include/asm/mpam.h @@ -4,6 +4,7 @@ #ifndef __ASM__MPAM_H #define __ASM__MPAM_H =20 +#include #include #include #include @@ -22,6 +23,22 @@ DECLARE_PER_CPU(u64, arm64_mpam_current); */ extern u64 arm64_mpam_global_default; =20 +static inline u64 __mpam_regval(u16 partid_d, u16 partid_i, u8 pmg_d, u8 p= mg_i) +{ + return FIELD_PREP(MPAM0_EL1_PARTID_D, partid_d) | + FIELD_PREP(MPAM0_EL1_PARTID_I, partid_i) | + FIELD_PREP(MPAM0_EL1_PMG_D, pmg_d) | + FIELD_PREP(MPAM0_EL1_PMG_I, pmg_i); +} + +static inline void mpam_set_cpu_defaults(int cpu, u16 partid_d, u16 partid= _i, + u8 pmg_d, u8 pmg_i) +{ + u64 default_val =3D __mpam_regval(partid_d, partid_i, pmg_d, pmg_i); + + WRITE_ONCE(per_cpu(arm64_mpam_default, cpu), default_val); +} + /* * The resctrl filesystem writes to the partid/pmg values for threads and = CPUs, * which may race with reads in mpam_thread_switch(). Ensure only one of t= he old @@ -36,6 +53,17 @@ static inline u64 mpam_get_regval(struct task_struct *ts= k) return READ_ONCE(task_thread_info(tsk)->mpam_partid_pmg); } =20 +static inline void mpam_set_task_partid_pmg(struct task_struct *tsk, + u16 partid_d, u16 partid_i, + u8 pmg_d, u8 pmg_i) +{ +#ifdef CONFIG_ARM64_MPAM + u64 regval =3D __mpam_regval(partid_d, partid_i, pmg_d, pmg_i); + + WRITE_ONCE(task_thread_info(tsk)->mpam_partid_pmg, regval); +#endif +} + static inline void mpam_thread_switch(struct task_struct *tsk) { u64 oldregval; --=20 2.43.0