From nobody Tue Feb 10 01:58:51 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DE9C534C13D for ; Mon, 12 Jan 2026 10:48:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768214916; cv=none; b=uOUGm12r3ak4w1u31MlTSm0h5NOwyLc2pes/Q2yRyshYKDdL1QRGGUrj/8OtM+y+6gy2OueLij40byslxnn+Qr/IebmIwtxJwCdaafiBqa3BJBhZwHv85umQwZCXa3G6x4XSqzJvpl6O/owl0ZMQkPWdQxJYe+or2Yf1YMojQ4w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768214916; c=relaxed/simple; bh=5xsApeJnKutP/DbrLu9m78Eok6FpXw0T47Onyc9grx0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=gbBCbjYcFXiBVZnFeys7WbX0tdZMVaGXUnoLW/OxPwTe4efzfyXPcH1qb/2XdPfz8InCwaaP+trXTAOWSGjFqXfu4HOW5RF1EKexRqAz3vCkocyA54FAq5RRspp/iLlPieHIrVK1Ar8Z9eWSURhRsgCHMLiijNVEsMSbxOE2jbU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=oTt/H+kw; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b=WFSV4ikL; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="oTt/H+kw"; dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com header.b="WFSV4ikL" Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id 60C7Otv6556393 for ; Mon, 12 Jan 2026 10:48:26 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=qcppdkim1; bh=sqaUgDVKZ6m 4wCTCNsu1hZ5yx1Nzly5OMpjbviE6Ct8=; b=oTt/H+kwawcL8Jm1BtxTyPlVL0+ q2nv9DB6VhR9W4wK+X3IXW1nvdm+Ia6Q5ErLXTDbwZ2Yy6AbQaWdTrFspIwLHXpO xqHRE9NSB5xy34Nsx4QXhU87RVC/AMyKoHjLWo/gyxOt80GvEXR+XZp6NQBKydGI ns6HqjqCwSCFL7s/iFZcdoo7K2B4oXuFQYG6vGrkQNOhzENpzr+BkPH/Gmk3i5BB WMUs/AClAU6srol7x/ua6P0tFn8Id7UlAEQ3GZukvSHULaJidDp0a1tyNnVNWAvZ qH4A3CplKPPaxDQA/XBH5r5qod0HWCAVDpnNrfx67f5o/tx3/Z1Zq0Q3Ckg== Received: from mail-pf1-f199.google.com (mail-pf1-f199.google.com [209.85.210.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4bmvhw0p60-1 (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT) for ; Mon, 12 Jan 2026 10:48:26 +0000 (GMT) Received: by mail-pf1-f199.google.com with SMTP id d2e1a72fcca58-7fc82eff4adso4226203b3a.1 for ; Mon, 12 Jan 2026 02:48:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oss.qualcomm.com; s=google; t=1768214905; x=1768819705; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=sqaUgDVKZ6m4wCTCNsu1hZ5yx1Nzly5OMpjbviE6Ct8=; b=WFSV4ikLmSgUyQA+aiTFhRu/NNHyK12FW/39+qe7VvNUMZ1GhBwBz7htwXYeweZC25 R0bDGM9w0QGykDU3sWygmd3/axlCeKcT93nhd0a3YRsELI8pXrxQ7d6Q9W65S9a6vF7j FQjEh52y68QAccPnb2k5BE2C+kpZubON9r6cYvyPoHQ8Uz3sYYTZmyB1Cf0NiUskjYRT Xr9sQicHPZhK/BWpYt/F9o6b9csTbLRqRek4ZF+MQmwsT4RLl8au+5g1SvwdtssaYsnU 3lU1tpPf/sbiaeRjQ7B7Xx4Xi604rQ8bVsZgCmvf19KMQwDBX6nDKcH0+M/kghzTZUEN Ky8w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1768214905; x=1768819705; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=sqaUgDVKZ6m4wCTCNsu1hZ5yx1Nzly5OMpjbviE6Ct8=; b=IgGvtxZEfIVTEplV7Brs91ujbxG3JSgzV9gGYE3TGlndyQaNUHN//83llzVM7GI3YS CF7yUmVWpwEPC+/5qRKCZqeOuEa8bfw3ckLWdPj9TnyEruhww6610Bc1sCbHq1xjpa2k YZgZqvplSPEilVbOrfd81sSIyRGINCtan5Jvid5vqRiDoDrzzH2idXHMgZhn9s1vrOVs jGwmgvVuUpecYroJDoFu5ZUKD4kJZo9KPUKV+pPfHWQhwEIF1OctjQT+AqWsBk45Paeu MSYmtzxkka1iYpPCuQKfM7zMbLAxm1HEJa1LBA1LvPy93ib8DTBJzBptvhswCiI9UjdY PcUA== X-Forwarded-Encrypted: i=1; AJvYcCV4uFbqzFcM0coQqgtJwY2XPtSc+SOdvSJDiXWionOAAQbd1myLSdu2+BG//6jUuwGEGjDOC+C52zWAkSw=@vger.kernel.org X-Gm-Message-State: AOJu0YxllOnt1DoZb+61/5CX4cSr4rtGkuKgboJYu16IZr4epKKgt4C/ JWNVKWn9cDHm25EMnUEfslpAPkszdsGB+P4zVngzi3spEqpcOV/FE9+zJXbjSgAcuINf5e17rux M6RT8rvdD9qRhMTKqKvVVqTP1MVbfooR4di51EZuSKkT6SM5NHIVcE4uU4TrgnxDp5dc= X-Gm-Gg: AY/fxX62Gb2MRu5Tzk80MJGd62VOeA3L7kgBcH1isCvbbLn8zOvc/k8qRzgE5N2KzPW 2nwLr5TSP+DUDqZkYtAJRZI7L4iX/dY6rvLh17oMBlMScMdqGy/lxaocwnoOziAEfk+aPKgoBiH B6j+PS9GnMpvV31exNBJ0E5ILk4cVu1wTQXuMYFmytW5rV0T644C4CedzSQy3g8xDvKDRCI81pA rR1yQx1psUQ/fI8CddI7B3xtxe2lpCBOIGE1FlXPvfkTnPYNe9ZytNr5l4NDxBevhuFAGw/5EjB gz4ZO50DTYFO3NmN2Tz3x/MWRr3P7WaUrDQ+vYb/0BVv+9YZ7y7y0/fyyss+4BzmvNU8kvHQyS/ udS8LvUoogXbvHJuFcZJounuz07bScUcijCdVe+TA4FQ= X-Received: by 2002:a05:6a00:4907:b0:81c:79a3:57b6 with SMTP id d2e1a72fcca58-81c79a358e9mr9079657b3a.9.1768214905361; Mon, 12 Jan 2026 02:48:25 -0800 (PST) X-Google-Smtp-Source: AGHT+IHQgN/pljh0AWTwGXIEghkl8dkJkuEQnyyPyNP4Ss1SBJX6CGd1e5duSSgKw5sChhNCCTHNCg== X-Received: by 2002:a05:6a00:4907:b0:81c:79a3:57b6 with SMTP id d2e1a72fcca58-81c79a358e9mr9079630b3a.9.1768214904724; Mon, 12 Jan 2026 02:48:24 -0800 (PST) Received: from hu-ptalari-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-819bafe9b8dsm17288681b3a.22.2026.01.12.02.48.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Jan 2026 02:48:24 -0800 (PST) From: Praveen Talari To: Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mukesh Kumar Savaliya , Viken Dadhaniya , Bjorn Andersson , Konrad Dybcio , Praveen Talari , linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, bryan.odonoghue@linaro.org, dmitry.baryshkov@oss.qualcomm.com, bjorn.andersson@oss.qualcomm.com Cc: prasad.sodagudi@oss.qualcomm.com, quic_vtanuku@quicinc.com, aniket.randive@oss.qualcomm.com, chandana.chiluveru@oss.qualcomm.com Subject: [PATCH v3 08/12] i2c: qcom-geni: Isolate serial engine setup Date: Mon, 12 Jan 2026 16:17:18 +0530 Message-Id: <20260112104722.591521-9-praveen.talari@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260112104722.591521-1-praveen.talari@oss.qualcomm.com> References: <20260112104722.591521-1-praveen.talari@oss.qualcomm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTEyMDA4NSBTYWx0ZWRfX4Lk6x5Sadze/ C6A3wj2BIVmKTYA5CYemR3DEiIYhu/bnwaK8Qg8qCHQ1KG8gT+uhHZ/AGrhnLFnIUEHdfCuYNbf 16G+xCfZRwFacxXk14+wJTliG1Hpi50h0d+/rsLd2Ga8jXNZ9qXxC+y/y4E9ZHL6KJT11BJIWHB bjh6Er5OxgVoXmpAAwx2mW3gg4CBsGFKbPFwmw1fU/tpw68agcTDZwHXpd2yWlpnSmF/VgGdEl1 f2K43HqqMOMvZWXYOHPGZWcu6vYxYgCFJu3kbXmIrcbxmvXTUAoh5dVHDq4Xc61zz0ytIRYqTbC nlJsiwnKnUFFdGfpRpA+JM20YE1URLj59+y9PB4PvEuueHQcTeCJxcPn80cXHFBDIn2hxF346DX C4gXhYyCYr4ZbPXVoJxbeSdtEsRV4BikX22WsEEY/+2SZW9q+HJAkrOrO0l9t63yF9MhYEvpclj 7hNItIxFpAf0rFRvAog== X-Authority-Analysis: v=2.4 cv=JP02csKb c=1 sm=1 tr=0 ts=6964d17a cx=c_pps a=WW5sKcV1LcKqjgzy2JUPuA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=vUbySO9Y5rIA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=6GPvvr__t7aM35KwLhsA:9 a=OpyuDcXvxspvyRM73sMx:22 X-Proofpoint-GUID: _k6cCDmYn4Uk8eJ9IPVutoeQcpXIt9KU X-Proofpoint-ORIG-GUID: _k6cCDmYn4Uk8eJ9IPVutoeQcpXIt9KU X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2026-01-12_03,2026-01-09_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 bulkscore=0 priorityscore=1501 impostorscore=0 suspectscore=0 clxscore=1015 malwarescore=0 adultscore=0 spamscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2512120000 definitions=main-2601120085 Content-Type: text/plain; charset="utf-8" Moving the serial engine setup to geni_i2c_init() API for a cleaner probe function and utilizes the PM runtime API to control resources instead of direct clock-related APIs for better resource management. Enables reusability of the serial engine initialization like hibernation and deep sleep features where hardware context is lost. Signed-off-by: Praveen Talari Acked-by: Viken Dadhaniya --- v1->v2: Bjorn: - Updated commit text. --- drivers/i2c/busses/i2c-qcom-geni.c | 154 ++++++++++++++--------------- 1 file changed, 73 insertions(+), 81 deletions(-) diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qc= om-geni.c index 3a04016db2c3..58c32ffbd150 100644 --- a/drivers/i2c/busses/i2c-qcom-geni.c +++ b/drivers/i2c/busses/i2c-qcom-geni.c @@ -976,10 +976,75 @@ static int setup_gpi_dma(struct geni_i2c_dev *gi2c) return ret; } =20 +static int geni_i2c_init(struct geni_i2c_dev *gi2c) +{ + const struct geni_i2c_desc *desc =3D NULL; + u32 proto, tx_depth; + bool fifo_disable; + int ret; + + ret =3D pm_runtime_resume_and_get(gi2c->se.dev); + if (ret < 0) { + dev_err(gi2c->se.dev, "error turning on device :%d\n", ret); + return ret; + } + + proto =3D geni_se_read_proto(&gi2c->se); + if (proto =3D=3D GENI_SE_INVALID_PROTO) { + ret =3D geni_load_se_firmware(&gi2c->se, GENI_SE_I2C); + if (ret) { + dev_err_probe(gi2c->se.dev, ret, "i2c firmware load failed ret: %d\n", = ret); + goto err; + } + } else if (proto !=3D GENI_SE_I2C) { + ret =3D dev_err_probe(gi2c->se.dev, -ENXIO, "Invalid proto %d\n", proto); + goto err; + } + + desc =3D device_get_match_data(gi2c->se.dev); + if (desc && desc->no_dma_support) + fifo_disable =3D false; + else + fifo_disable =3D readl_relaxed(gi2c->se.base + GENI_IF_DISABLE_RO) & FIF= O_IF_DISABLE; + + if (fifo_disable) { + /* FIFO is disabled, so we can only use GPI DMA */ + gi2c->gpi_mode =3D true; + ret =3D setup_gpi_dma(gi2c); + if (ret) + goto err; + + dev_dbg(gi2c->se.dev, "Using GPI DMA mode for I2C\n"); + } else { + gi2c->gpi_mode =3D false; + tx_depth =3D geni_se_get_tx_fifo_depth(&gi2c->se); + + /* I2C Master Hub Serial Elements doesn't have the HW_PARAM_0 register */ + if (!tx_depth && desc) + tx_depth =3D desc->tx_fifo_depth; + + if (!tx_depth) { + ret =3D dev_err_probe(gi2c->se.dev, -EINVAL, + "Invalid TX FIFO depth\n"); + goto err; + } + + gi2c->tx_wm =3D tx_depth - 1; + geni_se_init(&gi2c->se, gi2c->tx_wm, tx_depth); + geni_se_config_packing(&gi2c->se, BITS_PER_BYTE, + PACKING_BYTES_PW, true, true, true); + + dev_dbg(gi2c->se.dev, "i2c fifo/se-dma mode. fifo depth:%d\n", tx_depth); + } + +err: + pm_runtime_put(gi2c->se.dev); + return ret; +} + static int geni_i2c_probe(struct platform_device *pdev) { struct geni_i2c_dev *gi2c; - u32 proto, tx_depth, fifo_disable; int ret; struct device *dev =3D &pdev->dev; const struct geni_i2c_desc *desc =3D NULL; @@ -1059,100 +1124,27 @@ static int geni_i2c_probe(struct platform_device *= pdev) if (ret) return ret; =20 - ret =3D clk_prepare_enable(gi2c->core_clk); - if (ret) - return ret; - - ret =3D geni_se_resources_on(&gi2c->se); - if (ret) { - dev_err_probe(dev, ret, "Error turning on resources\n"); - goto err_clk; - } - proto =3D geni_se_read_proto(&gi2c->se); - if (proto =3D=3D GENI_SE_INVALID_PROTO) { - ret =3D geni_load_se_firmware(&gi2c->se, GENI_SE_I2C); - if (ret) { - dev_err_probe(dev, ret, "i2c firmware load failed ret: %d\n", ret); - goto err_resources; - } - } else if (proto !=3D GENI_SE_I2C) { - ret =3D dev_err_probe(dev, -ENXIO, "Invalid proto %d\n", proto); - goto err_resources; - } - - if (desc && desc->no_dma_support) - fifo_disable =3D false; - else - fifo_disable =3D readl_relaxed(gi2c->se.base + GENI_IF_DISABLE_RO) & FIF= O_IF_DISABLE; - - if (fifo_disable) { - /* FIFO is disabled, so we can only use GPI DMA */ - gi2c->gpi_mode =3D true; - ret =3D setup_gpi_dma(gi2c); - if (ret) - goto err_resources; - - dev_dbg(dev, "Using GPI DMA mode for I2C\n"); - } else { - gi2c->gpi_mode =3D false; - tx_depth =3D geni_se_get_tx_fifo_depth(&gi2c->se); - - /* I2C Master Hub Serial Elements doesn't have the HW_PARAM_0 register */ - if (!tx_depth && desc) - tx_depth =3D desc->tx_fifo_depth; - - if (!tx_depth) { - ret =3D dev_err_probe(dev, -EINVAL, - "Invalid TX FIFO depth\n"); - goto err_resources; - } - - gi2c->tx_wm =3D tx_depth - 1; - geni_se_init(&gi2c->se, gi2c->tx_wm, tx_depth); - geni_se_config_packing(&gi2c->se, BITS_PER_BYTE, - PACKING_BYTES_PW, true, true, true); - - dev_dbg(dev, "i2c fifo/se-dma mode. fifo depth:%d\n", tx_depth); - } - - clk_disable_unprepare(gi2c->core_clk); - ret =3D geni_se_resources_off(&gi2c->se); - if (ret) { - dev_err_probe(dev, ret, "Error turning off resources\n"); - goto err_dma; - } - - ret =3D geni_icc_disable(&gi2c->se); - if (ret) - goto err_dma; - gi2c->suspended =3D 1; pm_runtime_set_suspended(gi2c->se.dev); pm_runtime_set_autosuspend_delay(gi2c->se.dev, I2C_AUTO_SUSPEND_DELAY); pm_runtime_use_autosuspend(gi2c->se.dev); pm_runtime_enable(gi2c->se.dev); =20 + ret =3D geni_i2c_init(gi2c); + if (ret < 0) { + pm_runtime_disable(gi2c->se.dev); + return ret; + } + ret =3D i2c_add_adapter(&gi2c->adap); if (ret) { dev_err_probe(dev, ret, "Error adding i2c adapter\n"); pm_runtime_disable(gi2c->se.dev); - goto err_dma; + return ret; } =20 dev_dbg(dev, "Geni-I2C adaptor successfully added\n"); =20 - return ret; - -err_resources: - geni_se_resources_off(&gi2c->se); -err_clk: - clk_disable_unprepare(gi2c->core_clk); - - return ret; - -err_dma: - release_gpi_dma(gi2c); - return ret; } =20 --=20 2.34.1