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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-121f23b798asm18888500c88.0.2026.01.12.01.02.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Jan 2026 01:02:41 -0800 (PST) From: Hangxiang Ma Date: Mon, 12 Jan 2026 01:02:30 -0800 Subject: [PATCH v11 5/5] media: qcom: camss: vfe: Add support for VFE gen4 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260112-kaanapali-camss-v11-5-81e4f59a5d08@oss.qualcomm.com> References: <20260112-kaanapali-camss-v11-0-81e4f59a5d08@oss.qualcomm.com> In-Reply-To: <20260112-kaanapali-camss-v11-0-81e4f59a5d08@oss.qualcomm.com> To: Robert Foss , Todor Tomov , Bryan O'Donoghue , Vladimir Zapolskiy , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Hangxiang Ma , Atiya Kailany X-Mailer: b4 0.14.3 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTEyMDA3MCBTYWx0ZWRfXwwT3JjO7awmb xyTl1qdygQpH6BAeBfqFldKO731DQst1x8ng8OKyQlxrh1+pyrYtwUUAiQpHBphTYoXqlJLiA+p 5TKB9hmsAndL0P2oucsY+gDCl08BHYYYzbUbrz3b6hz8/s4RbAH3TUPGOc7rEdmRPi+uFUyoixL XXKXpb88pj2hBv4JHYTPqwQkhhPCy5q8LoaI0Y5j8dT1fP2u+cx1Fwt2MHMEre1doRclw1wLK3y 4sksARhobNLybv15BbR64l4leVasxObwKzLZRix/gNHRsquNoKIma0aox3UahUdm7ojHVcLxOOx RGzhcYMUbABDcOJU7Sv8V33vcIAK6OP+TsPjR4RyUnjcSX5kzghphfLZRWyjmDa/HCj5DrJPy7q XZiZ5Qlwv1BQl3UxjzAi3H9CtOfHZve/csw1Fzb84fl/u5shCHuXrqvbXZjfnHrCKUHanx7Cszh U4xkopxrG1eMpAyem8A== X-Proofpoint-ORIG-GUID: iopcCCjgeuPTNg-C9WspafM54sihnLnw X-Authority-Analysis: v=2.4 cv=YocChoYX c=1 sm=1 tr=0 ts=6964b8b3 cx=c_pps a=JYo30EpNSr/tUYqK9jHPoA==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=IkcTkHD0fZMA:10 a=vUbySO9Y5rIA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=4o9gmvoekZ77T9ZvDsgA:9 a=QEXdDO2ut3YA:10 a=Fk4IpSoW4aLDllm1B1p-:22 X-Proofpoint-GUID: iopcCCjgeuPTNg-C9WspafM54sihnLnw X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2026-01-12_02,2026-01-09_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 spamscore=0 lowpriorityscore=0 malwarescore=0 phishscore=0 clxscore=1015 impostorscore=0 adultscore=0 priorityscore=1501 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2512120000 definitions=main-2601120070 Add Video Front End (VFE) version gen4 as found on the Kaanapali SoC. The FULL front end modules in Kaanapali camera subsystem are called TFEs (Thin Front End), however, retaining the name VFE at places to maintain consistency and avoid unnecessary code changes. This change limits the VFE output lines to 3 for now as constrained by the CAMSS driver framework. Kaanapali architecture requires for the REG_UPDATE and AUP_UPDATE to be issued after all of the CSID configuration has been done. Additionally, the number of AUP_UPDATEs should match the number of buffers enqueued to the write master while it's being enabled. Although the real time data from TFE goes through the RT_CAMNOC, we are required to enable both the camnoc_rt_axi and camnoc_nrt_axi clocks for the PDX_NOC, that follows both the RT and NRT NOCs in this architecture, to ensure that both of the latter are idle after reset. Co-developed-by: Atiya Kailany Signed-off-by: Atiya Kailany Signed-off-by: Hangxiang Ma --- drivers/media/platform/qcom/camss/Makefile | 1 + drivers/media/platform/qcom/camss/camss-vfe.c | 9 +- drivers/media/platform/qcom/camss/camss-vfe.h | 2 + drivers/media/platform/qcom/camss/camss.c | 143 ++++++++++++++++++++++= ++++ 4 files changed, 153 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/qcom/camss/Makefile b/drivers/media/pla= tform/qcom/camss/Makefile index ba9faa635bd7..ed8001ef90a6 100644 --- a/drivers/media/platform/qcom/camss/Makefile +++ b/drivers/media/platform/qcom/camss/Makefile @@ -23,6 +23,7 @@ qcom-camss-objs +=3D \ camss-vfe-480.o \ camss-vfe-680.o \ camss-vfe-gen3.o \ + camss-vfe-gen4.o \ camss-vfe-gen1.o \ camss-vfe-vbif.o \ camss-vfe.o \ diff --git a/drivers/media/platform/qcom/camss/camss-vfe.c b/drivers/media/= platform/qcom/camss/camss-vfe.c index 9c7ad8aa4058..399be8b70fed 100644 --- a/drivers/media/platform/qcom/camss/camss-vfe.c +++ b/drivers/media/platform/qcom/camss/camss-vfe.c @@ -351,6 +351,7 @@ static u32 vfe_src_pad_code(struct vfe_line *line, u32 = sink_code, case CAMSS_8550: case CAMSS_8650: case CAMSS_8775P: + case CAMSS_KAANAPALI: case CAMSS_X1E80100: switch (sink_code) { case MEDIA_BUS_FMT_YUYV8_1X16: @@ -523,7 +524,8 @@ int vfe_enable_output_v2(struct vfe_line *line) =20 spin_lock_irqsave(&vfe->output_lock, flags); =20 - ops->reg_update_clear(vfe, line->id); + if (ops->reg_update_clear) + ops->reg_update_clear(vfe, line->id); =20 if (output->state > VFE_OUTPUT_RESERVED) { dev_err(vfe->camss->dev, @@ -550,7 +552,9 @@ int vfe_enable_output_v2(struct vfe_line *line) output->gen2.active_num++; ops->vfe_wm_update(vfe, output->wm_idx[0], output->buf[i]->addr[0], line); - ops->reg_update(vfe, line->id); + + if (!vfe->res->reg_update_after_csid_config) + ops->reg_update(vfe, line->id); } =20 spin_unlock_irqrestore(&vfe->output_lock, flags); @@ -2009,6 +2013,7 @@ static int vfe_bpl_align(struct vfe_device *vfe) case CAMSS_8550: case CAMSS_8650: case CAMSS_8775P: + case CAMSS_KAANAPALI: case CAMSS_X1E80100: ret =3D 16; break; diff --git a/drivers/media/platform/qcom/camss/camss-vfe.h b/drivers/media/= platform/qcom/camss/camss-vfe.h index ae9dad353a37..c402ef170c81 100644 --- a/drivers/media/platform/qcom/camss/camss-vfe.h +++ b/drivers/media/platform/qcom/camss/camss-vfe.h @@ -133,6 +133,7 @@ struct vfe_isr_ops { =20 struct vfe_subdev_resources { bool is_lite; + bool reg_update_after_csid_config; u8 line_num; bool has_pd; char *pd_name; @@ -249,6 +250,7 @@ extern const struct vfe_hw_ops vfe_ops_340; extern const struct vfe_hw_ops vfe_ops_480; extern const struct vfe_hw_ops vfe_ops_680; extern const struct vfe_hw_ops vfe_ops_gen3; +extern const struct vfe_hw_ops vfe_ops_gen4; =20 int vfe_get(struct vfe_device *vfe); void vfe_put(struct vfe_device *vfe); diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/plat= form/qcom/camss/camss.c index d292364d1701..2bd4e0934c09 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -217,6 +217,147 @@ static const struct camss_subdev_resources csid_res_k= aanapali[] =3D { } }; =20 +/* In Kaanapali, CAMNOC requires all CAMNOC_RT_TFEX clocks + * to operate on any TFE Full. + */ +static const struct camss_subdev_resources vfe_res_kaanapali[] =3D { + /* VFE0 - TFE Full */ + { + .regulators =3D {}, + .clock =3D { "gcc_axi_hf", "vfe0_fast_ahb", "vfe0", + "camnoc_rt_vfe0", "camnoc_rt_vfe1", "camnoc_rt_vfe2", + "camnoc_rt_axi", "camnoc_nrt_axi", "qdss_debug_xo" }, + .clock_rate =3D { { 0 }, + { 0 }, + { 360280000, 480000000, 630000000, 716000000, + 833000000 }, + { 0 }, + { 0 }, + { 0 }, + { 200000000, 300000000, 400000000, 480000000 }, + { 0 }, + { 0 } }, + .reg =3D { "vfe0" }, + .interrupt =3D { "vfe0" }, + .vfe =3D { + .line_num =3D 3, + .is_lite =3D false, + .reg_update_after_csid_config =3D true, + .has_pd =3D true, + .pd_name =3D "ife0", + .hw_ops =3D &vfe_ops_gen4, + .formats_rdi =3D &vfe_formats_rdi_845, + .formats_pix =3D &vfe_formats_pix_845 + } + }, + /* VFE1 - TFE Full */ + { + .regulators =3D {}, + .clock =3D { "gcc_axi_hf", "vfe1_fast_ahb", "vfe1", + "camnoc_rt_vfe0", "camnoc_rt_vfe1", "camnoc_rt_vfe2", + "camnoc_rt_axi", "camnoc_nrt_axi", "qdss_debug_xo" }, + .clock_rate =3D { { 0 }, + { 0 }, + { 360280000, 480000000, 630000000, 716000000, + 833000000 }, + { 0 }, + { 0 }, + { 0 }, + { 200000000, 300000000, 400000000, 480000000 }, + { 0 }, + { 0 } }, + .reg =3D { "vfe1" }, + .interrupt =3D { "vfe1" }, + .vfe =3D { + .line_num =3D 3, + .is_lite =3D false, + .reg_update_after_csid_config =3D true, + .has_pd =3D true, + .pd_name =3D "ife1", + .hw_ops =3D &vfe_ops_gen4, + .formats_rdi =3D &vfe_formats_rdi_845, + .formats_pix =3D &vfe_formats_pix_845 + } + }, + /* VFE2 - TFE Full */ + { + .regulators =3D {}, + .clock =3D { "gcc_axi_hf", "vfe2_fast_ahb", "vfe2", + "camnoc_rt_vfe0", "camnoc_rt_vfe1", "camnoc_rt_vfe2", + "camnoc_rt_axi", "camnoc_nrt_axi", "qdss_debug_xo" }, + .clock_rate =3D { { 0 }, + { 0 }, + { 360280000, 480000000, 630000000, 716000000, + 833000000 }, + { 0 }, + { 0 }, + { 0 }, + { 200000000, 300000000, 400000000, 480000000 }, + { 0 }, + { 0 } }, + .reg =3D { "vfe2" }, + .interrupt =3D { "vfe2" }, + .vfe =3D { + .line_num =3D 3, + .is_lite =3D false, + .reg_update_after_csid_config =3D true, + .has_pd =3D true, + .pd_name =3D "ife2", + .hw_ops =3D &vfe_ops_gen4, + .formats_rdi =3D &vfe_formats_rdi_845, + .formats_pix =3D &vfe_formats_pix_845 + } + }, + /* VFE3 - IFE Lite */ + { + .regulators =3D {}, + .clock =3D { "gcc_axi_hf", "vfe_lite_ahb", "vfe_lite", + "camnoc_rt_vfe_lite", "camnoc_rt_axi", + "camnoc_nrt_axi", "qdss_debug_xo" }, + .clock_rate =3D { { 0 }, + { 0 }, + { 266666667, 400000000, 480000000 }, + { 0 }, + { 200000000, 300000000, 400000000, 480000000 }, + { 0 }, + { 0 } }, + .reg =3D { "vfe_lite0" }, + .interrupt =3D { "vfe_lite0" }, + .vfe =3D { + .line_num =3D 4, + .is_lite =3D true, + .reg_update_after_csid_config =3D true, + .hw_ops =3D &vfe_ops_gen4, + .formats_rdi =3D &vfe_formats_rdi_845, + .formats_pix =3D &vfe_formats_pix_845 + } + }, + /* VFE4 - IFE Lite */ + { + .regulators =3D {}, + .clock =3D { "gcc_axi_hf", "vfe_lite_ahb", "vfe_lite", + "camnoc_rt_vfe_lite", "camnoc_rt_axi", + "camnoc_nrt_axi", "qdss_debug_xo" }, + .clock_rate =3D { { 0 }, + { 0 }, + { 266666667, 400000000, 480000000 }, + { 0 }, + { 200000000, 300000000, 400000000, 480000000 }, + { 0 }, + { 0 } }, + .reg =3D { "vfe_lite1" }, + .interrupt =3D { "vfe_lite1" }, + .vfe =3D { + .line_num =3D 4, + .is_lite =3D true, + .reg_update_after_csid_config =3D true, + .hw_ops =3D &vfe_ops_gen4, + .formats_rdi =3D &vfe_formats_rdi_845, + .formats_pix =3D &vfe_formats_pix_845 + } + }, +}; + static const struct resources_icc icc_res_kaanapali[] =3D { { .name =3D "cam_ahb", @@ -4948,10 +5089,12 @@ static const struct camss_resources kaanapali_resou= rces =3D { .pd_name =3D "top", .csiphy_res =3D csiphy_res_kaanapali, .csid_res =3D csid_res_kaanapali, + .vfe_res =3D vfe_res_kaanapali, .icc_res =3D icc_res_kaanapali, .icc_path_num =3D ARRAY_SIZE(icc_res_kaanapali), .csiphy_num =3D ARRAY_SIZE(csiphy_res_kaanapali), .csid_num =3D ARRAY_SIZE(csid_res_kaanapali), + .vfe_num =3D ARRAY_SIZE(vfe_res_kaanapali), }; =20 static const struct camss_resources msm8916_resources =3D { --=20 2.34.1