From nobody Tue Feb 10 13:18:07 2026 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8EA063563F9; Mon, 12 Jan 2026 11:20:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=68.232.154.123 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768216814; cv=none; b=Rv74YVujX7lFJmOxEYttyH0RRjZ0ecBhZwhmOIwEvPK0fmiCISYrY+pks1OwxX3MOYLkWKY/c6LBlM1tceFxwWXqtIwezk3WUkGU/+we+2OvZM4G0lgVF8lHgiQ3GGerQB5P+SnNsuvQooKOT2sHJDT4TH26Rf3IvT3W1hmkkKw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768216814; c=relaxed/simple; bh=/EDpiv+xt9RiRNe7Z3N4mA4E34lVS7KV2XC1qtYwZSY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=brn37Qv9aTfYolWAJ5ny4uYhRSYtKa1gE6OH7/SmIutcNtXV6m49H8r+qRZOfYu2Pm+iYOv/tygKNq7MHUTZiRG9+L9kG8W59Kz6Jw+HQKWLjsaOc4ta87aNKBRJ2O5vMcSWs+0itQLKYIRz1t6Tgs5ek2Um31uScmBP+h2h3Jw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com; spf=pass smtp.mailfrom=microchip.com; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b=dpxAFwmw; arc=none smtp.client-ip=68.232.154.123 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=microchip.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=microchip.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="dpxAFwmw" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1768216813; x=1799752813; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=/EDpiv+xt9RiRNe7Z3N4mA4E34lVS7KV2XC1qtYwZSY=; b=dpxAFwmwDT6OW9cJEU/hQNKRw3pLl6BpnUMPxrOTILsQ2ReYxIjp/9Q7 ML8gFFyHnqG8Be3wge4aHfDUPqs48liQBEVp8YccSDJeovdbAcegWl5hX h0I5jYcnY+tZz6+kckXstl/vSk7JJSv3Z8xHhFqAz0ZOkxA7vIne5KL2Y 6r6l7TNSNleC7iEaFluMlKwwHX8OrmxQvWJjWX6jqC5IIer9fmemmAA6r taQuZ5MzJCLvEQVmF0kqMDTjYDm0EjjamKXtmr5XTbRibOZl1pzbDXnr/ BrTFQVfm/RN+HL0qquKxWzee8Ks0bJzL7CedqBwH/m0XvLXPR10MmOxAV Q==; X-CSE-ConnectionGUID: qXHm4p2ATUmsKhhoHT7QVw== X-CSE-MsgGUID: Zw89udPMSemI3v3P3nhQSw== X-IronPort-AV: E=Sophos;i="6.21,219,1763449200"; d="scan'208";a="50991527" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 12 Jan 2026 04:20:12 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.58; Mon, 12 Jan 2026 04:19:02 -0700 Received: from ROU-LL-M19942.mpu32.int (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Mon, 12 Jan 2026 04:18:59 -0700 From: Cyrille Pitchen Date: Mon, 12 Jan 2026 12:17:56 +0100 Subject: [PATCH v4 1/5] dt-bindings: gpu: add bindings for the Microchip GFX2D GPU Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20260112-cpitchen-mainline_gfx2d-v4-1-f210041ad343@microchip.com> References: <20260112-cpitchen-mainline_gfx2d-v4-0-f210041ad343@microchip.com> In-Reply-To: <20260112-cpitchen-mainline_gfx2d-v4-0-f210041ad343@microchip.com> To: David Airlie , Simona Vetter , "Maarten Lankhorst" , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Nicolas Ferre , "Alexandre Belloni" , Claudiu Beznea , Russell King CC: , , , , Cyrille Pitchen , Conor Dooley X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1771; i=cyrille.pitchen@microchip.com; h=from:subject:message-id; bh=/EDpiv+xt9RiRNe7Z3N4mA4E34lVS7KV2XC1qtYwZSY=; b=owGbwMvMwCXmf6yzKqEsVIbxtFoSQ2bKjbnR2gtvn/9hdcK8dWNhIcP1iT2BOiz8u6Qe8dtOM gmI5J/TUcrCIMbFICumyHLozdbezOOvHtu9EpWCmcPKBDKEgYtTACbyJY/hn3HSYbNLa3Rc2Lef dXu74eTkqR+ULqp6NrKoeIr7H5tld5GRoeUAb4ec6VvTTlX5ba+nvMqcbXneeI2s6e2T29c0BU6 vYQIA X-Developer-Key: i=cyrille.pitchen@microchip.com; a=openpgp; fpr=7A21115D7D6026585D0E183E0EF12AA1BFAC073D The Microchip GFX2D GPU is embedded in the SAM9X60 and SAM9X7 SoC family. Describe how the GFX2D GPU is integrated in these SoCs, including register space, interrupt and clock. Signed-off-by: Cyrille Pitchen Acked-by: Conor Dooley --- .../bindings/gpu/microchip,sam9x60-gfx2d.yaml | 46 ++++++++++++++++++= ++++ 1 file changed, 46 insertions(+) diff --git a/Documentation/devicetree/bindings/gpu/microchip,sam9x60-gfx2d.= yaml b/Documentation/devicetree/bindings/gpu/microchip,sam9x60-gfx2d.yaml new file mode 100644 index 0000000000000000000000000000000000000000..0f223ddda694e7edbc9f25c68d1= 7ef01897a55a1 --- /dev/null +++ b/Documentation/devicetree/bindings/gpu/microchip,sam9x60-gfx2d.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpu/microchip,sam9x60-gfx2d.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip GFX2D GPU + +maintainers: + - Cyrille Pitchen + +properties: + compatible: + enum: + - microchip,sam9x60-gfx2d + - microchip,sam9x7-gfx2d + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + +additionalProperties: false + +examples: + - | + #include + #include + gpu@f0018000 { + compatible =3D "microchip,sam9x60-gfx2d"; + reg =3D <0xf0018000 0x4000>; + interrupts =3D <36 IRQ_TYPE_LEVEL_HIGH 0>; + clocks =3D <&pmc PMC_TYPE_PERIPHERAL 36>; + }; + +... --=20 2.51.0