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To take advantage of this, introduce a specific configuration (cfg_x1e80100) with link_retain =3D true and update the device match table to use it. Signed-off-by: Krishna Chaitanya Chundru --- drivers/pci/controller/dwc/pcie-qcom.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controlle= r/dwc/pcie-qcom.c index bdd5bdb462c5f6814c8311be96411173456b6b14..975671a0dd4757074600d5a0966= e94220bb18d8c 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -1531,6 +1531,12 @@ static const struct qcom_pcie_cfg cfg_sc8280xp =3D { .no_l0s =3D true, }; =20 +static const struct qcom_pcie_cfg cfg_x1e80100 =3D { + .ops =3D &ops_1_21_0, + .no_l0s =3D true, + .link_retain =3D true, +}; + static const struct qcom_pcie_cfg cfg_fw_managed =3D { .firmware_managed =3D true, }; @@ -2168,7 +2174,7 @@ static const struct of_device_id qcom_pcie_match[] = =3D { { .compatible =3D "qcom,pcie-sm8450-pcie0", .data =3D &cfg_1_9_0 }, { .compatible =3D "qcom,pcie-sm8450-pcie1", .data =3D &cfg_1_9_0 }, { .compatible =3D "qcom,pcie-sm8550", .data =3D &cfg_1_9_0 }, - { .compatible =3D "qcom,pcie-x1e80100", .data =3D &cfg_sc8280xp }, + { .compatible =3D "qcom,pcie-x1e80100", .data =3D &cfg_x1e80100 }, { } }; =20 --=20 2.34.1