From nobody Sun Feb 8 21:05:45 2026 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E4B4E2D878D; Fri, 9 Jan 2026 10:08:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=193.142.43.55 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767953335; cv=none; b=pYe9i9HXSzu6kSaGB0r71RGZ5KwpGDA1IaQ+0bj9z3Gb4ETrTXW1/CGA9PmiMMluqrwg9wfk6H73SSh6stXg9KX250Ys5i7bMdlng5zGGShZY1yFAx0QaN/ulqa8mppwAEauTfzGM2GXvHy5cRetmdnIUmPnUktbTwttjRwse3g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767953335; c=relaxed/simple; bh=2Ot3+P3TK5IGco1MKfvx/Pr9OQeUrqrUxlYQQRZTzdE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:To:Cc; b=JuSK04NqRyHspFlgvRaWevCTi/3K1K2GoDqV0Ep/QImLCB/8/M93MsLMETex1qF/vTO8S9FFMoZCjlSHRPJ/Q06SKKw/jVUB7qDvG9GVRwxTcozt/5UPWki6ObXz5IEX8NzoBoOLXlAaj3UmaLmkrWo9U9s/sBXWzPrXtQgGESQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de; spf=pass smtp.mailfrom=linutronix.de; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=ecrM2OLC; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b=/Vr3oD+I; arc=none smtp.client-ip=193.142.43.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linutronix.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="ecrM2OLC"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="/Vr3oD+I" From: =?utf-8?q?Thomas_Wei=C3=9Fschuh?= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1767953332; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=hiWnSWZMqvtFwCijTWDIW4H2LrOeKESwb+4fOEG4YhY=; b=ecrM2OLClVWukRuY6OzAVicbQZO5OWtPUZpKX35SvEnkDjdDMlpuq6uOYae4JPqpu811uR jxpu60SXSVJw45kaUXTriYfeKaOn4WZv8wumV+Nl5TZCvjpQmm0MOy/05hOPY5IFFPWj/y gLyLo0AiZxsM4RwLNiubj3AcZP0gyEfgmoPfQuTIecDs+pjqslJlBidcAMvwcWojxRzrcN h5Dg/eG4Zkec82C5hktNjhI1JhcjqTMD9PZpPV4KSWH07Y6W1Crh9hj9dPT1N3NSD3mucN JeQ5j8pfdFG2N3UgLkSQ+B3V7tJeMrproMOxv8w9tPnVw2wy2c6bnWZGacX2YA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1767953332; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=hiWnSWZMqvtFwCijTWDIW4H2LrOeKESwb+4fOEG4YhY=; b=/Vr3oD+IXhKyGNsdyg4cC1B0DMKHtCCSLK3ThhruY3RTy7Ix90hLdkZmXiypdsS6IcoBO8 592Wn2f4uMVIlfAA== Date: Fri, 09 Jan 2026 11:08:49 +0100 Subject: [PATCH v2] MIPS: Implement ARCH_HAS_CC_CAN_LINK Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260109-cc-can-link-mips-v2-1-38123bfc5628@linutronix.de> X-B4-Tracking: v=1; b=H4sIALDTYGkC/32NQQ6CMBBFr0Jm7Rg6QUBX3MOwqO1UJmpLWiQYw t2tHMDl+z///RUSR+EEl2KFyLMkCT4DHQowg/Z3RrGZgUo6KSJCY9Boj0/xD3zJmNCcTcllfau VayDPxshOll157TMPkqYQP/vDrH7pH9msUGFt20a32nFVUZe79xSDl+VoGfpt277E5XvCtAAAA A== X-Change-ID: 20251222-cc-can-link-mips-c9c0e06b61f7 To: Thomas Bogendoerfer Cc: "Maciej W. Rozycki" , linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, =?utf-8?q?Thomas_Wei=C3=9Fschuh?= X-Developer-Signature: v=1; a=ed25519-sha256; t=1767953331; l=2849; i=thomas.weissschuh@linutronix.de; s=20240209; h=from:subject:message-id; bh=2Ot3+P3TK5IGco1MKfvx/Pr9OQeUrqrUxlYQQRZTzdE=; b=oplmTeLR4X1pZF75Y9hB8jAvJd3PPgKw25DVTQdiP5H+CKGzkEgXkBOYfu43GbH0X89Nxn7mR UnYyM6Ja8v4CIMv2fisntdvDRRRBxdxujah2ctN8thQ5tsnEzgycwEM X-Developer-Key: i=thomas.weissschuh@linutronix.de; a=ed25519; pk=pfvxvpFUDJV2h2nY0FidLUml22uGLSjByFbM6aqQQws= The generic CC_CAN_LINK detection does not handle different byte orders or ABIs. This may lead to userprogs which are not actually runnable on the target kernel. Use architecture-specific logic supporting byte orders instead. Modern 64-bit toolchains default to a n32 libc, which are not supported by all kernel configurations, as MIPS32_N32 is optional. On 64-bit, test for a n32 ABI libc first and fall back to o64 and o32 if necessary. Link: https://lore.kernel.org/lkml/20260105100507-14db55e3-aa71-48bf-a6ac-3= 3b186bd082f@linutronix.de/ Signed-off-by: Thomas Wei=C3=9Fschuh --- Changes in v2: - Use -mabi=3D over -m32/-m64 - Link to v1: https://lore.kernel.org/r/20251222-cc-can-link-mips-v1-1-6d87= a8afe442@linutronix.de --- arch/mips/Kconfig | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index b88b97139fa8..862a86cec501 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -4,6 +4,7 @@ config MIPS default y select ARCH_32BIT_OFF_T if !64BIT select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT + select ARCH_HAS_CC_CAN_LINK select ARCH_HAS_CPU_CACHE_ALIASING select ARCH_HAS_CPU_FINALIZE_INIT select ARCH_HAS_CURRENT_STACK_POINTER @@ -3126,6 +3127,33 @@ config CC_HAS_MNO_BRANCH_LIKELY config CC_HAS_BROKEN_INLINE_COMPAT_BRANCH def_bool y if CC_IS_CLANG =20 +config ARCH_CC_CAN_LINK_N32 + bool + default $(cc_can_link_user,-mabi=3Dn32 -EL) if MIPS32_N32 && CPU_LITTLE_E= NDIAN + default $(cc_can_link_user,-mabi=3Dn32 -EB) if MIPS32_N32 && CPU_BIG_ENDI= AN + +config ARCH_CC_CAN_LINK_N64 + bool + default $(cc_can_link_user,-mabi=3D64 -EL) if 64BIT && CPU_LITTLE_ENDIAN + default $(cc_can_link_user,-mabi=3D64 -EB) if 64BIT && CPU_BIG_ENDIAN + +config ARCH_CC_CAN_LINK_O32 + bool + default $(cc_can_link_user,-mabi=3D32 -EL) if (32BIT || MIPS32_O32) && CP= U_LITTLE_ENDIAN + default $(cc_can_link_user,-mabi=3D32 -EB) if (32BIT || MIPS32_O32) && CP= U_BIG_ENDIAN + +config ARCH_CC_CAN_LINK + def_bool ARCH_CC_CAN_LINK_N32 || ARCH_CC_CAN_LINK_N64 || ARCH_CC_CAN_LINK= _O32 + +config ARCH_USERFLAGS + string + default "-mabi=3Dn32 -EL" if ARCH_CC_CAN_LINK_N32 && CPU_LITTLE_ENDIAN + default "-mabi=3Dn32 -EB" if ARCH_CC_CAN_LINK_N32 && CPU_BIG_ENDIAN + default "-mabi=3D64 -EL" if ARCH_CC_CAN_LINK_N64 && CPU_LITTLE_ENDIAN + default "-mabi=3D64 -EB" if ARCH_CC_CAN_LINK_N64 && CPU_BIG_ENDIAN + default "-mabi=3D32 -EL" if ARCH_CC_CAN_LINK_O32 && CPU_LITTLE_ENDIAN + default "-mabi=3D32 -EB" if ARCH_CC_CAN_LINK_O32 && CPU_BIG_ENDIAN + menu "Power management options" =20 config ARCH_HIBERNATION_POSSIBLE --- base-commit: 8f0b4cce4481fb22653697cced8d0d04027cb1e8 change-id: 20251222-cc-can-link-mips-c9c0e06b61f7 Best regards, --=20 Thomas Wei=C3=9Fschuh