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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2a3e3cd46a9sm98638195ad.93.2026.01.08.23.42.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Jan 2026 23:42:49 -0800 (PST) From: Wangao Wang Date: Fri, 09 Jan 2026 15:42:30 +0800 Subject: [PATCH v3 1/6] media: qcom: iris: Add intra refresh support for gen1 encoder Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260109-batch2_iris_encoder_enhancements-v3-1-196855ef32ba@oss.qualcomm.com> References: <20260109-batch2_iris_encoder_enhancements-v3-0-196855ef32ba@oss.qualcomm.com> In-Reply-To: <20260109-batch2_iris_encoder_enhancements-v3-0-196855ef32ba@oss.qualcomm.com> To: Vikash Garodia , Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab Cc: quic_qiweil@quicinc.com, Renjiang Han , Wangao Wang , linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1767944563; l=7732; i=wangao.wang@oss.qualcomm.com; s=20251021; h=from:subject:message-id; bh=nIfWHbo8tV1M0b0OU9vJP6hz1dzB/dy539hJzfJpt74=; b=1UXOW7fhykUMw4iEs2sVKcK8tHjqGO1+19z1gkp8uMgoVZSv1eepF2KIJxp47rVvO64wmPggj JA4L1viT+GPBQeCGgAYiyNH7F0LipZllOuuO4oShhPhkdIvztwH2tu8 X-Developer-Key: i=wangao.wang@oss.qualcomm.com; a=ed25519; pk=bUPgYblBUAsoPyGfssbNR7ZXUSGF8v1VF4FJzSO6/aA= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTA5MDA1MyBTYWx0ZWRfX8jiHE/kNGH+i 7Qj874kuOgPKgVhFhUrpzMc4F6ifnSBOFey97D+XXCmXJIz3p5XcNgr3qqCi3wVU159flVjgk6K VXhjcTsCRKuPyVoyTYiuH0213L7+ek8kBhNCIL+WXrjiAp0+mVbyK7LGt7kK1DeAil091Hy6vWU YsjAVAfnbZf07wb73etcCf6w1sjExhXeyehp11ejSRBXOwu1y9mus4JxD+OdwZJqmXeQmQPzcc+ cdDO1hupk2b1bnyNFm5AzDyI048W7lLz/3GT7dIzVdYV+bADx7X6NKA6XYNzmi4WAVJy7GhcNfN RFyDIwL8OC08Cbjf6Y9q8EpBIMDJ5UShCWHBT4kXah8+1sA9QjM9e+SpyFdW3TQd/n7Igyj/+Cr e5Dxw8W55eDL12M0q5oDMUJcnluyNKm2nsjEw3wcZm2F8iNXak4C6GrslmB7Pw6Etqed85Iy9KU Olb6cUtsPuTqVBn3/Ow== X-Proofpoint-ORIG-GUID: gk8tCuJC8526XH-qHHwUhpdlXQqSqeJD X-Authority-Analysis: v=2.4 cv=ENILElZC c=1 sm=1 tr=0 ts=6960b17d cx=c_pps a=Oh5Dbbf/trHjhBongsHeRQ==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=vUbySO9Y5rIA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=vcDqveFK9my7lXZq-ZEA:9 a=QEXdDO2ut3YA:10 a=_Vgx9l1VpLgwpw_dHYaR:22 X-Proofpoint-GUID: gk8tCuJC8526XH-qHHwUhpdlXQqSqeJD X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2026-01-09_02,2026-01-08_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 impostorscore=0 suspectscore=0 phishscore=0 priorityscore=1501 clxscore=1015 malwarescore=0 bulkscore=0 adultscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2512120000 definitions=main-2601090053 Add support for intra refresh configuration on gen1 encoder by enabling V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD and V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE controls. Signed-off-by: Wangao Wang Reviewed-by: Dikshita Agarwal Tested-by: Neil Armstrong # on SM8650-HDK --- drivers/media/platform/qcom/iris/iris_ctrls.c | 39 ++++++++++++++++++= +++- drivers/media/platform/qcom/iris/iris_ctrls.h | 3 +- .../platform/qcom/iris/iris_hfi_gen1_command.c | 8 +++++ .../platform/qcom/iris/iris_hfi_gen1_defines.h | 13 ++++++++ .../media/platform/qcom/iris/iris_platform_gen1.c | 19 +++++++++++ .../media/platform/qcom/iris/iris_platform_gen2.c | 2 +- 6 files changed, 81 insertions(+), 3 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_ctrls.c b/drivers/media/= platform/qcom/iris/iris_ctrls.c index 1910aa31a9b9218e9423f2916aa40b85185f0dfb..eae4fedc929e980eb001a5a6625= 159958d53a3d1 100644 --- a/drivers/media/platform/qcom/iris/iris_ctrls.c +++ b/drivers/media/platform/qcom/iris/iris_ctrls.c @@ -962,7 +962,44 @@ int iris_set_flip(struct iris_inst *inst, enum platfor= m_inst_fw_cap_type cap_id) &hfi_val, sizeof(u32)); } =20 -int iris_set_ir_period(struct iris_inst *inst, enum platform_inst_fw_cap_t= ype cap_id) +int iris_set_ir_period_gen1(struct iris_inst *inst, enum platform_inst_fw_= cap_type cap_id) +{ + const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; + struct v4l2_pix_format_mplane *fmt =3D &inst->fmt_dst->fmt.pix_mp; + u32 codec_align =3D inst->codec =3D=3D V4L2_PIX_FMT_HEVC ? 32 : 16; + u32 ir_period =3D inst->fw_caps[cap_id].value; + u32 hfi_id =3D inst->fw_caps[cap_id].hfi_id; + struct hfi_intra_refresh hfi_val; + + if (!ir_period) + return -EINVAL; + + if (inst->fw_caps[IR_TYPE].value =3D=3D + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM) { + hfi_val.mode =3D HFI_INTRA_REFRESH_RANDOM; + } else if (inst->fw_caps[IR_TYPE].value =3D=3D + V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC) { + hfi_val.mode =3D HFI_INTRA_REFRESH_CYCLIC; + } else { + return -EINVAL; + } + + /* + * Calculate the number of macroblocks in a frame, + * then determine how many macroblocks need to be + * refreshed within one ir_period. + */ + hfi_val.mbs =3D (fmt->width / codec_align) * (fmt->height / codec_align); + hfi_val.mbs /=3D ir_period; + + return hfi_ops->session_set_property(inst, hfi_id, + HFI_HOST_FLAGS_NONE, + iris_get_port_info(inst, cap_id), + HFI_PAYLOAD_STRUCTURE, + &hfi_val, sizeof(hfi_val)); +} + +int iris_set_ir_period_gen2(struct iris_inst *inst, enum platform_inst_fw_= cap_type cap_id) { const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; struct vb2_queue *q =3D v4l2_m2m_get_dst_vq(inst->m2m_ctx); diff --git a/drivers/media/platform/qcom/iris/iris_ctrls.h b/drivers/media/= platform/qcom/iris/iris_ctrls.h index 9518803577bc39f5c1339a49878dd0c3e8f510ad..a0d5338bdc910bd30407132e8b7= 00c333ad74e4c 100644 --- a/drivers/media/platform/qcom/iris/iris_ctrls.h +++ b/drivers/media/platform/qcom/iris/iris_ctrls.h @@ -34,7 +34,8 @@ int iris_set_frame_qp(struct iris_inst *inst, enum platfo= rm_inst_fw_cap_type cap int iris_set_qp_range(struct iris_inst *inst, enum platform_inst_fw_cap_ty= pe cap_id); int iris_set_rotation(struct iris_inst *inst, enum platform_inst_fw_cap_ty= pe cap_id); int iris_set_flip(struct iris_inst *inst, enum platform_inst_fw_cap_type c= ap_id); -int iris_set_ir_period(struct iris_inst *inst, enum platform_inst_fw_cap_t= ype cap_id); +int iris_set_ir_period_gen1(struct iris_inst *inst, enum platform_inst_fw_= cap_type cap_id); +int iris_set_ir_period_gen2(struct iris_inst *inst, enum platform_inst_fw_= cap_type cap_id); int iris_set_properties(struct iris_inst *inst, u32 plane); =20 #endif diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c b/dri= vers/media/platform/qcom/iris/iris_hfi_gen1_command.c index 52da7ef7bab08fb1cb2ac804ccc6e3c7f9677890..4d9632ba86bc8f629cee6d726eb= 44efcdeba2475 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c +++ b/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c @@ -685,6 +685,14 @@ iris_hfi_gen1_packet_session_set_property(struct hfi_s= ession_set_property_pkt *p packet->shdr.hdr.size +=3D sizeof(u32) + sizeof(*plane_actual_info); break; } + case HFI_PROPERTY_PARAM_VENC_INTRA_REFRESH: { + struct hfi_intra_refresh *in =3D pdata, *intra_refresh =3D prop_data; + + intra_refresh->mode =3D in->mode; + intra_refresh->mbs =3D in->mbs; + packet->shdr.hdr.size +=3D sizeof(u32) + sizeof(*intra_refresh); + break; + } default: return -EINVAL; } diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen1_defines.h b/dri= vers/media/platform/qcom/iris/iris_hfi_gen1_defines.h index 42226ccee3d9b9eb5f793c3be127acd8afad2138..04c79ee0463d7f32a2042044fe4= 564718cc01561 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_gen1_defines.h +++ b/drivers/media/platform/qcom/iris/iris_hfi_gen1_defines.h @@ -139,6 +139,14 @@ #define HFI_PROPERTY_PARAM_VENC_H264_DEBLOCK_CONTROL 0x2005003 #define HFI_PROPERTY_PARAM_VENC_RATE_CONTROL 0x2005004 #define HFI_PROPERTY_PARAM_VENC_SESSION_QP_RANGE_V2 0x2005009 + +#define HFI_INTRA_REFRESH_NONE 0x1 +#define HFI_INTRA_REFRESH_CYCLIC 0x2 +#define HFI_INTRA_REFRESH_ADAPTIVE 0x3 +#define HFI_INTRA_REFRESH_CYCLIC_ADAPTIVE 0x4 +#define HFI_INTRA_REFRESH_RANDOM 0x5 + +#define HFI_PROPERTY_PARAM_VENC_INTRA_REFRESH 0x200500d #define HFI_PROPERTY_PARAM_VENC_MAX_NUM_B_FRAMES 0x2005020 #define HFI_PROPERTY_CONFIG_VENC_TARGET_BITRATE 0x2006001 #define HFI_PROPERTY_CONFIG_VENC_SYNC_FRAME_SEQUENCE_HEADER 0x2006008 @@ -447,6 +455,11 @@ struct hfi_framerate { u32 framerate; }; =20 +struct hfi_intra_refresh { + u32 mode; + u32 mbs; +}; + struct hfi_event_data { u32 error; u32 height; diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen1.c b/driver= s/media/platform/qcom/iris/iris_platform_gen1.c index 34cbeb8f52e248b6aec3e0ee911e14d50df07cce..338f33f39cdc09094c63e476572= b0a58afc7ef67 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_gen1.c +++ b/drivers/media/platform/qcom/iris/iris_platform_gen1.c @@ -230,6 +230,25 @@ static const struct platform_inst_fw_cap inst_fw_cap_s= m8250_enc[] =3D { .flags =3D CAP_FLAG_OUTPUT_PORT, .set =3D iris_set_qp_range, }, + { + .cap_id =3D IR_TYPE, + .min =3D V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM, + .max =3D V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC, + .step_or_mask =3D BIT(V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RAND= OM) | + BIT(V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC), + .value =3D V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM, + .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + }, + { + .cap_id =3D IR_PERIOD, + .min =3D 0, + .max =3D ((4096 * 2304) >> 8), + .step_or_mask =3D 1, + .value =3D 0, + .hfi_id =3D HFI_PROPERTY_PARAM_VENC_INTRA_REFRESH, + .flags =3D CAP_FLAG_OUTPUT_PORT, + .set =3D iris_set_ir_period_gen1, + }, }; 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case V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD: return IR_PERIOD; + case V4L2_CID_MPEG_VIDEO_LTR_COUNT: + return LTR_COUNT; + case V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES: + return USE_LTR; + case V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX: + return MARK_LTR; default: return INST_FW_CAP_MAX; } @@ -205,6 +211,12 @@ static u32 iris_get_v4l2_id(enum platform_inst_fw_cap_= type cap_id) return V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE; case IR_PERIOD: return V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD; + case LTR_COUNT: + return V4L2_CID_MPEG_VIDEO_LTR_COUNT; + case USE_LTR: + return V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES; + case MARK_LTR: + return V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX; default: return 0; } @@ -1025,6 +1037,122 @@ int iris_set_ir_period_gen2(struct iris_inst *inst,= enum platform_inst_fw_cap_ty &ir_period, sizeof(u32)); } =20 +int iris_set_ltr_count_gen1(struct iris_inst *inst, enum platform_inst_fw_= cap_type cap_id) +{ + const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; + u32 ltr_count =3D inst->fw_caps[cap_id].value; + u32 hfi_id =3D inst->fw_caps[cap_id].hfi_id; + struct hfi_ltr_mode ltr_mode; + + if (!ltr_count) + return -EINVAL; + + ltr_mode.count =3D ltr_count; + ltr_mode.mode =3D HFI_LTR_MODE_MANUAL; + ltr_mode.trust_mode =3D 1; + + return hfi_ops->session_set_property(inst, hfi_id, + HFI_HOST_FLAGS_NONE, + iris_get_port_info(inst, cap_id), + HFI_PAYLOAD_STRUCTURE, + <r_mode, sizeof(ltr_mode)); +} + +int iris_set_use_ltr(struct iris_inst *inst, enum platform_inst_fw_cap_typ= e cap_id) +{ + const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; + struct vb2_queue *sq =3D v4l2_m2m_get_src_vq(inst->m2m_ctx); + struct vb2_queue *dq =3D v4l2_m2m_get_dst_vq(inst->m2m_ctx); + u32 ltr_count =3D inst->fw_caps[LTR_COUNT].value; + u32 hfi_id =3D inst->fw_caps[cap_id].hfi_id; + struct hfi_ltr_use ltr_use; + + if (!vb2_is_streaming(sq) && !vb2_is_streaming(dq)) + return -EINVAL; + + if (!ltr_count) + return -EINVAL; + + ltr_use.ref_ltr =3D inst->fw_caps[cap_id].value; + ltr_use.use_constrnt =3D true; + ltr_use.frames =3D 0; + + return hfi_ops->session_set_property(inst, hfi_id, + HFI_HOST_FLAGS_NONE, + iris_get_port_info(inst, cap_id), + HFI_PAYLOAD_STRUCTURE, + <r_use, sizeof(ltr_use)); +} + +int iris_set_mark_ltr(struct iris_inst *inst, enum platform_inst_fw_cap_ty= pe cap_id) +{ + const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; + struct vb2_queue *sq =3D v4l2_m2m_get_src_vq(inst->m2m_ctx); + struct vb2_queue *dq =3D v4l2_m2m_get_dst_vq(inst->m2m_ctx); + u32 ltr_count =3D inst->fw_caps[LTR_COUNT].value; + u32 hfi_id =3D inst->fw_caps[cap_id].hfi_id; + struct hfi_ltr_mark ltr_mark; + + if (!vb2_is_streaming(sq) && !vb2_is_streaming(dq)) + return -EINVAL; + + if (!ltr_count) + return -EINVAL; + + ltr_mark.mark_frame =3D inst->fw_caps[cap_id].value; + + return hfi_ops->session_set_property(inst, hfi_id, + HFI_HOST_FLAGS_NONE, + iris_get_port_info(inst, cap_id), + HFI_PAYLOAD_STRUCTURE, + <r_mark, sizeof(ltr_mark)); +} + +int iris_set_ltr_count_gen2(struct iris_inst *inst, enum platform_inst_fw_= cap_type cap_id) +{ + const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; + u32 ltr_count =3D inst->fw_caps[cap_id].value; + u32 hfi_id =3D inst->fw_caps[cap_id].hfi_id; + + if (!ltr_count) + return -EINVAL; + + if (inst->hfi_rc_type =3D=3D HFI_RC_CBR_VFR || + inst->hfi_rc_type =3D=3D HFI_RC_CBR_CFR || + inst->hfi_rc_type =3D=3D HFI_RC_OFF) { + inst->fw_caps[LTR_COUNT].value =3D 0; + return -EINVAL; + } + + return hfi_ops->session_set_property(inst, hfi_id, + HFI_HOST_FLAGS_NONE, + iris_get_port_info(inst, cap_id), + HFI_PAYLOAD_U32, + <r_count, sizeof(u32)); +} + +int iris_set_use_and_mark_ltr(struct iris_inst *inst, enum platform_inst_f= w_cap_type cap_id) +{ + const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; + struct vb2_queue *sq =3D v4l2_m2m_get_src_vq(inst->m2m_ctx); + struct vb2_queue *dq =3D v4l2_m2m_get_dst_vq(inst->m2m_ctx); + u32 ltr_count =3D inst->fw_caps[LTR_COUNT].value; + u32 hfi_val =3D inst->fw_caps[cap_id].value; + u32 hfi_id =3D inst->fw_caps[cap_id].hfi_id; + + if (!vb2_is_streaming(sq) && !vb2_is_streaming(dq)) + return -EINVAL; + + if (!ltr_count || hfi_val =3D=3D INVALID_DEFAULT_MARK_OR_USE_LTR) + return -EINVAL; + + return hfi_ops->session_set_property(inst, hfi_id, + HFI_HOST_FLAGS_NONE, + iris_get_port_info(inst, cap_id), + HFI_PAYLOAD_U32, + &hfi_val, sizeof(u32)); +} + int iris_set_properties(struct iris_inst *inst, u32 plane) { const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; diff --git a/drivers/media/platform/qcom/iris/iris_ctrls.h b/drivers/media/= platform/qcom/iris/iris_ctrls.h index a0d5338bdc910bd30407132e8b700c333ad74e4c..996c83fdc6f492dc252771129fc= 1d62e8b7a7e07 100644 --- a/drivers/media/platform/qcom/iris/iris_ctrls.h +++ b/drivers/media/platform/qcom/iris/iris_ctrls.h @@ -36,6 +36,11 @@ int iris_set_rotation(struct iris_inst *inst, enum platf= orm_inst_fw_cap_type cap int iris_set_flip(struct iris_inst *inst, enum platform_inst_fw_cap_type c= ap_id); int iris_set_ir_period_gen1(struct iris_inst *inst, enum platform_inst_fw_= cap_type cap_id); int iris_set_ir_period_gen2(struct iris_inst *inst, enum platform_inst_fw_= cap_type cap_id); +int iris_set_ltr_count_gen1(struct iris_inst *inst, enum platform_inst_fw_= cap_type cap_id); +int iris_set_ltr_count_gen2(struct iris_inst *inst, enum platform_inst_fw_= cap_type cap_id); +int iris_set_use_ltr(struct iris_inst *inst, enum platform_inst_fw_cap_typ= e cap_id); +int iris_set_mark_ltr(struct iris_inst *inst, enum platform_inst_fw_cap_ty= pe cap_id); +int iris_set_use_and_mark_ltr(struct iris_inst *inst, enum platform_inst_f= w_cap_type cap_id); int iris_set_properties(struct iris_inst *inst, u32 plane); =20 #endif diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c b/dri= vers/media/platform/qcom/iris/iris_hfi_gen1_command.c index 4d9632ba86bc8f629cee6d726eb44efcdeba2475..139e7a9321d30d3e348671f99b0= fa81afed4827e 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c +++ b/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c @@ -693,6 +693,31 @@ iris_hfi_gen1_packet_session_set_property(struct hfi_s= ession_set_property_pkt *p packet->shdr.hdr.size +=3D sizeof(u32) + sizeof(*intra_refresh); break; } + case HFI_PROPERTY_PARAM_VENC_LTRMODE: { + struct hfi_ltr_mode *in =3D pdata, *ltr_mode =3D prop_data; + + ltr_mode->mode =3D in->mode; + ltr_mode->count =3D in->count; + ltr_mode->trust_mode =3D in->trust_mode; + packet->shdr.hdr.size +=3D sizeof(u32) + sizeof(*ltr_mode); + break; + } + case HFI_PROPERTY_CONFIG_VENC_USELTRFRAME: { + struct hfi_ltr_use *in =3D pdata, *ltr_use =3D prop_data; + + ltr_use->frames =3D in->frames; + ltr_use->ref_ltr =3D in->ref_ltr; + ltr_use->use_constrnt =3D in->use_constrnt; + packet->shdr.hdr.size +=3D sizeof(u32) + sizeof(*ltr_use); + break; + } + case HFI_PROPERTY_CONFIG_VENC_MARKLTRFRAME: { + struct hfi_ltr_mark *in =3D pdata, *ltr_mark =3D prop_data; + + ltr_mark->mark_frame =3D in->mark_frame; + packet->shdr.hdr.size +=3D sizeof(u32) + sizeof(*ltr_mark); + break; + } default: return -EINVAL; } diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen1_defines.h b/dri= vers/media/platform/qcom/iris/iris_hfi_gen1_defines.h index 04c79ee0463d7f32a2042044fe4564718cc01561..34249fc0d047918c2463517b830= 3e30df3666b97 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_gen1_defines.h +++ b/drivers/media/platform/qcom/iris/iris_hfi_gen1_defines.h @@ -147,8 +147,16 @@ #define HFI_INTRA_REFRESH_RANDOM 0x5 =20 #define HFI_PROPERTY_PARAM_VENC_INTRA_REFRESH 0x200500d + +#define HFI_LTR_MODE_DISABLE 0x0 +#define HFI_LTR_MODE_MANUAL 0x1 +#define HFI_LTR_MODE_PERIODIC 0x2 + +#define HFI_PROPERTY_PARAM_VENC_LTRMODE 0x200501c #define HFI_PROPERTY_PARAM_VENC_MAX_NUM_B_FRAMES 0x2005020 #define HFI_PROPERTY_CONFIG_VENC_TARGET_BITRATE 0x2006001 +#define HFI_PROPERTY_CONFIG_VENC_MARKLTRFRAME 0x2006009 +#define HFI_PROPERTY_CONFIG_VENC_USELTRFRAME 0x200600a #define HFI_PROPERTY_CONFIG_VENC_SYNC_FRAME_SEQUENCE_HEADER 0x2006008 =20 struct hfi_pkt_hdr { @@ -460,6 +468,22 @@ struct hfi_intra_refresh { u32 mbs; }; =20 +struct hfi_ltr_mode { + u32 mode; + u32 count; + u32 trust_mode; +}; + +struct hfi_ltr_use { + u32 ref_ltr; + u32 use_constrnt; + u32 frames; +}; + +struct hfi_ltr_mark { + u32 mark_frame; +}; + struct hfi_event_data { u32 error; u32 height; diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen2_defines.h b/dri= vers/media/platform/qcom/iris/iris_hfi_gen2_defines.h index f6a214a6815420f299be70f80732943d02168f0c..2b8c87c25a066ead30bb1b134bd= c3fe1e84e8f05 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_gen2_defines.h +++ b/drivers/media/platform/qcom/iris/iris_hfi_gen2_defines.h @@ -71,6 +71,9 @@ enum hfi_rate_control { #define HFI_PROP_MIN_QP_PACKED 0x0300012f #define HFI_PROP_MAX_QP_PACKED 0x03000130 #define HFI_PROP_IR_RANDOM_PERIOD 0x03000131 +#define HFI_PROP_LTR_COUNT 0x03000134 +#define HFI_PROP_LTR_MARK 0x03000135 +#define HFI_PROP_LTR_USE 0x03000136 #define HFI_PROP_TOTAL_BITRATE 0x0300013b #define HFI_PROP_MAX_GOP_FRAMES 0x03000146 #define HFI_PROP_MAX_B_FRAMES 0x03000147 diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/driv= ers/media/platform/qcom/iris/iris_platform_common.h index dd0a4210a2647ff4dadf8d67b71c6f4a22deb548..c48dfb6d47734fadd4f2e4123c9= 3560f55355b86 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_common.h +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h @@ -29,6 +29,9 @@ struct iris_inst; #define MAX_QP_HEVC 63 #define DEFAULT_QP 20 #define BITRATE_DEFAULT 20000000 +#define INVALID_DEFAULT_MARK_OR_USE_LTR -1 +#define MAX_LTR_FRAME_COUNT_GEN1 4 +#define MAX_LTR_FRAME_COUNT_GEN2 2 =20 enum stage_type { STAGE_1 =3D 1, @@ -148,6 +151,9 @@ enum platform_inst_fw_cap_type { VFLIP, IR_TYPE, IR_PERIOD, + LTR_COUNT, + USE_LTR, + MARK_LTR, INST_FW_CAP_MAX, }; =20 diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen1.c b/driver= s/media/platform/qcom/iris/iris_platform_gen1.c index 338f33f39cdc09094c63e476572b0a58afc7ef67..6650414fd8b7f127062e95f2920= 3a55b33a43fa2 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_gen1.c +++ b/drivers/media/platform/qcom/iris/iris_platform_gen1.c @@ -249,6 +249,36 @@ static const struct platform_inst_fw_cap inst_fw_cap_s= m8250_enc[] =3D { .flags =3D CAP_FLAG_OUTPUT_PORT, .set =3D iris_set_ir_period_gen1, }, + { + .cap_id =3D LTR_COUNT, + .min =3D 0, + .max =3D MAX_LTR_FRAME_COUNT_GEN1, + .step_or_mask =3D 1, + .value =3D 0, + .hfi_id =3D HFI_PROPERTY_PARAM_VENC_LTRMODE, + .flags =3D CAP_FLAG_OUTPUT_PORT, + .set =3D iris_set_ltr_count_gen1, + }, + { + .cap_id =3D USE_LTR, + .min =3D 0, + .max =3D ((1 << MAX_LTR_FRAME_COUNT_GEN1) - 1), + .step_or_mask =3D 0, + .value =3D 0, + .hfi_id =3D HFI_PROPERTY_CONFIG_VENC_USELTRFRAME, + .flags =3D CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + .set =3D iris_set_use_ltr, + }, + { + .cap_id =3D MARK_LTR, + .min =3D 0, + .max =3D (MAX_LTR_FRAME_COUNT_GEN1 - 1), + .step_or_mask =3D 1, + .value =3D 0, + .hfi_id =3D HFI_PROPERTY_CONFIG_VENC_MARKLTRFRAME, + .flags =3D CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + .set =3D iris_set_mark_ltr, + }, }; =20 static struct platform_inst_caps platform_inst_cap_sm8250 =3D { diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c b/driver= s/media/platform/qcom/iris/iris_platform_gen2.c index b3425dcea22ceadbd56021e5859a24134100d5df..6ae34312f50d4a3709ca20b3aad= cfee12338a2f7 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c +++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c @@ -637,6 +637,36 @@ static const struct platform_inst_fw_cap inst_fw_cap_s= m8550_enc[] =3D { CAP_FLAG_DYNAMIC_ALLOWED, .set =3D iris_set_ir_period_gen2, }, + { + .cap_id =3D LTR_COUNT, + .min =3D 0, + .max =3D MAX_LTR_FRAME_COUNT_GEN2, + .step_or_mask =3D 1, + .value =3D 0, + .hfi_id =3D HFI_PROP_LTR_COUNT, + .flags =3D CAP_FLAG_OUTPUT_PORT, + .set =3D iris_set_ltr_count_gen2, + }, + { + .cap_id =3D USE_LTR, + .min =3D 0, + .max =3D ((1 << MAX_LTR_FRAME_COUNT_GEN2) - 1), + .step_or_mask =3D 0, + .value =3D 0, + .hfi_id =3D HFI_PROP_LTR_USE, + .flags =3D CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + .set =3D iris_set_use_and_mark_ltr, + }, + { + .cap_id =3D MARK_LTR, + .min =3D INVALID_DEFAULT_MARK_OR_USE_LTR, + .max =3D (MAX_LTR_FRAME_COUNT_GEN2 - 1), + .step_or_mask =3D 1, + .value =3D INVALID_DEFAULT_MARK_OR_USE_LTR, + .hfi_id =3D HFI_PROP_LTR_MARK, + .flags =3D CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + .set =3D iris_set_use_and_mark_ltr, + }, }; =20 static struct platform_inst_caps platform_inst_cap_sm8550 =3D { diff --git a/drivers/media/platform/qcom/iris/iris_vpu_buffer.c b/drivers/m= edia/platform/qcom/iris/iris_vpu_buffer.c index 1e54ace966c74956208d88f06837b97b1fd48e17..b7413edfbc5646fbdee6139d1e6= 897d730e2c8d1 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu_buffer.c +++ b/drivers/media/platform/qcom/iris/iris_vpu_buffer.c @@ -668,6 +668,19 @@ static u32 iris_vpu_enc_bin_size(struct iris_inst *ins= t) num_vpp_pipes, inst->hfi_rc_type); } =20 +static inline u32 hfi_buffer_get_recon_count(struct iris_inst *inst) +{ + u32 num_ref =3D 1; + u32 ltr_count; + + ltr_count =3D inst->fw_caps[LTR_COUNT].value; + + if (ltr_count) + num_ref =3D num_ref + ltr_count; + + return num_ref; +} + static inline u32 hfi_buffer_comv_enc(u32 frame_width, u32 frame_height, u32 lcu_size, u32 num_recon, u32 standard) @@ -693,7 +706,7 @@ static u32 iris_vpu_enc_comv_size(struct iris_inst *ins= t) { u32 height =3D iris_vpu_enc_get_bitstream_height(inst); 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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2a3e3cd46a9sm98638195ad.93.2026.01.08.23.42.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Jan 2026 23:42:56 -0800 (PST) From: Wangao Wang Date: Fri, 09 Jan 2026 15:42:32 +0800 Subject: [PATCH v3 3/6] media: qcom: iris: Add B frames support for encoder Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260109-batch2_iris_encoder_enhancements-v3-3-196855ef32ba@oss.qualcomm.com> References: <20260109-batch2_iris_encoder_enhancements-v3-0-196855ef32ba@oss.qualcomm.com> In-Reply-To: <20260109-batch2_iris_encoder_enhancements-v3-0-196855ef32ba@oss.qualcomm.com> To: Vikash Garodia , Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab Cc: quic_qiweil@quicinc.com, Renjiang Han , Wangao Wang , linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1767944563; l=8694; i=wangao.wang@oss.qualcomm.com; s=20251021; h=from:subject:message-id; bh=eNf92h2XycwAqn6GgXBwodbBeaSwsDpdlIqrITfFu+M=; b=KsMTs5dCukBXPCu4bXDGIgsLHJHC3ejWvQwo2KtMSqJbvl57ySwTSFE2IlNQpgGTlTaY64iIP 2OKkF4GDuGeBsEXz9QRl6FTNvZmoeh348ZS1lyLxJYxKBwfSiTSfv/h X-Developer-Key: i=wangao.wang@oss.qualcomm.com; a=ed25519; pk=bUPgYblBUAsoPyGfssbNR7ZXUSGF8v1VF4FJzSO6/aA= X-Proofpoint-ORIG-GUID: Ymkj7e2GeQT28PSQai_SMA6FrAUKvcuP X-Proofpoint-GUID: Ymkj7e2GeQT28PSQai_SMA6FrAUKvcuP X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMTA5MDA1MyBTYWx0ZWRfX9KK8SiOiIevV Ij6brNFBrP9p0IrM1VLyBJ9AEzCUGhahJq4GGykQwHOskauzqRIXHaNg8rWpW1HfaaupR+msryk ouAYqhNjr+PFgqzZ+4XWA/PBPJLnMU1bNYZrlaj4P96fUFvINWAAaqwm94a1cCi1eODLjhFhmpL Y1CYMs8I2Kcc8jWJcG4e6k6Ztzy+Txy5JsaZaMZFbbw4ldJCGhE5fFMiB2BmCoxhc9AKR2IsbHA 6SClO9nW5rlJkrrbnqC1N2lL6HEdhBO3NkeANNqCeE+Tm2QA/vz0gED+cLSgXh+vSlOWCqsQMaY jRCO2XLvOOFflJAE1f6FOKnyCp01ogsI7cO+XmR8wOo/ZgdShaFx/Fp5AW1TvtkIxaGsgJE2kvm rY0oXydgtN/jMHGrtHQx6gjwO2/J9aqbFkfj5MKSX+5ip5sRkafrGDo4/mSOQPJlJHIhhLdfcnV A7fcCVQk+EnpQmwH46w== X-Authority-Analysis: v=2.4 cv=ZfAQ98VA c=1 sm=1 tr=0 ts=6960b182 cx=c_pps a=JL+w9abYAAE89/QcEU+0QA==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=vUbySO9Y5rIA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=pbVt0xer8RvNRR6Ob3QA:9 a=QEXdDO2ut3YA:10 a=324X-CrmTo6CU4MGRt3R:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2026-01-09_02,2026-01-08_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 spamscore=0 bulkscore=0 clxscore=1015 lowpriorityscore=0 adultscore=0 suspectscore=0 impostorscore=0 phishscore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2512120000 definitions=main-2601090053 Add support for B-frame configuration on both gen1 and gen2 encoders by enabling V4L2_CID_MPEG_VIDEO_B_FRAMES control. Signed-off-by: Wangao Wang Reviewed-by: Dikshita Agarwal Tested-by: Neil Armstrong # on SM8650-HDK --- drivers/media/platform/qcom/iris/iris_ctrls.c | 30 ++++++++++++++++++= ++++ drivers/media/platform/qcom/iris/iris_ctrls.h | 1 + .../platform/qcom/iris/iris_hfi_gen1_command.c | 8 ++++++ .../platform/qcom/iris/iris_hfi_gen1_defines.h | 10 ++++++++ .../platform/qcom/iris/iris_platform_common.h | 2 ++ .../media/platform/qcom/iris/iris_platform_gen1.c | 18 +++++++++++++ .../media/platform/qcom/iris/iris_platform_gen2.c | 10 ++++++++ drivers/media/platform/qcom/iris/iris_vpu_buffer.c | 6 ++++- 8 files changed, 84 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/qcom/iris/iris_ctrls.c b/drivers/media/= platform/qcom/iris/iris_ctrls.c index 428203af725ab5697ee42b5adf9557c65fafd7f4..02106a4c47db7a8b2e6461acb9d= 24a22291ff3cb 100644 --- a/drivers/media/platform/qcom/iris/iris_ctrls.c +++ b/drivers/media/platform/qcom/iris/iris_ctrls.c @@ -114,6 +114,8 @@ static enum platform_inst_fw_cap_type iris_get_cap_id(u= 32 id) return USE_LTR; case V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX: return MARK_LTR; + case V4L2_CID_MPEG_VIDEO_B_FRAMES: + return B_FRAME; default: return INST_FW_CAP_MAX; } @@ -217,6 +219,8 @@ static u32 iris_get_v4l2_id(enum platform_inst_fw_cap_t= ype cap_id) return V4L2_CID_MPEG_VIDEO_USE_LTR_FRAMES; case MARK_LTR: return V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX; + case B_FRAME: + return V4L2_CID_MPEG_VIDEO_B_FRAMES; default: return 0; } @@ -1153,6 +1157,32 @@ int iris_set_use_and_mark_ltr(struct iris_inst *inst= , enum platform_inst_fw_cap_ &hfi_val, sizeof(u32)); } =20 +int iris_set_intra_period(struct iris_inst *inst, enum platform_inst_fw_ca= p_type cap_id) +{ + const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; + u32 gop_size =3D inst->fw_caps[GOP_SIZE].value; + u32 b_frame =3D inst->fw_caps[B_FRAME].value; + u32 hfi_id =3D inst->fw_caps[cap_id].hfi_id; + struct hfi_intra_period intra_period; + + if (!gop_size || b_frame >=3D gop_size) + return -EINVAL; + + /* + * intra_period represents the length of a GOP, which includes both P-fra= mes + * and B-frames. The counts of P-frames and B-frames within a GOP must be + * communicated to the firmware. + */ + intra_period.pframes =3D (gop_size - 1) / (b_frame + 1); + intra_period.bframes =3D b_frame; + + return hfi_ops->session_set_property(inst, hfi_id, + HFI_HOST_FLAGS_NONE, + iris_get_port_info(inst, cap_id), + HFI_PAYLOAD_STRUCTURE, + &intra_period, sizeof(intra_period)); +} + int iris_set_properties(struct iris_inst *inst, u32 plane) { const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; diff --git a/drivers/media/platform/qcom/iris/iris_ctrls.h b/drivers/media/= platform/qcom/iris/iris_ctrls.h index 996c83fdc6f492dc252771129fc1d62e8b7a7e07..609258c81517b71523b682ca994= 786cdd020b07f 100644 --- a/drivers/media/platform/qcom/iris/iris_ctrls.h +++ b/drivers/media/platform/qcom/iris/iris_ctrls.h @@ -41,6 +41,7 @@ int iris_set_ltr_count_gen2(struct iris_inst *inst, enum = platform_inst_fw_cap_ty int iris_set_use_ltr(struct iris_inst *inst, enum platform_inst_fw_cap_typ= e cap_id); int iris_set_mark_ltr(struct iris_inst *inst, enum platform_inst_fw_cap_ty= pe cap_id); int iris_set_use_and_mark_ltr(struct iris_inst *inst, enum platform_inst_f= w_cap_type cap_id); +int iris_set_intra_period(struct iris_inst *inst, enum platform_inst_fw_ca= p_type cap_id); int iris_set_properties(struct iris_inst *inst, u32 plane); =20 #endif diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c b/dri= vers/media/platform/qcom/iris/iris_hfi_gen1_command.c index 139e7a9321d30d3e348671f99b0fa81afed4827e..fe51eccb903be146e83a4fb2faf= 4b4092875dea4 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c +++ b/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c @@ -718,6 +718,14 @@ iris_hfi_gen1_packet_session_set_property(struct hfi_s= ession_set_property_pkt *p packet->shdr.hdr.size +=3D sizeof(u32) + sizeof(*ltr_mark); break; } + case HFI_PROPERTY_CONFIG_VENC_INTRA_PERIOD: { + struct hfi_intra_period *in =3D pdata, *intra_period =3D prop_data; + + intra_period->pframes =3D in->pframes; + intra_period->bframes =3D in->bframes; + packet->shdr.hdr.size +=3D sizeof(u32) + sizeof(*intra_period); + break; + } default: return -EINVAL; } diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen1_defines.h b/dri= vers/media/platform/qcom/iris/iris_hfi_gen1_defines.h index 34249fc0d047918c2463517b8303e30df3666b97..4343661e86065f5623b2c02c7ee= 808a3c47a8c41 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_gen1_defines.h +++ b/drivers/media/platform/qcom/iris/iris_hfi_gen1_defines.h @@ -155,6 +155,7 @@ #define HFI_PROPERTY_PARAM_VENC_LTRMODE 0x200501c #define HFI_PROPERTY_PARAM_VENC_MAX_NUM_B_FRAMES 0x2005020 #define HFI_PROPERTY_CONFIG_VENC_TARGET_BITRATE 0x2006001 +#define HFI_PROPERTY_CONFIG_VENC_INTRA_PERIOD 0x2006003 #define HFI_PROPERTY_CONFIG_VENC_MARKLTRFRAME 0x2006009 #define HFI_PROPERTY_CONFIG_VENC_USELTRFRAME 0x200600a #define HFI_PROPERTY_CONFIG_VENC_SYNC_FRAME_SEQUENCE_HEADER 0x2006008 @@ -484,6 +485,15 @@ struct hfi_ltr_mark { u32 mark_frame; }; =20 +struct hfi_max_num_b_frames { + u32 max_num_b_frames; +}; + +struct hfi_intra_period { + u32 pframes; + u32 bframes; +}; + struct hfi_event_data { u32 error; u32 height; diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/driv= ers/media/platform/qcom/iris/iris_platform_common.h index c48dfb6d47734fadd4f2e4123c93560f55355b86..34deb32eb5be0899fee779ff99b= 3f4b8bd91529f 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_common.h +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h @@ -154,6 +154,8 @@ enum platform_inst_fw_cap_type { LTR_COUNT, USE_LTR, MARK_LTR, + B_FRAME, + INTRA_PERIOD, INST_FW_CAP_MAX, }; =20 diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen1.c b/driver= s/media/platform/qcom/iris/iris_platform_gen1.c index 6650414fd8b7f127062e95f29203a55b33a43fa2..14bb72c223dd86a0bd22d863df7= 3159169871031 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_gen1.c +++ b/drivers/media/platform/qcom/iris/iris_platform_gen1.c @@ -279,6 +279,24 @@ static const struct platform_inst_fw_cap inst_fw_cap_s= m8250_enc[] =3D { .flags =3D CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, .set =3D iris_set_mark_ltr, }, + { + .cap_id =3D B_FRAME, + .min =3D 0, + .max =3D 3, + .step_or_mask =3D 1, + .value =3D 0, + .flags =3D CAP_FLAG_OUTPUT_PORT, + }, + { + .cap_id =3D INTRA_PERIOD, + .min =3D 0, + .max =3D 1, + .step_or_mask =3D 1, + .value =3D 0, + .hfi_id =3D HFI_PROPERTY_CONFIG_VENC_INTRA_PERIOD, + .flags =3D CAP_FLAG_OUTPUT_PORT, + .set =3D iris_set_intra_period, + }, }; =20 static struct platform_inst_caps platform_inst_cap_sm8250 =3D { diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c b/driver= s/media/platform/qcom/iris/iris_platform_gen2.c index 6ae34312f50d4a3709ca20b3aadcfee12338a2f7..7c9a71755685d195a7adc806452= 3e1c33a572089 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c +++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c @@ -667,6 +667,16 @@ static const struct platform_inst_fw_cap inst_fw_cap_s= m8550_enc[] =3D { .flags =3D CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, .set =3D iris_set_use_and_mark_ltr, }, + { + .cap_id =3D B_FRAME, + .min =3D 0, + .max =3D 1, + .step_or_mask =3D 1, + .value =3D 0, + .hfi_id =3D HFI_PROP_MAX_B_FRAMES, + .flags =3D CAP_FLAG_OUTPUT_PORT, + .set =3D iris_set_u32, + }, }; =20 static struct platform_inst_caps platform_inst_cap_sm8550 =3D { diff --git a/drivers/media/platform/qcom/iris/iris_vpu_buffer.c b/drivers/m= edia/platform/qcom/iris/iris_vpu_buffer.c index b7413edfbc5646fbdee6139d1e6897d730e2c8d1..b5fb616916e5c7bf46998fc1451= 0af9c9341cf10 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu_buffer.c +++ b/drivers/media/platform/qcom/iris/iris_vpu_buffer.c @@ -670,11 +670,15 @@ static u32 iris_vpu_enc_bin_size(struct iris_inst *in= st) =20 static inline u32 hfi_buffer_get_recon_count(struct iris_inst *inst) { + u32 bframe_count, ltr_count; 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scancount=1 engine=8.22.0-2512120000 definitions=main-2601090053 Add hierarchical coding support for both gen1 and gen2 encoders by enabling the following V4L2 controls: H264: V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING, V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE, V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER HEVC(gen2 only): V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE, V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER Signed-off-by: Wangao Wang Tested-by: Neil Armstrong # on SM8650-HDK --- drivers/media/platform/qcom/iris/iris_ctrls.c | 279 +++++++++++++++++= +++- drivers/media/platform/qcom/iris/iris_ctrls.h | 7 +- .../platform/qcom/iris/iris_hfi_gen1_command.c | 21 +- .../platform/qcom/iris/iris_hfi_gen1_defines.h | 2 + .../platform/qcom/iris/iris_hfi_gen2_defines.h | 15 ++ drivers/media/platform/qcom/iris/iris_instance.h | 4 + .../platform/qcom/iris/iris_platform_common.h | 23 ++ .../media/platform/qcom/iris/iris_platform_gen1.c | 94 ++++++- .../media/platform/qcom/iris/iris_platform_gen2.c | 182 +++++++++++++- drivers/media/platform/qcom/iris/iris_vpu_buffer.c | 28 +++ 10 files changed, 647 insertions(+), 8 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_ctrls.c b/drivers/media/= platform/qcom/iris/iris_ctrls.c index 02106a4c47db7a8b2e6461acb9d24a22291ff3cb..8d04eb0b52219f5ae609fc976e5= 1f2fb04000a85 100644 --- a/drivers/media/platform/qcom/iris/iris_ctrls.c +++ b/drivers/media/platform/qcom/iris/iris_ctrls.c @@ -116,6 +116,40 @@ static enum platform_inst_fw_cap_type iris_get_cap_id(= u32 id) return MARK_LTR; case V4L2_CID_MPEG_VIDEO_B_FRAMES: return B_FRAME; + case V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING: + return LAYER_ENABLE; + case V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE: + return LAYER_TYPE_H264; + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE: + return LAYER_TYPE_HEVC; + case V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER: + return LAYER_COUNT_H264; + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER: + return LAYER_COUNT_HEVC; + case V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR: + return LAYER0_BITRATE_H264; + case V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR: + return LAYER1_BITRATE_H264; + case V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR: + return LAYER2_BITRATE_H264; + case V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR: + return LAYER3_BITRATE_H264; + case V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR: + return LAYER4_BITRATE_H264; + case V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR: + return LAYER5_BITRATE_H264; + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR: + return LAYER0_BITRATE_HEVC; + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR: + return LAYER1_BITRATE_HEVC; + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR: + return LAYER2_BITRATE_HEVC; + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR: + return LAYER3_BITRATE_HEVC; + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR: + return LAYER4_BITRATE_HEVC; + case V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR: + return LAYER5_BITRATE_HEVC; default: return INST_FW_CAP_MAX; } @@ -221,6 +255,40 @@ static u32 iris_get_v4l2_id(enum platform_inst_fw_cap_= type cap_id) return V4L2_CID_MPEG_VIDEO_FRAME_LTR_INDEX; case B_FRAME: return V4L2_CID_MPEG_VIDEO_B_FRAMES; + case LAYER_ENABLE: + return V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING; + case LAYER_TYPE_H264: + return V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_TYPE; + case LAYER_TYPE_HEVC: + return V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_TYPE; + case LAYER_COUNT_H264: + return V4L2_CID_MPEG_VIDEO_H264_HIERARCHICAL_CODING_LAYER; + case LAYER_COUNT_HEVC: + return V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_LAYER; + case LAYER0_BITRATE_H264: + return V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L0_BR; + case LAYER1_BITRATE_H264: + return V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L1_BR; + case LAYER2_BITRATE_H264: + return V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L2_BR; + case LAYER3_BITRATE_H264: + return V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L3_BR; + case LAYER4_BITRATE_H264: + return V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L4_BR; + case LAYER5_BITRATE_H264: + return V4L2_CID_MPEG_VIDEO_H264_HIER_CODING_L5_BR; + case LAYER0_BITRATE_HEVC: + return V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L0_BR; + case LAYER1_BITRATE_HEVC: + return V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L1_BR; + case LAYER2_BITRATE_HEVC: + return V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L2_BR; + case LAYER3_BITRATE_HEVC: + return V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L3_BR; + case LAYER4_BITRATE_HEVC: + return V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L4_BR; + case LAYER5_BITRATE_HEVC: + return V4L2_CID_MPEG_VIDEO_HEVC_HIER_CODING_L5_BR; default: return 0; } @@ -567,7 +635,60 @@ int iris_set_header_mode_gen2(struct iris_inst *inst, = enum platform_inst_fw_cap_ &hfi_val, sizeof(u32)); } =20 -int iris_set_bitrate(struct iris_inst *inst, enum platform_inst_fw_cap_typ= e cap_id) +int iris_set_bitrate_gen1(struct iris_inst *inst, enum platform_inst_fw_ca= p_type cap_id) +{ + const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; + u32 entropy_mode =3D inst->fw_caps[ENTROPY_MODE].value; + u32 bitrate =3D inst->fw_caps[cap_id].value; + u32 hfi_id =3D inst->fw_caps[cap_id].hfi_id; + struct hfi_bitrate hfi_val; + u32 max_bitrate; + + if (!(inst->fw_caps[cap_id].flags & CAP_FLAG_CLIENT_SET) && cap_id !=3D B= ITRATE) + return -EINVAL; + + if (inst->codec =3D=3D V4L2_PIX_FMT_HEVC) + max_bitrate =3D CABAC_MAX_BITRATE; + + if (entropy_mode =3D=3D V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC) + max_bitrate =3D CABAC_MAX_BITRATE; + else + max_bitrate =3D CAVLC_MAX_BITRATE; + + hfi_val.bitrate =3D min(bitrate, max_bitrate); + + switch (cap_id) { + case BITRATE: + case LAYER0_BITRATE_H264: + hfi_val.layer_id =3D 0; + break; + case LAYER1_BITRATE_H264: + hfi_val.layer_id =3D 1; + break; + case LAYER2_BITRATE_H264: + hfi_val.layer_id =3D 2; + break; + case LAYER3_BITRATE_H264: + hfi_val.layer_id =3D 3; + break; + case LAYER4_BITRATE_H264: + hfi_val.layer_id =3D 4; + break; + case LAYER5_BITRATE_H264: + hfi_val.layer_id =3D 5; + break; + default: + return -EINVAL; + } + + return hfi_ops->session_set_property(inst, hfi_id, + HFI_HOST_FLAGS_NONE, + iris_get_port_info(inst, cap_id), + HFI_PAYLOAD_STRUCTURE, + &hfi_val, sizeof(hfi_val)); +} + +int iris_set_bitrate_gen2(struct iris_inst *inst, enum platform_inst_fw_ca= p_type cap_id) { const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; u32 entropy_mode =3D inst->fw_caps[ENTROPY_MODE].value; @@ -1183,6 +1304,162 @@ int iris_set_intra_period(struct iris_inst *inst, e= num platform_inst_fw_cap_type &intra_period, sizeof(intra_period)); } =20 +int iris_set_layer_type(struct iris_inst *inst, enum platform_inst_fw_cap_= type cap_id) +{ + const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; + u32 layer_enable =3D inst->fw_caps[LAYER_ENABLE].value; + u32 hfi_id =3D inst->fw_caps[cap_id].hfi_id; + u32 layer_type; + + if (inst->hfi_rc_type =3D=3D HFI_RATE_CONTROL_CQ || + inst->hfi_rc_type =3D=3D HFI_RATE_CONTROL_OFF) + return -EINVAL; + + if (inst->codec =3D=3D V4L2_PIX_FMT_H264) { + if (!layer_enable || !inst->fw_caps[LAYER_COUNT_H264].value) + return -EINVAL; + + if (inst->fw_caps[LAYER_TYPE_H264].value =3D=3D + V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P) { + if (inst->hfi_rc_type =3D=3D HFI_RC_VBR_CFR) + layer_type =3D HFI_HIER_P_HYBRID_LTR; + else + layer_type =3D HFI_HIER_P_SLIDING_WINDOW; + } else if (inst->fw_caps[LAYER_TYPE_HEVC].value =3D=3D + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) { + if (inst->hfi_rc_type =3D=3D HFI_RC_VBR_CFR) + layer_type =3D HFI_HIER_B; + else + return -EINVAL; + } else { + return -EINVAL; + } + } else if (inst->codec =3D=3D V4L2_PIX_FMT_HEVC) { + if (!inst->fw_caps[LAYER_COUNT_HEVC].value) + return -EINVAL; + + if (inst->fw_caps[LAYER_TYPE_HEVC].value =3D=3D + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P) { + layer_type =3D HFI_HIER_P_SLIDING_WINDOW; + } else if (inst->fw_caps[LAYER_TYPE_HEVC].value =3D=3D + V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) { + if (inst->hfi_rc_type =3D=3D HFI_RC_VBR_CFR) + layer_type =3D HFI_HIER_B; + else + return -EINVAL; + } else { + return -EINVAL; + } + } else { + return -EINVAL; + } + + inst->hfi_layer_type =3D layer_type; + + return hfi_ops->session_set_property(inst, hfi_id, + HFI_HOST_FLAGS_NONE, + iris_get_port_info(inst, cap_id), + HFI_PAYLOAD_U32_ENUM, + &layer_type, sizeof(u32)); +} + +int iris_set_layer_count_gen1(struct iris_inst *inst, enum platform_inst_f= w_cap_type cap_id) +{ + const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; + struct vb2_queue *sq =3D v4l2_m2m_get_src_vq(inst->m2m_ctx); + struct vb2_queue *dq =3D v4l2_m2m_get_dst_vq(inst->m2m_ctx); + u32 layer_enable =3D inst->fw_caps[LAYER_ENABLE].value; + u32 layer_count =3D inst->fw_caps[cap_id].value; + u32 hfi_id, ret; + + if (!layer_enable || !layer_count) + return -EINVAL; + + inst->hfi_layer_count =3D layer_count; + + if (!vb2_is_streaming(sq) && !vb2_is_streaming(dq)) { + hfi_id =3D HFI_PROPERTY_PARAM_VENC_HIER_P_MAX_NUM_ENH_LAYER; + ret =3D hfi_ops->session_set_property(inst, hfi_id, + HFI_HOST_FLAGS_NONE, + iris_get_port_info(inst, cap_id), + HFI_PAYLOAD_U32, + &layer_count, sizeof(u32)); + if (ret) + return ret; + } + + hfi_id =3D inst->fw_caps[cap_id].hfi_id; + return hfi_ops->session_set_property(inst, hfi_id, + HFI_HOST_FLAGS_NONE, + iris_get_port_info(inst, cap_id), + HFI_PAYLOAD_U32, + &layer_count, sizeof(u32)); +} + +int iris_set_layer_count_gen2(struct iris_inst *inst, enum platform_inst_f= w_cap_type cap_id) +{ + const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; + u32 hfi_id =3D inst->fw_caps[cap_id].hfi_id; + u32 layer_type =3D inst->hfi_layer_type; + u32 layer_count, layer_count_max; + + layer_count =3D (inst->codec =3D=3D V4L2_PIX_FMT_H264) ? + inst->fw_caps[LAYER_COUNT_H264].value : + inst->fw_caps[LAYER_COUNT_HEVC].value; + + if (!layer_count) + return -EINVAL; + + if (layer_type =3D=3D HFI_HIER_B) { + layer_count_max =3D MAX_LAYER_HB; + } else if (layer_type =3D=3D HFI_HIER_P_HYBRID_LTR) { + layer_count_max =3D MAX_AVC_LAYER_HP_HYBRID_LTR; + } else if (layer_type =3D=3D HFI_HIER_P_SLIDING_WINDOW) { + if (inst->codec =3D=3D V4L2_PIX_FMT_H264) { + layer_count_max =3D MAX_AVC_LAYER_HP_SLIDING_WINDOW; + } else { + if (inst->hfi_rc_type =3D=3D HFI_RC_VBR_CFR) + layer_count_max =3D MAX_HEVC_VBR_LAYER_HP_SLIDING_WINDOW; + else + layer_count_max =3D MAX_HEVC_LAYER_HP_SLIDING_WINDOW; + } + } else { + return -EINVAL; + } + + if (layer_count > layer_count_max) + layer_count =3D layer_count_max; + + layer_count +=3D 1; /* base layer */ + inst->hfi_layer_count =3D layer_count; + + return hfi_ops->session_set_property(inst, hfi_id, + HFI_HOST_FLAGS_NONE, + iris_get_port_info(inst, cap_id), + HFI_PAYLOAD_U32, + &layer_count, sizeof(u32)); +} + +int iris_set_layer_bitrate(struct iris_inst *inst, enum platform_inst_fw_c= ap_type cap_id) +{ + const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; + u32 hfi_id =3D inst->fw_caps[cap_id].hfi_id; + u32 bitrate =3D inst->fw_caps[cap_id].value; + + /* ignore layer bitrate when total bitrate is set */ + if (inst->fw_caps[BITRATE].flags & CAP_FLAG_CLIENT_SET) + return 0; + + if (!(inst->fw_caps[cap_id].flags & CAP_FLAG_CLIENT_SET)) + return -EINVAL; + + return hfi_ops->session_set_property(inst, hfi_id, + HFI_HOST_FLAGS_NONE, + iris_get_port_info(inst, cap_id), + HFI_PAYLOAD_U32, + &bitrate, sizeof(u32)); +} + int iris_set_properties(struct iris_inst *inst, u32 plane) { const struct iris_hfi_command_ops *hfi_ops =3D inst->core->hfi_ops; diff --git a/drivers/media/platform/qcom/iris/iris_ctrls.h b/drivers/media/= platform/qcom/iris/iris_ctrls.h index 609258c81517b71523b682ca994786cdd020b07f..3c462ec9190be8935176b290588= f224fe4f144a4 100644 --- a/drivers/media/platform/qcom/iris/iris_ctrls.h +++ b/drivers/media/platform/qcom/iris/iris_ctrls.h @@ -22,7 +22,8 @@ int iris_set_level(struct iris_inst *inst, enum platform_= inst_fw_cap_type cap_id int iris_set_profile_level_gen1(struct iris_inst *inst, enum platform_inst= _fw_cap_type cap_id); int iris_set_header_mode_gen1(struct iris_inst *inst, enum platform_inst_f= w_cap_type cap_id); int iris_set_header_mode_gen2(struct iris_inst *inst, enum platform_inst_f= w_cap_type cap_id); -int iris_set_bitrate(struct iris_inst *inst, enum platform_inst_fw_cap_typ= e cap_id); +int iris_set_bitrate_gen1(struct iris_inst *inst, enum platform_inst_fw_ca= p_type cap_id); +int iris_set_bitrate_gen2(struct iris_inst *inst, enum platform_inst_fw_ca= p_type cap_id); int iris_set_peak_bitrate(struct iris_inst *inst, enum platform_inst_fw_ca= p_type cap_id); int iris_set_bitrate_mode_gen1(struct iris_inst *inst, enum platform_inst_= fw_cap_type cap_id); int iris_set_bitrate_mode_gen2(struct iris_inst *inst, enum platform_inst_= fw_cap_type cap_id); @@ -42,6 +43,10 @@ int iris_set_use_ltr(struct iris_inst *inst, enum platfo= rm_inst_fw_cap_type cap_ int iris_set_mark_ltr(struct iris_inst *inst, enum platform_inst_fw_cap_ty= pe cap_id); int iris_set_use_and_mark_ltr(struct iris_inst *inst, enum platform_inst_f= w_cap_type cap_id); int iris_set_intra_period(struct iris_inst *inst, enum platform_inst_fw_ca= p_type cap_id); +int iris_set_layer_type(struct iris_inst *inst, enum platform_inst_fw_cap_= type cap_id); +int iris_set_layer_count_gen1(struct iris_inst *inst, enum platform_inst_f= w_cap_type cap_id); +int iris_set_layer_count_gen2(struct iris_inst *inst, enum platform_inst_f= w_cap_type cap_id); +int iris_set_layer_bitrate(struct iris_inst *inst, enum platform_inst_fw_c= ap_type cap_id); int iris_set_properties(struct iris_inst *inst, u32 plane); =20 #endif diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c b/dri= vers/media/platform/qcom/iris/iris_hfi_gen1_command.c index fe51eccb903be146e83a4fb2faf4b4092875dea4..5d7d7856b35f4175225256c2aed= 619527aa5f2e8 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c +++ b/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c @@ -602,11 +602,10 @@ iris_hfi_gen1_packet_session_set_property(struct hfi_= session_set_property_pkt *p break; } case HFI_PROPERTY_CONFIG_VENC_TARGET_BITRATE: { - struct hfi_bitrate *brate =3D prop_data; - u32 *in =3D pdata; + struct hfi_bitrate *in =3D pdata, *brate =3D prop_data; =20 - brate->bitrate =3D *in; - brate->layer_id =3D 0; + brate->bitrate =3D in->bitrate; + brate->layer_id =3D in->layer_id; packet->shdr.hdr.size +=3D sizeof(u32) + sizeof(*brate); break; } @@ -726,6 +725,20 @@ iris_hfi_gen1_packet_session_set_property(struct hfi_s= ession_set_property_pkt *p packet->shdr.hdr.size +=3D sizeof(u32) + sizeof(*intra_period); break; } + case HFI_PROPERTY_PARAM_VENC_HIER_P_MAX_NUM_ENH_LAYER: { + u32 *in =3D pdata; + + packet->data[1] =3D *in; + packet->shdr.hdr.size +=3D sizeof(u32) + sizeof(u32); + break; + } + case HFI_PROPERTY_CONFIG_VENC_HIER_P_ENH_LAYER: { + u32 *in =3D pdata; + + packet->data[1] =3D *in; + packet->shdr.hdr.size +=3D sizeof(u32) + sizeof(u32); + break; + } default: return -EINVAL; } diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen1_defines.h b/dri= vers/media/platform/qcom/iris/iris_hfi_gen1_defines.h index 4343661e86065f5623b2c02c7ee808a3c47a8c41..0e4dee19238464a9671a94eaab8= eeda2d7f7ca9f 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_gen1_defines.h +++ b/drivers/media/platform/qcom/iris/iris_hfi_gen1_defines.h @@ -154,11 +154,13 @@ =20 #define HFI_PROPERTY_PARAM_VENC_LTRMODE 0x200501c #define HFI_PROPERTY_PARAM_VENC_MAX_NUM_B_FRAMES 0x2005020 +#define HFI_PROPERTY_PARAM_VENC_HIER_P_MAX_NUM_ENH_LAYER 0x2005026 #define HFI_PROPERTY_CONFIG_VENC_TARGET_BITRATE 0x2006001 #define HFI_PROPERTY_CONFIG_VENC_INTRA_PERIOD 0x2006003 #define HFI_PROPERTY_CONFIG_VENC_MARKLTRFRAME 0x2006009 #define HFI_PROPERTY_CONFIG_VENC_USELTRFRAME 0x200600a #define HFI_PROPERTY_CONFIG_VENC_SYNC_FRAME_SEQUENCE_HEADER 0x2006008 +#define HFI_PROPERTY_CONFIG_VENC_HIER_P_ENH_LAYER 0x200600b =20 struct hfi_pkt_hdr { u32 size; diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen2_defines.h b/dri= vers/media/platform/qcom/iris/iris_hfi_gen2_defines.h index 2b8c87c25a066ead30bb1b134bdc3fe1e84e8f05..558ad8ee76d7fb0a79b13dd327b= eb414b3609d3e 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_gen2_defines.h +++ b/drivers/media/platform/qcom/iris/iris_hfi_gen2_defines.h @@ -74,7 +74,22 @@ enum hfi_rate_control { #define HFI_PROP_LTR_COUNT 0x03000134 #define HFI_PROP_LTR_MARK 0x03000135 #define HFI_PROP_LTR_USE 0x03000136 + +enum hfi_layer_encoding_type { + HFI_HIER_P_SLIDING_WINDOW =3D 0x1, + HFI_HIER_P_HYBRID_LTR =3D 0x2, + HFI_HIER_B =3D 0x3, +}; + +#define HFI_PROP_LAYER_ENCODING_TYPE 0x03000138 +#define HFI_PROP_LAYER_COUNT 0x03000139 #define HFI_PROP_TOTAL_BITRATE 0x0300013b +#define HFI_PROP_BITRATE_LAYER1 0x0300013c +#define HFI_PROP_BITRATE_LAYER2 0x0300013d +#define HFI_PROP_BITRATE_LAYER3 0x0300013e +#define HFI_PROP_BITRATE_LAYER4 0x0300013f +#define HFI_PROP_BITRATE_LAYER5 0x03000140 +#define HFI_PROP_BITRATE_LAYER6 0x03000141 #define HFI_PROP_MAX_GOP_FRAMES 0x03000146 #define HFI_PROP_MAX_B_FRAMES 0x03000147 #define HFI_PROP_QUALITY_MODE 0x03000148 diff --git a/drivers/media/platform/qcom/iris/iris_instance.h b/drivers/med= ia/platform/qcom/iris/iris_instance.h index 0a0d4ace0bb6bee6ab11bd47fddb27432cd524f7..f4aa904f94ebb3c87bcdeeb6c37= 32b616d030b96 100644 --- a/drivers/media/platform/qcom/iris/iris_instance.h +++ b/drivers/media/platform/qcom/iris/iris_instance.h @@ -73,6 +73,8 @@ struct iris_fmt { * @enc_raw_height: source image height for encoder instance * @enc_scale_width: scale width for encoder instance * @enc_scale_height: scale height for encoder instance + * @hfi_layer_type: hierarchical coding layer type + * @hfi_layer_count: hierarchical coding layer count */ =20 struct iris_inst { @@ -115,6 +117,8 @@ struct iris_inst { u32 enc_raw_height; u32 enc_scale_width; u32 enc_scale_height; + u32 hfi_layer_type; + u32 hfi_layer_count; }; =20 #endif diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/driv= ers/media/platform/qcom/iris/iris_platform_common.h index 34deb32eb5be0899fee779ff99b3f4b8bd91529f..4b98c209fda49bba6caa84b8398= 09062e713fe5a 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_common.h +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h @@ -32,6 +32,12 @@ struct iris_inst; #define INVALID_DEFAULT_MARK_OR_USE_LTR -1 #define MAX_LTR_FRAME_COUNT_GEN1 4 #define MAX_LTR_FRAME_COUNT_GEN2 2 +#define MAX_LAYER_HB 3 +#define MAX_AVC_LAYER_HP_HYBRID_LTR 5 +#define MAX_AVC_LAYER_HP_SLIDING_WINDOW 3 +#define MAX_HEVC_LAYER_HP_SLIDING_WINDOW 3 +#define MAX_HEVC_VBR_LAYER_HP_SLIDING_WINDOW 5 +#define MAX_HIER_CODING_LAYER_GEN1 6 =20 enum stage_type { STAGE_1 =3D 1, @@ -156,6 +162,23 @@ enum platform_inst_fw_cap_type { MARK_LTR, B_FRAME, INTRA_PERIOD, + LAYER_ENABLE, + LAYER_TYPE_H264, + LAYER_TYPE_HEVC, + LAYER_COUNT_H264, + LAYER_COUNT_HEVC, + LAYER0_BITRATE_H264, + LAYER1_BITRATE_H264, + LAYER2_BITRATE_H264, + LAYER3_BITRATE_H264, + LAYER4_BITRATE_H264, + LAYER5_BITRATE_H264, + LAYER0_BITRATE_HEVC, + LAYER1_BITRATE_HEVC, + LAYER2_BITRATE_HEVC, + LAYER3_BITRATE_HEVC, + LAYER4_BITRATE_HEVC, + LAYER5_BITRATE_HEVC, INST_FW_CAP_MAX, }; =20 diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen1.c b/driver= s/media/platform/qcom/iris/iris_platform_gen1.c index 14bb72c223dd86a0bd22d863df73159169871031..e50b6322912c4f09f09772ccac2= fa505f9dd2b5c 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_gen1.c +++ b/drivers/media/platform/qcom/iris/iris_platform_gen1.c @@ -142,7 +142,7 @@ static const struct platform_inst_fw_cap inst_fw_cap_sm= 8250_enc[] =3D { .hfi_id =3D HFI_PROPERTY_CONFIG_VENC_TARGET_BITRATE, .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - .set =3D iris_set_bitrate, + .set =3D iris_set_bitrate_gen1, }, { .cap_id =3D BITRATE_MODE, @@ -297,6 +297,98 @@ static const struct platform_inst_fw_cap inst_fw_cap_s= m8250_enc[] =3D { .flags =3D CAP_FLAG_OUTPUT_PORT, .set =3D iris_set_intra_period, }, + { + .cap_id =3D LAYER_ENABLE, + .min =3D 0, + .max =3D 1, + .step_or_mask =3D 1, + .value =3D 0, + .flags =3D CAP_FLAG_OUTPUT_PORT, + }, + { + .cap_id =3D LAYER_TYPE_H264, + .min =3D V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + .max =3D V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + .step_or_mask =3D BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P), + .value =3D V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + }, + { + .cap_id =3D LAYER_COUNT_H264, + .min =3D 0, + .max =3D MAX_HIER_CODING_LAYER_GEN1, + .step_or_mask =3D 1, + .value =3D 0, + .hfi_id =3D HFI_PROPERTY_CONFIG_VENC_HIER_P_ENH_LAYER, + .flags =3D CAP_FLAG_OUTPUT_PORT, + .set =3D iris_set_layer_count_gen1, + }, + { + .cap_id =3D LAYER0_BITRATE_H264, + .min =3D 1, + .max =3D BITRATE_MAX, + .step_or_mask =3D 1, + .value =3D BITRATE_DEFAULT, + .hfi_id =3D HFI_PROPERTY_CONFIG_VENC_TARGET_BITRATE, + .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + .set =3D iris_set_bitrate_gen1, + }, + { + .cap_id =3D LAYER1_BITRATE_H264, + .min =3D 1, + .max =3D BITRATE_MAX, + .step_or_mask =3D 1, + .value =3D BITRATE_DEFAULT, + .hfi_id =3D HFI_PROPERTY_CONFIG_VENC_TARGET_BITRATE, + .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + .set =3D iris_set_bitrate_gen1, + }, + { + .cap_id =3D LAYER2_BITRATE_H264, + .min =3D 1, + .max =3D BITRATE_MAX, + .step_or_mask =3D 1, + .value =3D BITRATE_DEFAULT, + .hfi_id =3D HFI_PROPERTY_CONFIG_VENC_TARGET_BITRATE, + .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + .set =3D iris_set_bitrate_gen1, + }, + { + .cap_id =3D LAYER3_BITRATE_H264, + .min =3D 1, + .max =3D BITRATE_MAX, + .step_or_mask =3D 1, + .value =3D BITRATE_DEFAULT, + .hfi_id =3D HFI_PROPERTY_CONFIG_VENC_TARGET_BITRATE, + .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + .set =3D iris_set_bitrate_gen1, + }, + { + .cap_id =3D LAYER4_BITRATE_H264, + .min =3D 1, + .max =3D BITRATE_MAX, + .step_or_mask =3D 1, + .value =3D BITRATE_DEFAULT, + .hfi_id =3D HFI_PROPERTY_CONFIG_VENC_TARGET_BITRATE, + .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + .set =3D iris_set_bitrate_gen1, + }, + { + .cap_id =3D LAYER5_BITRATE_H264, + .min =3D 1, + .max =3D BITRATE_MAX, + .step_or_mask =3D 1, + .value =3D BITRATE_DEFAULT, + .hfi_id =3D HFI_PROPERTY_CONFIG_VENC_TARGET_BITRATE, + .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + .set =3D iris_set_bitrate_gen1, + }, }; =20 static struct platform_inst_caps platform_inst_cap_sm8250 =3D { diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c b/driver= s/media/platform/qcom/iris/iris_platform_gen2.c index 7c9a71755685d195a7adc8064523e1c33a572089..5ffc9ff75f7f7110867ad133a60= 06b543aea057b 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c +++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c @@ -313,7 +313,7 @@ static const struct platform_inst_fw_cap inst_fw_cap_sm= 8550_enc[] =3D { .hfi_id =3D HFI_PROP_TOTAL_BITRATE, .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, - .set =3D iris_set_bitrate, + .set =3D iris_set_bitrate_gen2, }, { .cap_id =3D BITRATE_PEAK, @@ -677,6 +677,186 @@ static const struct platform_inst_fw_cap inst_fw_cap_= sm8550_enc[] =3D { .flags =3D CAP_FLAG_OUTPUT_PORT, .set =3D iris_set_u32, }, + { + .cap_id =3D LAYER_ENABLE, + .min =3D 0, + .max =3D 1, + .step_or_mask =3D 1, + .value =3D 0, + .flags =3D CAP_FLAG_OUTPUT_PORT, + }, + { + .cap_id =3D LAYER_TYPE_H264, + .min =3D V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B, + .max =3D V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + .step_or_mask =3D BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P), + .value =3D V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P, + .hfi_id =3D HFI_PROP_LAYER_ENCODING_TYPE, + .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + }, + { + .cap_id =3D LAYER_TYPE_HEVC, + .min =3D V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B, + .max =3D V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + .step_or_mask =3D BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_B) | + BIT(V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P), + .value =3D V4L2_MPEG_VIDEO_HEVC_HIERARCHICAL_CODING_P, + .hfi_id =3D HFI_PROP_LAYER_ENCODING_TYPE, + .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, + .set =3D iris_set_layer_type, + }, + { + .cap_id =3D LAYER_COUNT_H264, + .min =3D 0, + .max =3D 5, + .step_or_mask =3D 1, + .value =3D 0, + .hfi_id =3D HFI_PROP_LAYER_COUNT, + .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + }, + { + .cap_id =3D LAYER_COUNT_HEVC, + .min =3D 0, + .max =3D 5, + .step_or_mask =3D 1, + .value =3D 0, + .hfi_id =3D HFI_PROP_LAYER_COUNT, + .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED, + .set =3D iris_set_layer_count_gen2, + }, + { + .cap_id =3D LAYER0_BITRATE_H264, + .min =3D 1, + .max =3D BITRATE_MAX, + .step_or_mask =3D 1, + .value =3D BITRATE_DEFAULT, + .hfi_id =3D HFI_PROP_BITRATE_LAYER1, + .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + .set =3D iris_set_layer_bitrate, + }, + { + .cap_id =3D LAYER1_BITRATE_H264, + .min =3D 1, + .max =3D BITRATE_MAX, + .step_or_mask =3D 1, + .value =3D BITRATE_DEFAULT, + .hfi_id =3D HFI_PROP_BITRATE_LAYER2, + .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + .set =3D iris_set_layer_bitrate, + }, + { + .cap_id =3D LAYER2_BITRATE_H264, + .min =3D 1, + .max =3D BITRATE_MAX, + .step_or_mask =3D 1, + .value =3D BITRATE_DEFAULT, + .hfi_id =3D HFI_PROP_BITRATE_LAYER3, + .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + .set =3D iris_set_layer_bitrate, + }, + { + .cap_id =3D LAYER3_BITRATE_H264, + .min =3D 1, + .max =3D BITRATE_MAX, + .step_or_mask =3D 1, + .value =3D BITRATE_DEFAULT, + .hfi_id =3D HFI_PROP_BITRATE_LAYER4, + .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + .set =3D iris_set_layer_bitrate, + }, + { + .cap_id =3D LAYER4_BITRATE_H264, + .min =3D 1, + .max =3D BITRATE_MAX, + .step_or_mask =3D 1, + .value =3D BITRATE_DEFAULT, + .hfi_id =3D HFI_PROP_BITRATE_LAYER5, + .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + .set =3D iris_set_layer_bitrate, + }, + { + .cap_id =3D LAYER5_BITRATE_H264, + .min =3D 1, + .max =3D BITRATE_MAX, + .step_or_mask =3D 1, + .value =3D BITRATE_DEFAULT, + .hfi_id =3D HFI_PROP_BITRATE_LAYER6, + .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + .set =3D iris_set_layer_bitrate, + }, + { + .cap_id =3D LAYER0_BITRATE_HEVC, + .min =3D 1, + .max =3D BITRATE_MAX, + .step_or_mask =3D 1, + .value =3D BITRATE_DEFAULT, + .hfi_id =3D HFI_PROP_BITRATE_LAYER1, + .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + .set =3D iris_set_layer_bitrate, + }, + { + .cap_id =3D LAYER1_BITRATE_HEVC, + .min =3D 1, + .max =3D BITRATE_MAX, + .step_or_mask =3D 1, + .value =3D BITRATE_DEFAULT, + .hfi_id =3D HFI_PROP_BITRATE_LAYER2, + .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + .set =3D iris_set_layer_bitrate, + }, + { + .cap_id =3D LAYER2_BITRATE_HEVC, + .min =3D 1, + .max =3D BITRATE_MAX, + .step_or_mask =3D 1, + .value =3D BITRATE_DEFAULT, + .hfi_id =3D HFI_PROP_BITRATE_LAYER3, + .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + .set =3D iris_set_layer_bitrate, + }, + { + .cap_id =3D LAYER3_BITRATE_HEVC, + .min =3D 1, + .max =3D BITRATE_MAX, + .step_or_mask =3D 1, + .value =3D BITRATE_DEFAULT, + .hfi_id =3D HFI_PROP_BITRATE_LAYER4, + .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + .set =3D iris_set_layer_bitrate, + }, + { + .cap_id =3D LAYER4_BITRATE_HEVC, + .min =3D 1, + .max =3D BITRATE_MAX, + .step_or_mask =3D 1, + .value =3D BITRATE_DEFAULT, + .hfi_id =3D HFI_PROP_BITRATE_LAYER5, + .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + .set =3D iris_set_layer_bitrate, + }, + { + .cap_id =3D LAYER5_BITRATE_HEVC, + .min =3D 1, + .max =3D BITRATE_MAX, + .step_or_mask =3D 1, + .value =3D BITRATE_DEFAULT, + .hfi_id =3D HFI_PROP_BITRATE_LAYER5, + .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | + CAP_FLAG_DYNAMIC_ALLOWED, + .set =3D iris_set_layer_bitrate, + } }; =20 static struct platform_inst_caps platform_inst_cap_sm8550 =3D { diff --git a/drivers/media/platform/qcom/iris/iris_vpu_buffer.c b/drivers/m= edia/platform/qcom/iris/iris_vpu_buffer.c index b5fb616916e5c7bf46998fc14510af9c9341cf10..c962042518fceb0f82a48956df0= 1c8f3cd26df99 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu_buffer.c +++ b/drivers/media/platform/qcom/iris/iris_vpu_buffer.c @@ -670,6 +670,8 @@ static u32 iris_vpu_enc_bin_size(struct iris_inst *inst) =20 static inline u32 hfi_buffer_get_recon_count(struct iris_inst *inst) { + u32 layer_count =3D inst->hfi_layer_count; + u32 layer_type =3D inst->hfi_layer_type; u32 bframe_count, ltr_count; u32 num_ref =3D 1; =20 @@ -679,9 +681,35 @@ static inline u32 hfi_buffer_get_recon_count(struct ir= is_inst *inst) if (bframe_count) num_ref =3D 2; =20 + /* The shift operation here is rounding logic, similar to [(x+1)/2]. */ + if (layer_type =3D=3D HFI_HIER_P_HYBRID_LTR) + num_ref =3D (layer_count + 1) >> 1; + + if (layer_type =3D=3D HFI_HIER_P_SLIDING_WINDOW) { + if (inst->codec =3D=3D V4L2_PIX_FMT_HEVC) + num_ref =3D (layer_count + 1) >> 1; + else if (inst->codec =3D=3D V4L2_PIX_FMT_H264 && layer_count < 4) + num_ref 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Previously, packet->shdr.hdr.size was incremented by sizeof(u32) in every switch case, resulting in repetitive and less maintainable logic. Signed-off-by: Wangao Wang Reviewed-by: Dikshita Agarwal Tested-by: Neil Armstrong # on SM8650-HDK --- .../platform/qcom/iris/iris_hfi_gen1_command.c | 50 +++++++++++-------= ---- 1 file changed, 25 insertions(+), 25 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c b/dri= vers/media/platform/qcom/iris/iris_hfi_gen1_command.c index 5d7d7856b35f4175225256c2aed619527aa5f2e8..08c99f9455cd6cee3244d3ca133= 4d478e31e1a26 100644 --- a/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c +++ b/drivers/media/platform/qcom/iris/iris_hfi_gen1_command.c @@ -483,7 +483,7 @@ iris_hfi_gen1_packet_session_set_property(struct hfi_se= ssion_set_property_pkt *p { void *prop_data =3D &packet->data[1]; =20 - packet->shdr.hdr.size =3D sizeof(*packet); + packet->shdr.hdr.size =3D sizeof(*packet) + sizeof(ptype); packet->shdr.hdr.pkt_type =3D HFI_CMD_SESSION_SET_PROPERTY; packet->shdr.session_id =3D inst->session_id; packet->num_properties =3D 1; @@ -496,14 +496,14 @@ iris_hfi_gen1_packet_session_set_property(struct hfi_= session_set_property_pkt *p fsize->buffer_type =3D in->buffer_type; fsize->height =3D in->height; fsize->width =3D in->width; - packet->shdr.hdr.size +=3D sizeof(u32) + sizeof(*fsize); + packet->shdr.hdr.size +=3D sizeof(*fsize); break; } case HFI_PROPERTY_CONFIG_VIDEOCORES_USAGE: { struct hfi_videocores_usage_type *in =3D pdata, *cu =3D prop_data; =20 cu->video_core_enable_mask =3D in->video_core_enable_mask; - packet->shdr.hdr.size +=3D sizeof(u32) + sizeof(*cu); + packet->shdr.hdr.size +=3D sizeof(*cu); break; } case HFI_PROPERTY_PARAM_UNCOMPRESSED_FORMAT_SELECT: { @@ -512,7 +512,7 @@ iris_hfi_gen1_packet_session_set_property(struct hfi_se= ssion_set_property_pkt *p =20 hfi->buffer_type =3D in->buffer_type; hfi->format =3D in->format; - packet->shdr.hdr.size +=3D sizeof(u32) + sizeof(*hfi); + packet->shdr.hdr.size +=3D sizeof(*hfi); break; } case HFI_PROPERTY_PARAM_UNCOMPRESSED_PLANE_ACTUAL_CONSTRAINTS_INFO: { @@ -531,7 +531,7 @@ iris_hfi_gen1_packet_session_set_property(struct hfi_se= ssion_set_property_pkt *p info->plane_format[1].buffer_alignment =3D 256; } =20 - packet->shdr.hdr.size +=3D sizeof(u32) + sizeof(*info); + packet->shdr.hdr.size +=3D sizeof(*info); break; } case HFI_PROPERTY_PARAM_BUFFER_COUNT_ACTUAL: { @@ -541,7 +541,7 @@ iris_hfi_gen1_packet_session_set_property(struct hfi_se= ssion_set_property_pkt *p count->type =3D in->type; count->count_actual =3D in->count_actual; count->count_min_host =3D in->count_min_host; - packet->shdr.hdr.size +=3D sizeof(u32) + sizeof(*count); + packet->shdr.hdr.size +=3D sizeof(*count); break; } case HFI_PROPERTY_PARAM_VDEC_MULTI_STREAM: { @@ -550,7 +550,7 @@ iris_hfi_gen1_packet_session_set_property(struct hfi_se= ssion_set_property_pkt *p =20 multi->buffer_type =3D in->buffer_type; multi->enable =3D in->enable; - packet->shdr.hdr.size +=3D sizeof(u32) + sizeof(*multi); + packet->shdr.hdr.size +=3D sizeof(*multi); break; } case HFI_PROPERTY_PARAM_BUFFER_SIZE_ACTUAL: { @@ -558,7 +558,7 @@ iris_hfi_gen1_packet_session_set_property(struct hfi_se= ssion_set_property_pkt *p =20 sz->size =3D in->size; sz->type =3D in->type; - packet->shdr.hdr.size +=3D sizeof(u32) + sizeof(*sz); + packet->shdr.hdr.size +=3D sizeof(*sz); break; } case HFI_PROPERTY_PARAM_WORK_ROUTE: { @@ -566,7 +566,7 @@ iris_hfi_gen1_packet_session_set_property(struct hfi_se= ssion_set_property_pkt *p u32 *in =3D pdata; =20 wr->video_work_route =3D *in; - packet->shdr.hdr.size +=3D sizeof(u32) + sizeof(*wr); + packet->shdr.hdr.size +=3D sizeof(*wr); break; } case HFI_PROPERTY_PARAM_WORK_MODE: { @@ -574,7 +574,7 @@ iris_hfi_gen1_packet_session_set_property(struct hfi_se= ssion_set_property_pkt *p u32 *in =3D pdata; =20 wm->video_work_mode =3D *in; - packet->shdr.hdr.size +=3D sizeof(u32) + sizeof(*wm); + packet->shdr.hdr.size +=3D sizeof(*wm); break; } case HFI_PROPERTY_PARAM_PROFILE_LEVEL_CURRENT: { @@ -590,7 +590,7 @@ iris_hfi_gen1_packet_session_set_property(struct hfi_se= ssion_set_property_pkt *p /* Level not supported, falling back to 1 */ pl->level =3D 1; =20 - packet->shdr.hdr.size +=3D sizeof(u32) + sizeof(*pl); + packet->shdr.hdr.size +=3D sizeof(*pl); break; } case HFI_PROPERTY_CONFIG_VENC_SYNC_FRAME_SEQUENCE_HEADER: { @@ -598,7 +598,7 @@ iris_hfi_gen1_packet_session_set_property(struct hfi_se= ssion_set_property_pkt *p u32 *in =3D pdata; =20 en->enable =3D *in; - packet->shdr.hdr.size +=3D sizeof(u32) + sizeof(*en); + packet->shdr.hdr.size +=3D sizeof(*en); break; } case HFI_PROPERTY_CONFIG_VENC_TARGET_BITRATE: { @@ -606,7 +606,7 @@ iris_hfi_gen1_packet_session_set_property(struct hfi_se= ssion_set_property_pkt *p =20 brate->bitrate =3D in->bitrate; brate->layer_id =3D in->layer_id; - packet->shdr.hdr.size +=3D sizeof(u32) + sizeof(*brate); + packet->shdr.hdr.size +=3D sizeof(*brate); break; } case HFI_PROPERTY_PARAM_VENC_RATE_CONTROL: { @@ -625,7 +625,7 @@ iris_hfi_gen1_packet_session_set_property(struct hfi_se= ssion_set_property_pkt *p } =20 packet->data[1] =3D *in; - packet->shdr.hdr.size +=3D sizeof(u32) * 2; + packet->shdr.hdr.size +=3D sizeof(u32); break; } case HFI_PROPERTY_PARAM_VENC_H264_ENTROPY_CONTROL: { @@ -635,7 +635,7 @@ iris_hfi_gen1_packet_session_set_property(struct hfi_se= ssion_set_property_pkt *p entropy->entropy_mode =3D *in; if (entropy->entropy_mode =3D=3D HFI_H264_ENTROPY_CABAC) entropy->cabac_model =3D HFI_H264_CABAC_MODEL_0; - packet->shdr.hdr.size +=3D sizeof(u32) + sizeof(*entropy); + packet->shdr.hdr.size +=3D sizeof(*entropy); break; } case HFI_PROPERTY_PARAM_VENC_SESSION_QP_RANGE_V2: { @@ -660,7 +660,7 @@ iris_hfi_gen1_packet_session_set_property(struct hfi_se= ssion_set_property_pkt *p ((max_qp & 0xFF) << 16); range->min_qp.enable =3D 7; range->max_qp.enable =3D 7; - packet->shdr.hdr.size +=3D sizeof(u32) + sizeof(*range); + packet->shdr.hdr.size +=3D sizeof(*range); break; } case HFI_PROPERTY_CONFIG_FRAME_RATE: { @@ -669,7 +669,7 @@ iris_hfi_gen1_packet_session_set_property(struct hfi_se= ssion_set_property_pkt *p =20 frate->buffer_type =3D in->buffer_type; frate->framerate =3D in->framerate; - packet->shdr.hdr.size +=3D sizeof(u32) + sizeof(*frate); + packet->shdr.hdr.size +=3D sizeof(*frate); break; } case HFI_PROPERTY_PARAM_UNCOMPRESSED_PLANE_ACTUAL_INFO: { @@ -681,7 +681,7 @@ iris_hfi_gen1_packet_session_set_property(struct hfi_se= ssion_set_property_pkt *p plane_actual_info->plane_format[0] =3D in->plane_format[0]; if (in->num_planes > 1) plane_actual_info->plane_format[1] =3D in->plane_format[1]; - packet->shdr.hdr.size +=3D sizeof(u32) + sizeof(*plane_actual_info); + packet->shdr.hdr.size +=3D sizeof(*plane_actual_info); break; } case HFI_PROPERTY_PARAM_VENC_INTRA_REFRESH: { @@ -689,7 +689,7 @@ iris_hfi_gen1_packet_session_set_property(struct hfi_se= ssion_set_property_pkt *p =20 intra_refresh->mode =3D in->mode; intra_refresh->mbs =3D in->mbs; - packet->shdr.hdr.size +=3D sizeof(u32) + sizeof(*intra_refresh); + packet->shdr.hdr.size +=3D sizeof(*intra_refresh); break; } case HFI_PROPERTY_PARAM_VENC_LTRMODE: { @@ -698,7 +698,7 @@ iris_hfi_gen1_packet_session_set_property(struct hfi_se= ssion_set_property_pkt *p ltr_mode->mode =3D in->mode; ltr_mode->count =3D in->count; ltr_mode->trust_mode =3D in->trust_mode; - packet->shdr.hdr.size +=3D sizeof(u32) + sizeof(*ltr_mode); + packet->shdr.hdr.size +=3D sizeof(*ltr_mode); break; } case HFI_PROPERTY_CONFIG_VENC_USELTRFRAME: { @@ -707,14 +707,14 @@ iris_hfi_gen1_packet_session_set_property(struct hfi_= session_set_property_pkt *p ltr_use->frames =3D in->frames; ltr_use->ref_ltr =3D in->ref_ltr; ltr_use->use_constrnt =3D in->use_constrnt; - packet->shdr.hdr.size +=3D sizeof(u32) + sizeof(*ltr_use); + packet->shdr.hdr.size +=3D sizeof(*ltr_use); break; } case HFI_PROPERTY_CONFIG_VENC_MARKLTRFRAME: { struct hfi_ltr_mark *in =3D pdata, *ltr_mark =3D prop_data; =20 ltr_mark->mark_frame =3D in->mark_frame; - packet->shdr.hdr.size +=3D sizeof(u32) + sizeof(*ltr_mark); + packet->shdr.hdr.size +=3D sizeof(*ltr_mark); break; } case HFI_PROPERTY_CONFIG_VENC_INTRA_PERIOD: { @@ -722,21 +722,21 @@ iris_hfi_gen1_packet_session_set_property(struct hfi_= session_set_property_pkt *p =20 intra_period->pframes =3D in->pframes; intra_period->bframes =3D in->bframes; - packet->shdr.hdr.size +=3D sizeof(u32) + sizeof(*intra_period); + packet->shdr.hdr.size +=3D sizeof(*intra_period); break; } case HFI_PROPERTY_PARAM_VENC_HIER_P_MAX_NUM_ENH_LAYER: { u32 *in =3D pdata; =20 packet->data[1] =3D *in; - packet->shdr.hdr.size +=3D sizeof(u32) + sizeof(u32); + packet->shdr.hdr.size +=3D sizeof(u32); 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Signed-off-by: Wangao Wang Reviewed-by: Dikshita Agarwal Tested-by: Neil Armstrong # on SM8650-HDK --- drivers/media/platform/qcom/iris/iris_vpu_buffer.c | 13 +++++-------- 1 file changed, 5 insertions(+), 8 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_vpu_buffer.c b/drivers/m= edia/platform/qcom/iris/iris_vpu_buffer.c index c962042518fceb0f82a48956df01c8f3cd26df99..621d5c6b4940e146f117e6b2064= 21127c7cf9656 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu_buffer.c +++ b/drivers/media/platform/qcom/iris/iris_vpu_buffer.c @@ -739,16 +739,13 @@ static u32 iris_vpu_enc_comv_size(struct iris_inst *i= nst) u32 height =3D iris_vpu_enc_get_bitstream_height(inst); u32 width =3D iris_vpu_enc_get_bitstream_width(inst); u32 num_recon =3D hfi_buffer_get_recon_count(inst); - u32 lcu_size =3D 16; + u32 codec, lcu_size; =20 - if (inst->codec =3D=3D V4L2_PIX_FMT_HEVC) { - lcu_size =3D 32; - return hfi_buffer_comv_enc(width, height, lcu_size, - num_recon + 1, HFI_CODEC_ENCODE_HEVC); - } + codec =3D (inst->codec =3D=3D V4L2_PIX_FMT_HEVC) ? + HFI_CODEC_ENCODE_HEVC : HFI_CODEC_ENCODE_AVC; + lcu_size =3D (inst->codec =3D=3D V4L2_PIX_FMT_HEVC) ? 32 : 16; =20 - return hfi_buffer_comv_enc(width, height, lcu_size, - num_recon + 1, HFI_CODEC_ENCODE_AVC); + return hfi_buffer_comv_enc(width, height, lcu_size, num_recon + 1, codec); } =20 static inline --=20 2.43.0