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Fri, 9 Jan 2026 09:07:20 -0500 (EST) From: Janne Grunau Date: Fri, 09 Jan 2026 15:07:05 +0100 Subject: [PATCH 2/3] arm64: dts: apple: t8112: Add nodes for integrated USB Type-C ports Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260109-apple-dt-usb-c-atc-dwc3-v1-2-ce0e92c1a016@jannau.net> References: <20260109-apple-dt-usb-c-atc-dwc3-v1-0-ce0e92c1a016@jannau.net> In-Reply-To: <20260109-apple-dt-usb-c-atc-dwc3-v1-0-ce0e92c1a016@jannau.net> To: Sven Peter , Neal Gompa , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Janne Grunau , Hector Martin X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=10233; i=j@jannau.net; s=yk2025; h=from:subject:message-id; bh=HVy2+R6HXjapYu4fYsJD5sDEtHI1CFXmrBKtTY5Nwvc=; b=owGbwMvMwCW2UNrmdq9+ahrjabUkhsxE7kn9AbVSD2LnS2y5+NJL5NO8W+3KXbaxuSkt/Mf3L 945S9Cwo5SFQYyLQVZMkSVJ+2UHw+oaxZjaB2Ewc1iZQIYwcHEKwESczzP8TzslL9f63v3/282S NqudYy593mlXvibw+fP0vjVLbPblz2f4n+Y+t/T6hG2SeR+j7DcWfbvb2tgd5ep2QoXjl2GwnZI sNwA= X-Developer-Key: i=j@jannau.net; a=openpgp; fpr=8B336A6BE4E5695E89B8532B81E806F586338419 From: Hector Martin Add device nodes and connections to support USB 3.x on the SoC's integrated USBi Type-C ports of M2-based devices. Each Type-C port has an Apple Type-C PHY for USB 2.0, USB 3.x, USB4/Thunderbolt, and DisplayPort, a Synopsys Designware USB 3.x controller, two DART iommu instances and a CD321x USB PD controller. The port labels use Apple's established naming scheme for the ports. Signed-off-by: Hector Martin Co-developed-by: Janne Grunau Signed-off-by: Janne Grunau --- arch/arm64/boot/dts/apple/t8112-j413.dts | 12 +++ arch/arm64/boot/dts/apple/t8112-j415.dts | 12 +++ arch/arm64/boot/dts/apple/t8112-j473.dts | 12 +++ arch/arm64/boot/dts/apple/t8112-j493.dts | 12 +++ arch/arm64/boot/dts/apple/t8112-jxxx.dtsi | 134 ++++++++++++++++++++++++++= ++++ arch/arm64/boot/dts/apple/t8112.dtsi | 105 +++++++++++++++++++++++ 6 files changed, 287 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t8112-j413.dts b/arch/arm64/boot/dts= /apple/t8112-j413.dts index 6f69658623bf89ce73e3486bce504f1f5f8003f3..21e81a8899d8d7ff5461db085b5= 3feccc7c53f64 100644 --- a/arch/arm64/boot/dts/apple/t8112-j413.dts +++ b/arch/arm64/boot/dts/apple/t8112-j413.dts @@ -60,6 +60,18 @@ bluetooth0: bluetooth@0,1 { }; }; =20 +/* + * Provide labels for the USB type C ports. + */ + +&typec0 { + label =3D "USB-C Left-back"; +}; + +&typec1 { + label =3D "USB-C Left-front"; +}; + &i2c0 { /* MagSafe port */ hpm5: usb-pd@3a { diff --git a/arch/arm64/boot/dts/apple/t8112-j415.dts b/arch/arm64/boot/dts= /apple/t8112-j415.dts index b54e218e5384ca89155e4350d6680a28a531f408..b4f72fbafaf104573c86ceff928= 3c05d43aee080 100644 --- a/arch/arm64/boot/dts/apple/t8112-j415.dts +++ b/arch/arm64/boot/dts/apple/t8112-j415.dts @@ -60,6 +60,18 @@ bluetooth0: bluetooth@0,1 { }; }; =20 +/* + * Provide labels for the USB type C ports. + */ + +&typec0 { + label =3D "USB-C Left-back"; +}; + +&typec1 { + label =3D "USB-C Left-front"; +}; + &i2c0 { /* MagSafe port */ hpm5: usb-pd@3a { diff --git a/arch/arm64/boot/dts/apple/t8112-j473.dts b/arch/arm64/boot/dts= /apple/t8112-j473.dts index 06fe257f08be498ace6906b936012e01084da702..81994f0a7df962d982b675deb4c= 35b25fa3c29f6 100644 --- a/arch/arm64/boot/dts/apple/t8112-j473.dts +++ b/arch/arm64/boot/dts/apple/t8112-j473.dts @@ -52,3 +52,15 @@ &pcie1_dart { &pcie2_dart { status =3D "okay"; }; + +/* + * Provide labels for the USB type C ports. + */ + +&typec0 { + label =3D "USB-C Back-left"; +}; + +&typec1 { + label =3D "USB-C Back-right"; +}; diff --git a/arch/arm64/boot/dts/apple/t8112-j493.dts b/arch/arm64/boot/dts= /apple/t8112-j493.dts index fb8ad7d4c65a8fe7966f5541f24f03a379143cfb..f8e442152ff23f21a46916ac111= e5f6bbc87cf83 100644 --- a/arch/arm64/boot/dts/apple/t8112-j493.dts +++ b/arch/arm64/boot/dts/apple/t8112-j493.dts @@ -108,6 +108,18 @@ bluetooth0: bluetooth@0,1 { }; }; =20 +/* + * Provide labels for the USB type C ports. + */ + +&typec0 { + label =3D "USB-C Left-back"; +}; + +&typec1 { + label =3D "USB-C Left-front"; +}; + &i2c4 { status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/apple/t8112-jxxx.dtsi b/arch/arm64/boot/dt= s/apple/t8112-jxxx.dtsi index 6da35496a4c88dbaba125ebbe8c5a4a428c647c3..562e7a25a1e8843f516c3d73272= 54049332cd08d 100644 --- a/arch/arm64/boot/dts/apple/t8112-jxxx.dtsi +++ b/arch/arm64/boot/dts/apple/t8112-jxxx.dtsi @@ -11,6 +11,8 @@ =20 / { aliases { + atcphy0 =3D &atcphy0; + atcphy1 =3D &atcphy1; serial0 =3D &serial0; serial2 =3D &serial2; }; @@ -53,6 +55,29 @@ hpm0: usb-pd@38 { interrupt-parent =3D <&pinctrl_ap>; interrupts =3D <8 IRQ_TYPE_LEVEL_LOW>; interrupt-names =3D "irq"; + + typec0: connector { + compatible =3D "usb-c-connector"; + power-role =3D "dual"; + data-role =3D "dual"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + port@0 { + reg =3D <0>; + typec0_connector_hs: endpoint { + remote-endpoint =3D <&dwc3_0_hs>; + }; + }; + port@1 { + reg =3D <1>; + typec0_connector_ss: endpoint { + remote-endpoint =3D <&atcphy0_typec_lanes>; + }; + }; + }; + }; }; =20 hpm1: usb-pd@3f { @@ -61,6 +86,115 @@ hpm1: usb-pd@3f { interrupt-parent =3D <&pinctrl_ap>; interrupts =3D <8 IRQ_TYPE_LEVEL_LOW>; interrupt-names =3D "irq"; + + typec1: connector { + compatible =3D "usb-c-connector"; + power-role =3D "dual"; + data-role =3D "dual"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + port@0 { + reg =3D <0>; + typec1_connector_hs: endpoint { + remote-endpoint =3D <&dwc3_1_hs>; + }; + }; + port@1 { + reg =3D <1>; + typec1_connector_ss: endpoint { + remote-endpoint =3D <&atcphy1_typec_lanes>; + }; + }; + }; + }; + }; +}; + +/* USB controllers */ +&dwc3_0 { + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + dwc3_0_hs: endpoint { + remote-endpoint =3D <&typec0_connector_hs>; + }; + }; + + port@1 { + reg =3D <1>; + dwc3_0_ss: endpoint { + remote-endpoint =3D <&atcphy0_usb3>; + }; + }; + }; +}; + +&dwc3_1 { + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + dwc3_1_hs: endpoint { + remote-endpoint =3D <&typec1_connector_hs>; + }; + }; + + port@1 { + reg =3D <1>; + dwc3_1_ss: endpoint { + remote-endpoint =3D <&atcphy1_usb3>; + }; + }; + }; +}; + +/* Type-C PHYs */ +&atcphy0 { + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + atcphy0_typec_lanes: endpoint { + remote-endpoint =3D <&typec0_connector_ss>; + }; + }; + + port@1 { + reg =3D <1>; + atcphy0_usb3: endpoint { + remote-endpoint =3D <&dwc3_0_ss>; + }; + }; + }; +}; + +&atcphy1 { + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + atcphy1_typec_lanes: endpoint { + remote-endpoint =3D <&typec1_connector_ss>; + }; + }; + + port@1 { + reg =3D <1>; + atcphy1_usb3: endpoint { + remote-endpoint =3D <&dwc3_1_ss>; + }; + }; }; }; =20 diff --git a/arch/arm64/boot/dts/apple/t8112.dtsi b/arch/arm64/boot/dts/app= le/t8112.dtsi index 3f79878b25af1f7760088aa552589494d67347fb..2d645cdec4a75fcfe1897d42f9a= f460e2752f2eb 100644 --- a/arch/arm64/boot/dts/apple/t8112.dtsi +++ b/arch/arm64/boot/dts/apple/t8112.dtsi @@ -11,6 +11,7 @@ #include #include #include +#include #include =20 / { @@ -1010,6 +1011,110 @@ nvme@27bcc0000 { resets =3D <&ps_ans>; }; =20 + dwc3_0: usb@382280000 { + compatible =3D "apple,t8112-dwc3", "apple,t8103-dwc3"; + reg =3D <0x3 0x82280000 0x0 0xcd00>, <0x3 0x8228cd00 0x0 0x3200>; + reg-names =3D "dwc3-core", "dwc3-apple"; + interrupt-parent =3D <&aic>; + interrupts =3D ; + dr_mode =3D "otg"; + usb-role-switch; + role-switch-default-mode =3D "host"; + iommus =3D <&dwc3_0_dart_0 0>, <&dwc3_0_dart_1 1>; + power-domains =3D <&ps_atc0_usb>; + resets =3D <&atcphy0>; + phys =3D <&atcphy0 PHY_TYPE_USB2>, <&atcphy0 PHY_TYPE_USB3>; + phy-names =3D "usb2-phy", "usb3-phy"; + }; + + dwc3_0_dart_0: iommu@382f00000 { + compatible =3D "apple,t8110-dart"; + reg =3D <0x3 0x82f00000 0x0 0x4000>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + #iommu-cells =3D <1>; + power-domains =3D <&ps_atc0_usb>; + }; + + dwc3_0_dart_1: iommu@382f80000 { + compatible =3D "apple,t8110-dart"; + reg =3D <0x3 0x82f80000 0x0 0x4000>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + #iommu-cells =3D <1>; + power-domains =3D <&ps_atc0_usb>; + }; + + atcphy0: phy@383000000 { + compatible =3D "apple,t8112-atcphy", "apple,t8103-atcphy"; + reg =3D <0x3 0x83000000 0x0 0x4c000>, + <0x3 0x83050000 0x0 0x8000>, + <0x3 0x80000000 0x0 0x4000>, + <0x3 0x82a90000 0x0 0x4000>, + <0x3 0x82a84000 0x0 0x4000>; + reg-names =3D "core", "lpdptx", "axi2af", "usb2phy", + "pipehandler"; + + #phy-cells =3D <1>; + #reset-cells =3D <0>; + + orientation-switch; + mode-switch; + power-domains =3D <&ps_atc0_usb>; + }; + + dwc3_1: usb@502280000 { + compatible =3D "apple,t8112-dwc3", "apple,t8103-dwc3"; + reg =3D <0x5 0x02280000 0x0 0xcd00>, <0x5 0x0228cd00 0x0 0x3200>; + reg-names =3D "dwc3-core", "dwc3-apple"; + interrupt-parent =3D <&aic>; + interrupts =3D ; + dr_mode =3D "otg"; + usb-role-switch; + role-switch-default-mode =3D "host"; + iommus =3D <&dwc3_1_dart_0 0>, <&dwc3_1_dart_1 1>; + power-domains =3D <&ps_atc1_usb>; + resets =3D <&atcphy1>; + phys =3D <&atcphy1 PHY_TYPE_USB2>, <&atcphy1 PHY_TYPE_USB3>; + phy-names =3D "usb2-phy", "usb3-phy"; + }; + + dwc3_1_dart_0: iommu@502f00000 { + compatible =3D "apple,t8110-dart"; + reg =3D <0x5 0x02f00000 0x0 0x4000>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + #iommu-cells =3D <1>; + power-domains =3D <&ps_atc1_usb>; + }; + + dwc3_1_dart_1: iommu@502f80000 { + compatible =3D "apple,t8110-dart"; + reg =3D <0x5 0x02f80000 0x0 0x4000>; + interrupt-parent =3D <&aic>; + interrupts =3D ; + #iommu-cells =3D <1>; + power-domains =3D <&ps_atc1_usb>; + }; + + atcphy1: phy@503000000 { + compatible =3D "apple,t8112-atcphy", "apple,t8103-atcphy"; + reg =3D <0x5 0x03000000 0x0 0x4c000>, + <0x5 0x03050000 0x0 0x8000>, + <0x5 0x0 0x0 0x4000>, + <0x5 0x02a90000 0x0 0x4000>, + <0x5 0x02a84000 0x0 0x4000>; + reg-names =3D "core", "lpdptx", "axi2af", "usb2phy", + "pipehandler"; + + #phy-cells =3D <1>; + #reset-cells =3D <0>; + + orientation-switch; + mode-switch; + power-domains =3D <&ps_atc1_usb>; + }; + pcie0_dart: iommu@681008000 { compatible =3D "apple,t8110-dart"; reg =3D <0x6 0x81008000 0x0 0x4000>; --=20 2.52.0