From nobody Sun Feb 8 08:22:34 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7E379500962 for ; Thu, 8 Jan 2026 16:50:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767891032; cv=none; b=FRzPJDBl3NB6rr7BPSCTeIVWlZgxCBtp/54pB9w74AXFFK1XMwF2/56fK9Lsak/aQd34Y5Mt1y0aIcXdiHlqySQQLazgCw1BywFwy+ydVkkq5htb4SobsGXqXpsii2quEGbKBO3x7uwK4MYyT7yWDsefesXNqywOdErZOil0Dkw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767891032; c=relaxed/simple; bh=FuMPITuYwFWewO2UB0aey92EcUClWmHL+F3deaeeq/w=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=CW+BrcpGlqPh/SuPI6Sx+jHZ14BKX61Rfj/uPlmbqlPxDPpKSUL+aDOh/pTvhqGJ0PdcjlqQBbhF2xfrhle6uj8/ZtSm4HOsrEgDOr/0a3xzRt9qdXBiU/joYEuncOxwHXdpKfWbsKPI9WQHQ2dXz5dXmKUxioPxO1Z7Ukzw3ts= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=nM3cBV98; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="nM3cBV98" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 36ABFC116C6; Thu, 8 Jan 2026 16:50:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1767891032; bh=FuMPITuYwFWewO2UB0aey92EcUClWmHL+F3deaeeq/w=; h=From:To:Cc:Subject:Date:From; b=nM3cBV98HgqW7xI46/dNh6x3tjR/JUdStRxepKQ/WNOXA7paF6ekTVBlnrTYrP66S prDwYG2uC4mgnz/tdTSS0PByS5lHKYrYW0ed9DQ0wVyj8LIvEGjZiTn8vbPVCTU+e0 DmsX/QhxUeB8QAZ0gYjnycc6R4zzJzXdpzRURTtkk9AJzzYi6j+YnX36JFsYGGGaiU 9wApw9uwEqkbtDzyHIaHrLt6sbg3i4k7D0dVvDG8j9+mEsU+7fN6M5etnw3tCqINN0 5xzsm7ybUjPm0ElYF4sQL0sWv5zaeuRlGroizLdmDrSqkculRvEn1Au1Q8P4+MSR1n JE8vikm2WZT1Q== From: Borislav Petkov To: X86 ML Cc: LKML , "Borislav Petkov (AMD)" Subject: [PATCH] x86/microcode/AMD: Allow loader debugging to be enabled on baremetal too Date: Thu, 8 Jan 2026 17:50:28 +0100 Message-ID: <20260108165028.27417-1-bp@kernel.org> X-Mailer: git-send-email 2.51.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: "Borislav Petkov (AMD)" Debugging the loader on baremetal does make sense, so enable it there too. Signed-off-by: Borislav Petkov (AMD) --- arch/x86/Kconfig | 8 +++++--- arch/x86/kernel/cpu/microcode/amd.c | 4 ++-- arch/x86/kernel/cpu/microcode/core.c | 16 ++++++++++++---- arch/x86/kernel/cpu/microcode/internal.h | 1 + 4 files changed, 20 insertions(+), 9 deletions(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 80527299f859..c10593768984 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -1366,10 +1366,12 @@ config MICROCODE_DBG default n depends on MICROCODE help - Enable code which allows for debugging the microcode loader in - a guest. Meaning the patch loading is simulated but everything else + Enable code which allows to debug the microcode loader. When running + in a guest the patch loading is simulated but everything else related to patch parsing and handling is done as on baremetal with - the purpose of debugging solely the software side of things. + the purpose of debugging solely the software side of things. On + baremetal, it simply dumps additional debugging information during + normal operation. =20 You almost certainly want to say n here. =20 diff --git a/arch/x86/kernel/cpu/microcode/amd.c b/arch/x86/kernel/cpu/micr= ocode/amd.c index 46673530bc6f..caa0f595abcf 100644 --- a/arch/x86/kernel/cpu/microcode/amd.c +++ b/arch/x86/kernel/cpu/microcode/amd.c @@ -322,7 +322,7 @@ static u32 get_patch_level(void) { u32 rev, dummy __always_unused; =20 - if (IS_ENABLED(CONFIG_MICROCODE_DBG)) { + if (IS_ENABLED(CONFIG_MICROCODE_DBG) && hypervisor_present) { int cpu =3D smp_processor_id(); =20 if (!microcode_rev[cpu]) { @@ -714,7 +714,7 @@ static bool __apply_microcode_amd(struct microcode_amd = *mc, u32 *cur_rev, invlpg(p_addr_end); } =20 - if (IS_ENABLED(CONFIG_MICROCODE_DBG)) + if (IS_ENABLED(CONFIG_MICROCODE_DBG) && hypervisor_present) microcode_rev[smp_processor_id()] =3D mc->hdr.patch_id; =20 /* verify patch application was successful */ diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/mic= rocode/core.c index 68049f171860..651202e6fefb 100644 --- a/arch/x86/kernel/cpu/microcode/core.c +++ b/arch/x86/kernel/cpu/microcode/core.c @@ -57,6 +57,8 @@ bool force_minrev =3D IS_ENABLED(CONFIG_MICROCODE_LATE_FO= RCE_MINREV); u32 base_rev; u32 microcode_rev[NR_CPUS] =3D {}; =20 +bool hypervisor_present; + /* * Synchronization. * @@ -117,7 +119,13 @@ bool __init microcode_loader_disabled(void) * Disable when: * * 1) The CPU does not support CPUID. - * + */ + if (!cpuid_feature()) { + dis_ucode_ldr =3D true; + return dis_ucode_ldr; + } + + /* * 2) Bit 31 in CPUID[1]:ECX is clear * The bit is reserved for hypervisor use. This is still not * completely accurate as XEN PV guests don't see that CPUID bit @@ -127,9 +135,9 @@ bool __init microcode_loader_disabled(void) * 3) Certain AMD patch levels are not allowed to be * overwritten. */ - if (!cpuid_feature() || - ((native_cpuid_ecx(1) & BIT(31)) && - !IS_ENABLED(CONFIG_MICROCODE_DBG)) || + hypervisor_present =3D native_cpuid_ecx(1) & BIT(31); + + if ((hypervisor_present && !IS_ENABLED(CONFIG_MICROCODE_DBG)) || amd_check_current_patch_level()) dis_ucode_ldr =3D true; =20 diff --git a/arch/x86/kernel/cpu/microcode/internal.h b/arch/x86/kernel/cpu= /microcode/internal.h index a10b547eda1e..3b93c0676b4f 100644 --- a/arch/x86/kernel/cpu/microcode/internal.h +++ b/arch/x86/kernel/cpu/microcode/internal.h @@ -48,6 +48,7 @@ extern struct early_load_data early_data; extern struct ucode_cpu_info ucode_cpu_info[]; extern u32 microcode_rev[NR_CPUS]; extern u32 base_rev; +extern bool hypervisor_present; =20 struct cpio_data find_microcode_in_initrd(const char *path); =20 --=20 2.51.0