From nobody Mon Feb 9 19:26:12 2026 Received: from sender4-pp-f112.zoho.com (sender4-pp-f112.zoho.com [136.143.188.112]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B6EAB4CCA60 for ; Thu, 8 Jan 2026 14:19:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=136.143.188.112 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767881985; cv=pass; b=ej9f14ZWRPTSL9ItCNJcNHDtZ7ZfBAT73kiY07Hvl/hYmieDV48J8AWDNjFGq40iKo6T13iOgSmjQuR4Tf4XL9Zgk8/G2LszjanxBKVkWYKiSN0oyAEQRAPIISw+DV9v5rJKZPo9NK6m0MxbmjK0bl0/6OKJZnFySw7tIBzHong= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767881985; c=relaxed/simple; bh=PRJJtG64gwiRyV9MqZEu5QCgJk3mfBEwJM4iYv260Wg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ZJflRNgl5a+ZVAzFP7qpuguRTgsc6hcDqv2Q36mEW4r7OBdm0QS5sM4AVF+XkXyamn39hgfpX67UOtDGPQo4jgtqWVThkbGNXImfAMDeOZzCgcHjZZoRzU4bE89CmCnUt1A7KRv/BcO7QioggI3Pp+3yIhpCYcMkb/hYUawz9hY= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (1024-bit key) header.d=collabora.com header.i=nicolas.frattaroli@collabora.com header.b=gFIqMON8; arc=pass smtp.client-ip=136.143.188.112 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=collabora.com header.i=nicolas.frattaroli@collabora.com header.b="gFIqMON8" ARC-Seal: i=1; a=rsa-sha256; t=1767881969; cv=none; d=zohomail.com; s=zohoarc; b=KH+8d942znBaQODIzbpOpQmzfulBIutHMjPEK21GwPuqK3tpPTF7JlkuHWpzN9NzCjPW370mQAT/N1qeaQvBlYTj0U/878iuJUzBg68l6VamurSX+i3h2VrYtCbJUgqCQu6Svdzjj1tfl3n9/9wzuWkbm2gpIyZmP9L7DIJNhDE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1767881969; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:Subject:To:To:Message-Id:Reply-To; bh=Go9cy2QQg93M1WGt+NHXxLishJHACoM3/1pCLFEWKHQ=; b=b57OhzucedMDs2SQ1HOMiLbSFwlx93dxQDmfKcqiIrut+nogXxLqgAxVVUiHGUxHqOPTyqW5iaR8uwHj2XdYrXYROp7Vl1wqk/XA1fMI6kVKHiEhLnTioqbPhVmvjgti2QkTwnLHF/VHnJZliOpUwQKCcgiAlpYqptaiRAomITU= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=nicolas.frattaroli@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1767881969; s=zohomail; d=collabora.com; i=nicolas.frattaroli@collabora.com; h=From:From:Date:Date:Subject:Subject:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id:Message-Id:References:In-Reply-To:To:To:Cc:Cc:Reply-To; bh=Go9cy2QQg93M1WGt+NHXxLishJHACoM3/1pCLFEWKHQ=; b=gFIqMON8LXfJE3uZt8xag/iBHGTg7fECgf+W97gTK/d2uQ5HaZNTopA6Us4kvvJ8 eog6vllRON7obJF6+GG1KTtVyIppOO3xA3tLv3gpEXOjN+kV3P1HplrZgPrIuBKzJ+A 1matTT+uAouotncIIoQwo6ecmvau8+YANtAqM4iU= Received: by mx.zohomail.com with SMTPS id 1767881966798710.2139228320978; Thu, 8 Jan 2026 06:19:26 -0800 (PST) From: Nicolas Frattaroli Date: Thu, 08 Jan 2026 15:19:07 +0100 Subject: [PATCH v7 2/4] drm/panthor: Rework panthor_irq::suspended into panthor_irq::state Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260108-panthor-tracepoints-v7-2-afeae181f74a@collabora.com> References: <20260108-panthor-tracepoints-v7-0-afeae181f74a@collabora.com> In-Reply-To: <20260108-panthor-tracepoints-v7-0-afeae181f74a@collabora.com> To: Boris Brezillon , Steven Price , Liviu Dudau , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Chia-I Wu , Karunika Choo Cc: kernel@collabora.com, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Nicolas Frattaroli X-Mailer: b4 0.14.3 To deal with the threaded interrupt handler and a suspend action overlapping, the boolean panthor_irq::suspended is not sufficient. Rework it into taking several different values depending on the current state, and check it and set it within the IRQ helper functions. Signed-off-by: Nicolas Frattaroli --- drivers/gpu/drm/panthor/panthor_device.h | 40 +++++++++++++++++++++++++---= ---- 1 file changed, 32 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/panthor/panthor_device.h b/drivers/gpu/drm/pan= thor/panthor_device.h index cf76a8abca76..a8c21a7eea05 100644 --- a/drivers/gpu/drm/panthor/panthor_device.h +++ b/drivers/gpu/drm/panthor/panthor_device.h @@ -61,6 +61,17 @@ enum panthor_device_pm_state { PANTHOR_DEVICE_PM_STATE_SUSPENDING, }; =20 +enum panthor_irq_state { + /** @PANTHOR_IRQ_STATE_ACTIVE: IRQ is active and ready to process events.= */ + PANTHOR_IRQ_STATE_ACTIVE =3D 0, + /** @PANTHOR_IRQ_STATE_PROCESSING: IRQ is currently processing events. */ + PANTHOR_IRQ_STATE_PROCESSING, + /** @PANTHOR_IRQ_STATE_SUSPENDED: IRQ is suspended. */ + PANTHOR_IRQ_STATE_SUSPENDED, + /** @PANTHOR_IRQ_STATE_SUSPENDING: IRQ is being suspended. */ + PANTHOR_IRQ_STATE_SUSPENDING, +}; + /** * struct panthor_irq - IRQ data * @@ -76,8 +87,8 @@ struct panthor_irq { /** @mask: Values to write to xxx_INT_MASK if active. */ u32 mask; =20 - /** @suspended: Set to true when the IRQ is suspended. */ - atomic_t suspended; + /** @state: one of &enum panthor_irq_state reflecting the current state. = */ + atomic_t state; =20 /** @mask_lock: protects modifications to _INT_MASK and @mask */ spinlock_t mask_lock; @@ -415,7 +426,7 @@ static irqreturn_t panthor_ ## __name ## _irq_raw_handl= er(int irq, void *data) \ guard(spinlock_irqsave)(&pirq->mask_lock); \ \ - if (atomic_read(&pirq->suspended)) \ + if (atomic_read(&pirq->state) =3D=3D PANTHOR_IRQ_STATE_SUSPENDED) \ return IRQ_NONE; \ if (!gpu_read(ptdev, __reg_prefix ## _INT_STAT)) \ return IRQ_NONE; \ @@ -428,11 +439,14 @@ static irqreturn_t panthor_ ## __name ## _irq_threade= d_handler(int irq, void *da { \ struct panthor_irq *pirq =3D data; \ struct panthor_device *ptdev =3D pirq->ptdev; \ + enum panthor_irq_state state; \ irqreturn_t ret =3D IRQ_NONE; \ u32 mask; \ \ scoped_guard(spinlock_irqsave, &pirq->mask_lock) { \ mask =3D pirq->mask; \ + atomic_cmpxchg(&pirq->state, PANTHOR_IRQ_STATE_ACTIVE, \ + PANTHOR_IRQ_STATE_PROCESSING); \ } \ \ while (true) { \ @@ -446,11 +460,14 @@ static irqreturn_t panthor_ ## __name ## _irq_threade= d_handler(int irq, void *da } \ \ scoped_guard(spinlock_irqsave, &pirq->mask_lock) { \ - if (!atomic_read(&pirq->suspended)) { \ + state =3D atomic_read(&pirq->state); \ + if (state !=3D PANTHOR_IRQ_STATE_SUSPENDED && \ + state !=3D PANTHOR_IRQ_STATE_SUSPENDING) { \ /* Only restore the bits that were used and are still enabled */ \ gpu_write(ptdev, __reg_prefix ## _INT_MASK, \ gpu_read(ptdev, __reg_prefix ## _INT_MASK) | \ (mask & pirq->mask)); \ + atomic_set(&pirq->state, PANTHOR_IRQ_STATE_ACTIVE); \ } \ } \ \ @@ -461,16 +478,17 @@ static inline void panthor_ ## __name ## _irq_suspend= (struct panthor_irq *pirq) { \ scoped_guard(spinlock_irqsave, &pirq->mask_lock) { \ gpu_write(pirq->ptdev, __reg_prefix ## _INT_MASK, 0); \ + atomic_set(&pirq->state, PANTHOR_IRQ_STATE_SUSPENDING); \ } \ synchronize_irq(pirq->irq); \ - atomic_set(&pirq->suspended, true); \ + atomic_set(&pirq->state, PANTHOR_IRQ_STATE_SUSPENDED); \ } \ \ static inline void panthor_ ## __name ## _irq_resume(struct panthor_irq *p= irq) \ { \ guard(spinlock_irqsave)(&pirq->mask_lock); \ \ - atomic_set(&pirq->suspended, false); \ + atomic_set(&pirq->state, PANTHOR_IRQ_STATE_ACTIVE); \ gpu_write(pirq->ptdev, __reg_prefix ## _INT_CLEAR, pirq->mask); \ gpu_write(pirq->ptdev, __reg_prefix ## _INT_MASK, pirq->mask); \ } \ @@ -494,19 +512,25 @@ static int panthor_request_ ## __name ## _irq(struct = panthor_device *ptdev, \ \ static inline void panthor_ ## __name ## _irq_enable_events(struct panthor= _irq *pirq, u32 mask) \ { \ + enum panthor_irq_state state; \ + \ guard(spinlock_irqsave)(&pirq->mask_lock); \ \ pirq->mask |=3D mask; \ - if (!atomic_read(&pirq->suspended)) \ + state =3D atomic_read(&pirq->state); \ + if (state !=3D PANTHOR_IRQ_STATE_SUSPENDED && state !=3D PANTHOR_IRQ_STAT= E_SUSPENDING) \ gpu_write(pirq->ptdev, __reg_prefix ## _INT_MASK, pirq->mask); \ } \ \ static inline void panthor_ ## __name ## _irq_disable_events(struct pantho= r_irq *pirq, u32 mask)\ { \ + enum panthor_irq_state state; \ + \ guard(spinlock_irqsave)(&pirq->mask_lock); \ \ pirq->mask &=3D ~mask; \ - if (!atomic_read(&pirq->suspended)) \ + state =3D atomic_read(&pirq->state); \ + if (state !=3D PANTHOR_IRQ_STATE_SUSPENDED && state !=3D PANTHOR_IRQ_STAT= E_SUSPENDING) \ gpu_write(pirq->ptdev, __reg_prefix ## _INT_MASK, pirq->mask); \ } =20 --=20 2.52.0