From nobody Mon Feb 9 21:22:11 2026 Received: from sender4-pp-e103.zoho.com (sender4-pp-e103.zoho.com [136.143.188.103]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F3ED437B3E0; Thu, 8 Jan 2026 10:52:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=pass smtp.client-ip=136.143.188.103 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767869547; cv=pass; b=XpDTJsuX0qGxHRaNdtOXfL0etPxnI+CNi81CW7rKaZ4cYSfVTYrkgj09OEnl1g9/bGEBhGbZAx2jqIzeYJLUaN9WrQDw6yTO0o84Iw8QqkqMTF099q7k7I3RLgRgkiBNxQif3zz4AWS8b6bTzIjjkscdg9LRDupyi2SdS0uB6Ko= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767869547; c=relaxed/simple; bh=T4fM0HiKRgFW8PCxMAZHBV/qHMBU263KJMipbTBkRzk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=tm7QPdXK07u3NqH3n/BvzAUVR9xIjafHDdS8awnmx9AGg0quJSIAeJQ0c8A10LzwYHHokIo1rpz7nNtNYxGVAfJNwIjdNfxReBLDpFsm/qe8hVmTwLm5uxUcxphrNfOTf+0ZyjDO99Qu6gAYA8NfhjM+o+auyb9SFPBbvi4Yj9o= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (1024-bit key) header.d=collabora.com header.i=nicolas.frattaroli@collabora.com header.b=ZjACjFEQ; arc=pass smtp.client-ip=136.143.188.103 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=collabora.com header.i=nicolas.frattaroli@collabora.com header.b="ZjACjFEQ" ARC-Seal: i=1; a=rsa-sha256; t=1767869493; cv=none; d=zohomail.com; s=zohoarc; b=CuIklVb1a3dOOscypZ6EtVRd9zdcVd9uI9/r5CPpqqwEEKUm8U/DynuF1K0HB5HCSLNPQtjRLQMw8EsUDn8Kz35eKvf6OKr3V9rVOijMFvRPV30slLj6m2w7m4hVtfVkVSdGdeQ4ogNTrH0vLW52+q8A/hTFoD+UKsWICvOjq1A= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1767869493; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:Subject:To:To:Message-Id:Reply-To; bh=JbLl5t3lLsbE+Fel9Gi/ogiICYhTLP9j7XRPqSlaRXo=; b=JxiCnFEmrzXTnjdgWE2bMgNq2a8UlVMph46hhVY2s8q9vyrqLWGlXSXOTI9+4ANikuaFdRj8T26bmHgvCRdNxIMGvKMK0Zkift8eVr8MUfJxNyFJQbMu/v6MLCd1zXbFJHsifRE4UIxMNcyN6cnAce0lWL4rTOk2WHxc9EmaH6w= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=nicolas.frattaroli@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1767869493; s=zohomail; d=collabora.com; i=nicolas.frattaroli@collabora.com; h=From:From:Date:Date:Subject:Subject:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id:Message-Id:References:In-Reply-To:To:To:Cc:Cc:Reply-To; bh=JbLl5t3lLsbE+Fel9Gi/ogiICYhTLP9j7XRPqSlaRXo=; b=ZjACjFEQzUX9r/MK3EoxXdcqaqDdPZE2ZsYC9owBFnhlmEBAeCIyWl5CY4pcU9tY 4us/dnPe+PLKsuKAe1ex6ybB5ssaHcO7mlY/8Kbjc+YK4jQTwwkjIz3+DoZ7e+CSPkx 6gPEYK05cXessWfZ1ZlMyHFxZDpFTyVIIMdCLLFM= Received: by mx.zohomail.com with SMTPS id 1767869492105386.5108336612607; Thu, 8 Jan 2026 02:51:32 -0800 (PST) From: Nicolas Frattaroli Date: Thu, 08 Jan 2026 11:49:35 +0100 Subject: [PATCH v5 16/24] scsi: ufs: mediatek: Rework _ufs_mtk_clk_scale error paths Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260108-mt8196-ufs-v5-16-49215157ec41@collabora.com> References: <20260108-mt8196-ufs-v5-0-49215157ec41@collabora.com> In-Reply-To: <20260108-mt8196-ufs-v5-0-49215157ec41@collabora.com> To: Alim Akhtar , Avri Altman , Bart Van Assche , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Chunfeng Yun , Vinod Koul , Kishon Vijay Abraham I , Peter Wang , Stanley Jhu , "James E.J. Bottomley" , "Martin K. Petersen" , Philipp Zabel , Liam Girdwood , Mark Brown , Chaotian Jing , Neil Armstrong Cc: Louis-Alexis Eyraud , kernel@collabora.com, linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-phy@lists.infradead.org, Nicolas Frattaroli X-Mailer: b4 0.14.3 Errors should be printed at the correct log level. Additionally, it looks like some "goto out"'s were omitted in the scale up case, which looks like a mistake, as the scale down branch of the code does use them. Rework the error messages to make them nicer and at the correct verbosity, and add the missing gotos. Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Nicolas Frattaroli --- drivers/ufs/host/ufs-mediatek.c | 41 +++++++++++++++++++------------------= ---- 1 file changed, 19 insertions(+), 22 deletions(-) diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediate= k.c index 424533538b90..ecf16e82a326 100644 --- a/drivers/ufs/host/ufs-mediatek.c +++ b/drivers/ufs/host/ufs-mediatek.c @@ -1961,16 +1961,16 @@ static void _ufs_mtk_clk_scale(struct ufs_hba *hba,= bool scale_up) =20 ret =3D clk_prepare_enable(clki->clk); if (ret) { - dev_info(hba->dev, - "clk_prepare_enable() fail, ret: %d\n", ret); + dev_err(hba->dev, "%s: Failed to enable clock: %pe\n", __func__, ERR_PTR= (ret)); return; } =20 if (clk_fde_scale) { ret =3D clk_prepare_enable(fde_clki->clk); if (ret) { - dev_info(hba->dev, - "fde clk_prepare_enable() fail, ret: %d\n", ret); + dev_err(hba->dev, "%s: Failed to enable FDE clock: %pe\n", + __func__, ERR_PTR(ret)); + clk_disable_unprepare(clki->clk); return; } } @@ -1979,51 +1979,48 @@ static void _ufs_mtk_clk_scale(struct ufs_hba *hba,= bool scale_up) if (clk_bind_vcore) { ret =3D regulator_set_voltage(reg, volt, INT_MAX); if (ret) { - dev_info(hba->dev, - "Failed to set vcore to %d\n", volt); + dev_err(hba->dev, "Failed to set vcore to %d\n", volt); goto out; } } =20 ret =3D clk_set_parent(clki->clk, mclk->ufs_sel_max_clki->clk); if (ret) { - dev_info(hba->dev, "Failed to set clk mux, ret =3D %d\n", - ret); + dev_err(hba->dev, "%s: Failed to set clock mux: %pe\n", + __func__, ERR_PTR(ret)); + goto out; } =20 if (clk_fde_scale) { - ret =3D clk_set_parent(fde_clki->clk, - mclk->ufs_fde_max_clki->clk); + ret =3D clk_set_parent(fde_clki->clk, mclk->ufs_fde_max_clki->clk); if (ret) { - dev_info(hba->dev, - "Failed to set fde clk mux, ret =3D %d\n", - ret); + dev_err(hba->dev, "%s: Failed to set fde clock mux: %pe\n", + __func__, ERR_PTR(ret)); + goto out; } } } else { if (clk_fde_scale) { - ret =3D clk_set_parent(fde_clki->clk, - mclk->ufs_fde_min_clki->clk); + ret =3D clk_set_parent(fde_clki->clk, mclk->ufs_fde_min_clki->clk); if (ret) { - dev_info(hba->dev, - "Failed to set fde clk mux, ret =3D %d\n", - ret); + dev_err(hba->dev, "%s: Failed to set fde clock mux: %pe\n", + __func__, ERR_PTR(ret)); goto out; } } =20 ret =3D clk_set_parent(clki->clk, mclk->ufs_sel_min_clki->clk); if (ret) { - dev_info(hba->dev, "Failed to set clk mux, ret =3D %d\n", - ret); + dev_err(hba->dev, "%s: Failed to set clock mux: %pe\n", + __func__, ERR_PTR(ret)); goto out; } =20 if (clk_bind_vcore) { ret =3D regulator_set_voltage(reg, 0, INT_MAX); if (ret) { - dev_info(hba->dev, - "failed to set vcore to MIN\n"); + dev_err(hba->dev, "%s: Failed to set vcore to minimum: %pe\n", + __func__, ERR_PTR(ret)); } } } --=20 2.52.0