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Thu, 08 Jan 2026 13:17:09 -0800 (PST) Received: from [10.30.226.224] ([2600:382:811f:d757:daa5:b867:12a3:9d12]) by smtp.gmail.com with ESMTPSA id ada2fe7eead31-5ec77064e86sm7623329137.7.2026.01.08.13.17.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Jan 2026 13:17:09 -0800 (PST) From: Brian Masney Date: Thu, 08 Jan 2026 16:16:19 -0500 Subject: [PATCH 01/27] clk: sophgo: cv18xx-ip: convert from divider_round_rate() to divider_determine_rate() Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20260108-clk-divider-round-rate-v1-1-535a3ed73bf3@redhat.com> References: <20260108-clk-divider-round-rate-v1-0-535a3ed73bf3@redhat.com> In-Reply-To: <20260108-clk-divider-round-rate-v1-0-535a3ed73bf3@redhat.com> To: Michael Turquette , Stephen Boyd Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Brian Masney , Chen Wang , Inochi Amaoto , sophgo@lists.linux.dev X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=10331; i=bmasney@redhat.com; s=20250903; h=from:subject:message-id; bh=vDAetoqqs6cXCl7bwwNO4+syHzby9vdv3IeOGAXMg98=; b=owGbwMvMwCW2/dJd9di6A+2Mp9WSGDIT5LaaVEnvkj5atqHg3IzVzbXxV6+EspR37K3jPvw0a nXaK/WzHaUsDGJcDLJiiixLco0KIlJX2d67o8kCM4eVCWQIAxenAEzkERsjw5H7TTetW69lqOfd ed94M5n9zoRlsU0eJ0P3rvogdSLDS4HhJ+PZ5Cmlm68ynBJ5v9jEfV6eHd+5hUc31HuuiwmY83a WOCMA X-Developer-Key: i=bmasney@redhat.com; a=openpgp; fpr=A46D32705865AA3DDEDC2904B7D2DD275D7EC087 The divider_round_rate() function is now deprecated, so let's migrate to divider_determine_rate() instead so that this deprecated API can be removed. Also go ahead and convert all of the driver from round rate type to determine rate that accepts a 'struct clk_rate_request' to simplify the overall driver code. Signed-off-by: Brian Masney --- To: Chen Wang To: Inochi Amaoto Cc: sophgo@lists.linux.dev --- drivers/clk/sophgo/clk-cv18xx-ip.c | 154 ++++++++++++++++++++-------------= ---- 1 file changed, 85 insertions(+), 69 deletions(-) diff --git a/drivers/clk/sophgo/clk-cv18xx-ip.c b/drivers/clk/sophgo/clk-cv= 18xx-ip.c index c2b58faf0938b7d537dc3a81aef59c549b9c9c79..e936e315400393662a24e0d0189= f7f74e01fa586 100644 --- a/drivers/clk/sophgo/clk-cv18xx-ip.c +++ b/drivers/clk/sophgo/clk-cv18xx-ip.c @@ -152,28 +152,27 @@ static u32 div_helper_get_clockdiv(struct cv1800_clk_= common *common, return clockdiv; } =20 -static u32 div_helper_round_rate(struct cv1800_clk_regfield *div, - struct clk_hw *hw, struct clk_hw *parent, - unsigned long rate, unsigned long *prate) +static int div_helper_determine_rate(struct cv1800_clk_regfield *div, + struct clk_hw *hw, + struct clk_rate_request *req) { if (div->width =3D=3D 0) { if (div->initval <=3D 0) - return DIV_ROUND_UP_ULL(*prate, 1); + req->rate =3D DIV_ROUND_UP_ULL(req->best_parent_rate, 1); else - return DIV_ROUND_UP_ULL(*prate, div->initval); + req->rate =3D DIV_ROUND_UP_ULL(req->best_parent_rate, div->initval); + + return 0; } =20 - return divider_round_rate_parent(hw, parent, rate, prate, NULL, - div->width, div->flags); + return divider_determine_rate(hw, req, NULL, div->width, div->flags); } =20 -static long div_round_rate(struct clk_hw *parent, unsigned long *parent_ra= te, - unsigned long rate, int id, void *data) +static int do_div_determine_rate(struct clk_rate_request *req, int id, voi= d *data) { struct cv1800_clk_div *div =3D data; =20 - return div_helper_round_rate(&div->div, &div->common.hw, parent, - rate, parent_rate); + return div_helper_determine_rate(&div->div, &div->common.hw, req); } =20 static bool div_is_better_rate(struct cv1800_clk_common *common, @@ -188,53 +187,60 @@ static bool div_is_better_rate(struct cv1800_clk_comm= on *common, =20 static int mux_helper_determine_rate(struct cv1800_clk_common *common, struct clk_rate_request *req, - long (*round)(struct clk_hw *, - unsigned long *, - unsigned long, - int, - void *), + int (*round)(struct clk_rate_request *, + int, + void *), void *data) { unsigned long best_parent_rate =3D 0, best_rate =3D 0; struct clk_hw *best_parent, *hw =3D &common->hw; unsigned int i; + int ret; =20 if (clk_hw_get_flags(hw) & CLK_SET_RATE_NO_REPARENT) { - unsigned long adj_parent_rate; + struct clk_rate_request tmp_req =3D *req; =20 best_parent =3D clk_hw_get_parent(hw); - best_parent_rate =3D clk_hw_get_rate(best_parent); + tmp_req.best_parent_hw =3D best_parent; + tmp_req.best_parent_rate =3D clk_hw_get_rate(best_parent); =20 - best_rate =3D round(best_parent, &adj_parent_rate, - req->rate, -1, data); + ret =3D round(&tmp_req, -1, data); + if (ret) + return ret; + + best_parent_rate =3D tmp_req.best_parent_rate; + best_rate =3D tmp_req.rate; =20 goto find; } =20 for (i =3D 0; i < clk_hw_get_num_parents(hw); i++) { - unsigned long tmp_rate, parent_rate; + struct clk_rate_request tmp_req =3D *req; struct clk_hw *parent; =20 parent =3D clk_hw_get_parent_by_index(hw, i); if (!parent) continue; =20 - parent_rate =3D clk_hw_get_rate(parent); + tmp_req.best_parent_hw =3D parent; + tmp_req.best_parent_rate =3D clk_hw_get_rate(parent); =20 - tmp_rate =3D round(parent, &parent_rate, req->rate, i, data); + ret =3D round(&tmp_req, i, data); + if (ret) + continue; =20 - if (tmp_rate =3D=3D req->rate) { + if (tmp_req.rate =3D=3D req->rate) { best_parent =3D parent; - best_parent_rate =3D parent_rate; - best_rate =3D tmp_rate; + best_parent_rate =3D tmp_req.best_parent_rate; + best_rate =3D tmp_req.rate; goto find; } =20 if (div_is_better_rate(common, req->rate, - tmp_rate, best_rate)) { + tmp_req.rate, best_rate)) { best_parent =3D parent; - best_parent_rate =3D parent_rate; - best_rate =3D tmp_rate; + best_parent_rate =3D tmp_req.best_parent_rate; + best_rate =3D tmp_req.rate; } } =20 @@ -254,7 +260,7 @@ static int div_determine_rate(struct clk_hw *hw, struct cv1800_clk_div *div =3D hw_to_cv1800_clk_div(hw); =20 return mux_helper_determine_rate(&div->common, req, - div_round_rate, div); + do_div_determine_rate, div); } =20 static unsigned long div_recalc_rate(struct clk_hw *hw, @@ -301,24 +307,28 @@ hw_to_cv1800_clk_bypass_div(struct clk_hw *hw) return container_of(div, struct cv1800_clk_bypass_div, div); } =20 -static long bypass_div_round_rate(struct clk_hw *parent, - unsigned long *parent_rate, - unsigned long rate, int id, void *data) +static int do_bypass_div_determine_rate(struct clk_rate_request *req, int = id, + void *data) { struct cv1800_clk_bypass_div *div =3D data; =20 if (id =3D=3D -1) { - if (cv1800_clk_checkbit(&div->div.common, &div->bypass)) - return *parent_rate; - else - return div_round_rate(parent, parent_rate, rate, - -1, &div->div); + if (cv1800_clk_checkbit(&div->div.common, &div->bypass)) { + req->rate =3D req->best_parent_rate; + + return 0; + } + + return do_div_determine_rate(req, -1, &div->div); } =20 - if (id =3D=3D 0) - return *parent_rate; + if (id =3D=3D 0) { + req->rate =3D req->best_parent_rate; + + return 0; + } =20 - return div_round_rate(parent, parent_rate, rate, id - 1, &div->div); + return do_div_determine_rate(req, id - 1, &div->div); } =20 static int bypass_div_determine_rate(struct clk_hw *hw, @@ -327,7 +337,7 @@ static int bypass_div_determine_rate(struct clk_hw *hw, struct cv1800_clk_bypass_div *div =3D hw_to_cv1800_clk_bypass_div(hw); =20 return mux_helper_determine_rate(&div->div.common, req, - bypass_div_round_rate, div); + do_bypass_div_determine_rate, div); } =20 static unsigned long bypass_div_recalc_rate(struct clk_hw *hw, @@ -414,13 +424,11 @@ static int mux_is_enabled(struct clk_hw *hw) return cv1800_clk_checkbit(&mux->common, &mux->gate); } =20 -static long mux_round_rate(struct clk_hw *parent, unsigned long *parent_ra= te, - unsigned long rate, int id, void *data) +static int do_mux_determine_rate(struct clk_rate_request *req, int id, voi= d *data) { struct cv1800_clk_mux *mux =3D data; =20 - return div_helper_round_rate(&mux->div, &mux->common.hw, parent, - rate, parent_rate); + return div_helper_determine_rate(&mux->div, &mux->common.hw, req); } =20 static int mux_determine_rate(struct clk_hw *hw, @@ -429,7 +437,7 @@ static int mux_determine_rate(struct clk_hw *hw, struct cv1800_clk_mux *mux =3D hw_to_cv1800_clk_mux(hw); =20 return mux_helper_determine_rate(&mux->common, req, - mux_round_rate, mux); + do_mux_determine_rate, mux); } =20 static unsigned long mux_recalc_rate(struct clk_hw *hw, @@ -512,24 +520,28 @@ hw_to_cv1800_clk_bypass_mux(struct clk_hw *hw) return container_of(mux, struct cv1800_clk_bypass_mux, mux); } =20 -static long bypass_mux_round_rate(struct clk_hw *parent, - unsigned long *parent_rate, - unsigned long rate, int id, void *data) +static int do_bypass_mux_determine_rate(struct clk_rate_request *req, int = id, + void *data) { struct cv1800_clk_bypass_mux *mux =3D data; =20 if (id =3D=3D -1) { - if (cv1800_clk_checkbit(&mux->mux.common, &mux->bypass)) - return *parent_rate; - else - return mux_round_rate(parent, parent_rate, rate, - -1, &mux->mux); + if (cv1800_clk_checkbit(&mux->mux.common, &mux->bypass)) { + req->rate =3D req->best_parent_rate; + + return 0; + } + + return do_mux_determine_rate(req, -1, &mux->mux); } =20 - if (id =3D=3D 0) - return *parent_rate; + if (id =3D=3D 0) { + req->rate =3D req->best_parent_rate; + + return 0; + } =20 - return mux_round_rate(parent, parent_rate, rate, id - 1, &mux->mux); + return do_mux_determine_rate(req, id - 1, &mux->mux); } =20 static int bypass_mux_determine_rate(struct clk_hw *hw, @@ -538,7 +550,7 @@ static int bypass_mux_determine_rate(struct clk_hw *hw, struct cv1800_clk_bypass_mux *mux =3D hw_to_cv1800_clk_bypass_mux(hw); =20 return mux_helper_determine_rate(&mux->mux.common, req, - bypass_mux_round_rate, mux); + do_bypass_mux_determine_rate, mux); } =20 static unsigned long bypass_mux_recalc_rate(struct clk_hw *hw, @@ -639,27 +651,31 @@ static int mmux_is_enabled(struct clk_hw *hw) return cv1800_clk_checkbit(&mmux->common, &mmux->gate); } =20 -static long mmux_round_rate(struct clk_hw *parent, unsigned long *parent_r= ate, - unsigned long rate, int id, void *data) +static int do_mmux_determine_rate(struct clk_rate_request *req, int id, vo= id *data) { struct cv1800_clk_mmux *mmux =3D data; s8 div_id; =20 if (id =3D=3D -1) { - if (cv1800_clk_checkbit(&mmux->common, &mmux->bypass)) - return *parent_rate; + if (cv1800_clk_checkbit(&mmux->common, &mmux->bypass)) { + req->rate =3D req->best_parent_rate; + + return 0; + } =20 id =3D mmux_get_parent_id(mmux); } =20 div_id =3D mmux->parent2sel[id]; =20 - if (div_id < 0) - return *parent_rate; + if (div_id < 0) { + req->rate =3D req->best_parent_rate; + + return 0; + } =20 - return div_helper_round_rate(&mmux->div[div_id], - &mmux->common.hw, parent, - rate, parent_rate); + return div_helper_determine_rate(&mmux->div[div_id], &mmux->common.hw, + req); } =20 static int mmux_determine_rate(struct clk_hw *hw, @@ -668,7 +684,7 @@ static int mmux_determine_rate(struct clk_hw *hw, struct cv1800_clk_mmux *mmux =3D hw_to_cv1800_clk_mmux(hw); =20 return mux_helper_determine_rate(&mmux->common, req, - mmux_round_rate, mmux); + do_mmux_determine_rate, mmux); } =20 static unsigned long mmux_recalc_rate(struct clk_hw *hw, --=20 2.52.0