From nobody Mon Feb 9 03:46:56 2026 Received: from mta-64-228.siemens.flowmailer.net (mta-64-228.siemens.flowmailer.net [185.136.64.228]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ECB422F5A13 for ; Wed, 7 Jan 2026 09:01:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.136.64.228 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767776480; cv=none; b=oWDkLLoCfVyHT938hg05iPc65Ke5wtrabw6RyC+UbF4m9f5/dKYq3Tu8C4+qfnQNwyUTmrCmIKppXnPYOKD7jkfht74vR6WksLWKCScYD3fg3JtAChGsHxFcShDWD4Dn9FdeDcz+rqR8RqVmlk6K3FkcAHbmiqz0kPj3H3nxl38= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767776480; c=relaxed/simple; bh=p8++y6MQ0PibTNjwnihWjjoGZPpoq9Q8KvsYsZkU4eA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=dC+mkq0KJzGCIV9GnAa5HZEBCADcaL7g24Y4YqEBi4AxN4F7RU2o0LeCuU/RurTSBKMnMLpiHduvBcDoJ+XHZRpaN2oL1zoIS/HQ6FtHYbuOUVTl7uJ5MfoC/rljoObTvQYistWnV4iUiKq9hHw/etlg0xIGAlKaX7V/jeS10vI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=siemens.com; spf=pass smtp.mailfrom=rts-flowmailer.siemens.com; dkim=pass (2048-bit key) header.d=siemens.com header.i=alexander.sverdlin@siemens.com header.b=fmd378yv; arc=none smtp.client-ip=185.136.64.228 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=siemens.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rts-flowmailer.siemens.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=siemens.com header.i=alexander.sverdlin@siemens.com header.b="fmd378yv" Received: by mta-64-228.siemens.flowmailer.net with ESMTPSA id 202601070900225bdde1270a00020700 for ; Wed, 07 Jan 2026 10:01:09 +0100 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; s=fm1; d=siemens.com; i=alexander.sverdlin@siemens.com; h=Date:From:Subject:To:Message-ID:MIME-Version:Content-Type:Content-Transfer-Encoding:Cc:References:In-Reply-To; bh=Rda0U2M+d4Z48hBPk6RZ/t3g/zhmVTZTN9fsWTD29HQ=; b=fmd378yvk3cEw7Fbj8Ga9Y+ANicWlNwXCj5yajl8CzWi8MyRZ7Ogo6nfJ/gDRx5Wc7Pnrb Fo2/1xFiIQKUSSEiiKDRnt1iB2fBk9AeGT65Oeud/cB+US0DKA7dYBH21ygv4psxN1rgvZTx RCaXW0wg9bqyFA4XgZPY0p18dGUCGn4etOVjNeu5Ajw1o2xk1FGio68MVx3k0hRISXLVOZb9 qwhyrQ9Fze9GIqd1/UY/QNfHYaevurk9TEDuZwKHAkGP4K3xgeachmIJqrbOYMdYu8A+MIf1 9PHSnxVynXZuSo+vSk7wHJ1NBYaYQyGG1gC7qqqtKuPu1Zk5cu6pPIxw==; From: "A. Sverdlin" To: netdev@vger.kernel.org Cc: Alexander Sverdlin , Hauke Mehrtens , Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Daniel Golle Subject: [PATCH net-next v4 1/2] dt-bindings: net: dsa: lantiq,gswip: add MaxLinear R(G)MII slew rate Date: Wed, 7 Jan 2026 10:00:16 +0100 Message-ID: <20260107090019.2257867-2-alexander.sverdlin@siemens.com> In-Reply-To: <20260107090019.2257867-1-alexander.sverdlin@siemens.com> References: <20260107090019.2257867-1-alexander.sverdlin@siemens.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Flowmailer-Platform: Siemens Feedback-ID: 519:519-456497:519-21489:flowmailer Content-Type: text/plain; charset="utf-8" From: Alexander Sverdlin Add new maxlinear,slew-rate-txc and maxlinear,slew-rate-txd uint32 properties. The properties are only applicable for ports in R(G)MII mode and allow for slew rate reduction in comparison to "normal" default configuration with the purpose to reduce radiated emissions. Signed-off-by: Alexander Sverdlin --- Changelog: v4: - separate properties for TXD and TXC pads ("maxlinear," prefix re-appears) v3: - use [pinctrl] standard "slew-rate" property as suggested by Rob https://lore.kernel.org/all/20251219204324.GA3881969-robh@kernel.org/ v2: - unchanged .../devicetree/bindings/net/dsa/lantiq,gswip.yaml | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/Documentation/devicetree/bindings/net/dsa/lantiq,gswip.yaml b/= Documentation/devicetree/bindings/net/dsa/lantiq,gswip.yaml index 205b683849a53..747106810cc17 100644 --- a/Documentation/devicetree/bindings/net/dsa/lantiq,gswip.yaml +++ b/Documentation/devicetree/bindings/net/dsa/lantiq,gswip.yaml @@ -106,6 +106,20 @@ patternProperties: unevaluatedProperties: false =20 properties: + maxlinear,slew-rate-txc: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + description: | + RMII/RGMII TX Clock Slew Rate: + 0: "Normal" + 1: "Slow" + maxlinear,slew-rate-txd: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + description: | + RMII/RGMII TX Non-Clock PAD Slew Rate: + 0: "Normal" + 1: "Slow" maxlinear,rmii-refclk-out: type: boolean description: --=20 2.52.0 From nobody Mon Feb 9 03:46:56 2026 Received: from mta-65-225.siemens.flowmailer.net (mta-65-225.siemens.flowmailer.net [185.136.65.225]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 89052221FBD for ; Wed, 7 Jan 2026 09:01:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.136.65.225 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767776477; cv=none; b=SLwTMkQ2Xxkdz+/WFmqNQF+EmDL2rN/DIzsBkFQeVjaVPphb1HDaT7FT99LyicCXUpX27hmjKcxEsyXPaO5Qq07tmwd78MO/Tyn49d4JKb8XT0Qs6qa0tJ+FKDbgkRc5w3zyQtTerVfuZ6fgZlyiag/UHUm46qVznNQrjfGGBx0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1767776477; c=relaxed/simple; bh=H3OnxDRAS0shDLGQ0ZLvYwcLOKNCjkTwY0TUegqfDwU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=XyNqBDPf54lesOBiIMflIRoRgh0kqgNzOGDeoZ+aw8EBzbSj/GWUMt/fFMI1GtmDriCa+SFpCyJAT0XoNkTdY1V4/rN2tnHImymwaY5cZxQmnGKY/4IwWgnZ9lUzlzH2zw5XNer3z/pKSXuLXq/GpbSFsUSt5w35kiXZKIM78ME= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=siemens.com; spf=pass smtp.mailfrom=rts-flowmailer.siemens.com; dkim=pass (2048-bit key) header.d=siemens.com header.i=alexander.sverdlin@siemens.com header.b=Ht0tcx+y; arc=none smtp.client-ip=185.136.65.225 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=siemens.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rts-flowmailer.siemens.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=siemens.com header.i=alexander.sverdlin@siemens.com header.b="Ht0tcx+y" Received: by mta-65-225.siemens.flowmailer.net with ESMTPSA id 202601070900228d97afab0500020763 for ; Wed, 07 Jan 2026 10:01:06 +0100 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; s=fm1; d=siemens.com; i=alexander.sverdlin@siemens.com; h=Date:From:Subject:To:Message-ID:MIME-Version:Content-Type:Content-Transfer-Encoding:Cc:References:In-Reply-To; bh=XGRkifYiNIH0MU4OanM2O++Y3tzI7py9j4qll4AuISw=; b=Ht0tcx+yV0eHTJomDzPZ3/QgnNF6rKOuMqPEdYfHFc3I8rvs6TkBU6NRA1oDHB9BYYB4cP z06eX9w1Gdw9G+JBFRhScr/tZGINWdJLOQvSfy8gJ2ulZvoeYnqFAShQf1nUH9V+BX9OQsEh ev8btOB/TVUFqJVtujDzhdb787W5XqbTDo8Iwmiugqm6B/Uyah02UAq0Px5XOQnob6bUQF8s 4VJ4OxZKmzkzw0C0qrOfT3osby/G0K+Dymq2icU5XsBs57QIOHbu4CAer4Ns9qeY94ni+5L0 EVTh/AvLI/O7+vO8ru2EirE444lGTdvbnyEENxjAdEP20kzNDkMYca2Q==; From: "A. Sverdlin" To: netdev@vger.kernel.org Cc: Alexander Sverdlin , Hauke Mehrtens , Andrew Lunn , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Daniel Golle Subject: [PATCH net-next v4 2/2] net: dsa: mxl-gsw1xx: Support R(G)MII slew rate configuration Date: Wed, 7 Jan 2026 10:00:17 +0100 Message-ID: <20260107090019.2257867-3-alexander.sverdlin@siemens.com> In-Reply-To: <20260107090019.2257867-1-alexander.sverdlin@siemens.com> References: <20260107090019.2257867-1-alexander.sverdlin@siemens.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Flowmailer-Platform: Siemens Feedback-ID: 519:519-456497:519-21489:flowmailer Content-Type: text/plain; charset="utf-8" From: Alexander Sverdlin Support newly introduced maxlinear,slew-rate-txc and maxlinear,slew-rate-txd device tree properties to configure R(G)MII interface pins' slew rate. It might be used to reduce the radiated emissions. Signed-off-by: Alexander Sverdlin Reviewed-by: Daniel Golle Tested-by: Daniel Golle --- Changelog: v4: - separate properties for TXD and TXC pads v3: - use [pinctrl] standard "slew-rate" property as suggested by Rob https://lore.kernel.org/all/20251219204324.GA3881969-robh@kernel.org/ - better sorted struct gswip_hw_info initialisers as suggested by Daniel v2: - do not hijack gsw1xx_phylink_mac_select_pcs() for configuring the port, introduce struct gswip_hw_info::port_setup callback - actively configure "normal" slew rate (if the new DT property is missing) - properly use regmap_set_bits() (v1 had reg and value mixed up) drivers/net/dsa/lantiq/lantiq_gswip.h | 1 + drivers/net/dsa/lantiq/lantiq_gswip_common.c | 6 +++ drivers/net/dsa/lantiq/mxl-gsw1xx.c | 40 ++++++++++++++++++++ drivers/net/dsa/lantiq/mxl-gsw1xx.h | 2 + 4 files changed, 49 insertions(+) diff --git a/drivers/net/dsa/lantiq/lantiq_gswip.h b/drivers/net/dsa/lantiq= /lantiq_gswip.h index 2e0f2afbadbbc..8fc4c7cc5283a 100644 --- a/drivers/net/dsa/lantiq/lantiq_gswip.h +++ b/drivers/net/dsa/lantiq/lantiq_gswip.h @@ -263,6 +263,7 @@ struct gswip_hw_info { struct phylink_config *config); struct phylink_pcs *(*mac_select_pcs)(struct phylink_config *config, phy_interface_t interface); + int (*port_setup)(struct dsa_switch *ds, int port); }; =20 struct gswip_gphy_fw { diff --git a/drivers/net/dsa/lantiq/lantiq_gswip_common.c b/drivers/net/dsa= /lantiq/lantiq_gswip_common.c index e790f2ef75884..17a61e445f00f 100644 --- a/drivers/net/dsa/lantiq/lantiq_gswip_common.c +++ b/drivers/net/dsa/lantiq/lantiq_gswip_common.c @@ -425,6 +425,12 @@ static int gswip_port_setup(struct dsa_switch *ds, int= port) struct gswip_priv *priv =3D ds->priv; int err; =20 + if (priv->hw_info->port_setup) { + err =3D priv->hw_info->port_setup(ds, port); + if (err) + return err; + } + if (!dsa_is_cpu_port(ds, port)) { err =3D gswip_add_single_port_br(priv, port, true); if (err) diff --git a/drivers/net/dsa/lantiq/mxl-gsw1xx.c b/drivers/net/dsa/lantiq/m= xl-gsw1xx.c index f8ff8a604bf53..6afc7539fefbe 100644 --- a/drivers/net/dsa/lantiq/mxl-gsw1xx.c +++ b/drivers/net/dsa/lantiq/mxl-gsw1xx.c @@ -559,6 +559,43 @@ static struct phylink_pcs *gsw1xx_phylink_mac_select_p= cs(struct phylink_config * } } =20 +static int gsw1xx_rmii_slew_rate(const struct device_node *np, struct gsw1= xx_priv *priv, + const char *prop, u16 mask) +{ + u32 rate; + int ret; + + ret =3D of_property_read_u32(np, prop, &rate); + /* Optional property */ + if (ret =3D=3D -EINVAL) + return 0; + if (ret < 0 || rate > 1) { + dev_err(&priv->mdio_dev->dev, "Invalid %s value\n", prop); + return (ret < 0) ? ret : -EINVAL; + } + + return regmap_update_bits(priv->shell, GSW1XX_SHELL_RGMII_SLEW_CFG, mask,= mask * rate); +} + +static int gsw1xx_port_setup(struct dsa_switch *ds, int port) +{ + struct dsa_port *dp =3D dsa_to_port(ds, port); + struct device_node *np =3D dp->dn; + struct gsw1xx_priv *gsw1xx_priv; + struct gswip_priv *gswip_priv; + + if (dp->index !=3D GSW1XX_MII_PORT) + return 0; + + gswip_priv =3D ds->priv; + gsw1xx_priv =3D container_of(gswip_priv, struct gsw1xx_priv, gswip); + + return gsw1xx_rmii_slew_rate(np, gsw1xx_priv, + "maxlinear,slew-rate-txc", RGMII_SLEW_CFG_DRV_TXC) ?: + gsw1xx_rmii_slew_rate(np, gsw1xx_priv, + "maxlinear,slew-rate-txd", RGMII_SLEW_CFG_DRV_TXD); +} + static struct regmap *gsw1xx_regmap_init(struct gsw1xx_priv *priv, const char *name, unsigned int reg_base, @@ -707,6 +744,7 @@ static const struct gswip_hw_info gsw12x_data =3D { .mac_select_pcs =3D gsw1xx_phylink_mac_select_pcs, .phylink_get_caps =3D &gsw1xx_phylink_get_caps, .supports_2500m =3D true, + .port_setup =3D gsw1xx_port_setup, .pce_microcode =3D &gsw1xx_pce_microcode, .pce_microcode_size =3D ARRAY_SIZE(gsw1xx_pce_microcode), .tag_protocol =3D DSA_TAG_PROTO_MXL_GSW1XX, @@ -720,6 +758,7 @@ static const struct gswip_hw_info gsw140_data =3D { .mac_select_pcs =3D gsw1xx_phylink_mac_select_pcs, .phylink_get_caps =3D &gsw1xx_phylink_get_caps, .supports_2500m =3D true, + .port_setup =3D gsw1xx_port_setup, .pce_microcode =3D &gsw1xx_pce_microcode, .pce_microcode_size =3D ARRAY_SIZE(gsw1xx_pce_microcode), .tag_protocol =3D DSA_TAG_PROTO_MXL_GSW1XX, @@ -732,6 +771,7 @@ static const struct gswip_hw_info gsw141_data =3D { .mii_port_reg_offset =3D -GSW1XX_MII_PORT, .mac_select_pcs =3D gsw1xx_phylink_mac_select_pcs, .phylink_get_caps =3D gsw1xx_phylink_get_caps, + .port_setup =3D gsw1xx_port_setup, .pce_microcode =3D &gsw1xx_pce_microcode, .pce_microcode_size =3D ARRAY_SIZE(gsw1xx_pce_microcode), .tag_protocol =3D DSA_TAG_PROTO_MXL_GSW1XX, diff --git a/drivers/net/dsa/lantiq/mxl-gsw1xx.h b/drivers/net/dsa/lantiq/m= xl-gsw1xx.h index 38e03c048a26c..8c0298b2b7663 100644 --- a/drivers/net/dsa/lantiq/mxl-gsw1xx.h +++ b/drivers/net/dsa/lantiq/mxl-gsw1xx.h @@ -110,6 +110,8 @@ #define GSW1XX_RST_REQ_SGMII_SHELL BIT(5) /* RGMII PAD Slew Control Register */ #define GSW1XX_SHELL_RGMII_SLEW_CFG 0x78 +#define RGMII_SLEW_CFG_DRV_TXC BIT(2) +#define RGMII_SLEW_CFG_DRV_TXD BIT(3) #define RGMII_SLEW_CFG_RX_2_5_V BIT(4) #define RGMII_SLEW_CFG_TX_2_5_V BIT(5) =20 --=20 2.52.0