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([171.61.166.195]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2a3e3cd2acdsm42335445ad.89.2026.01.07.00.14.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Jan 2026 00:14:53 -0800 (PST) From: Atharva Tiwari To: Cc: Atharva Tiwari , Mahesh J Salgaonkar , "Oliver O'Halloran" , Bjorn Helgaas , Lukas Wunner , Kuppuswamy Sathyanarayanan , Giovanni Cabiddu , Feng Tang , linuxppc-dev@lists.ozlabs.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2] PCI/portdev: Disable AER for Titan Ridge 4C 2018 Date: Wed, 7 Jan 2026 08:14:35 +0000 Message-ID: <20260107081445.1100-1-atharvatiwarilinuxdev@gmail.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Changes since v1: Transferred logic to drivers/pci/quicks.c Disable AER for Intel Titan Ridge 4C 2018 (used in T2 iMacs, where the warnings appear) that generate continuous pcieport warnings. such as: pcieport 0000:00:1c.4: AER: Correctable error message received from 0000:07= :00.0 pcieport 0000:07:00.0: PCIe Bus Error: severity=3DCorrectable, type=3DData = Link Layer, (Receiver ID) pcieport 0000:07:00.0: device [8086:15ea] error status/mask=3D00000080/00= 002000 pcieport 0000:07:00.0: [ 7] BadDLLP (see: https://bugzilla.kernel.org/show_bug.cgi?id=3D220651) macOS also disables AER for Thunderbolt devices and controllers in their dr= ivers. Signed-off-by: Atharva Tiwari --- drivers/pci/pcie/aer.c | 3 +++ drivers/pci/pcie/portdrv.c | 2 +- drivers/pci/quirks.c | 9 +++++++++ include/linux/pci.h | 1 + 4 files changed, 14 insertions(+), 1 deletion(-) diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c index e0bcaa896803..45604564ce6f 100644 --- a/drivers/pci/pcie/aer.c +++ b/drivers/pci/pcie/aer.c @@ -389,6 +389,9 @@ void pci_aer_init(struct pci_dev *dev) { int n; =20 + if (dev->no_aer) + return; + dev->aer_cap =3D pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); if (!dev->aer_cap) return; diff --git a/drivers/pci/pcie/portdrv.c b/drivers/pci/pcie/portdrv.c index 38a41ccf79b9..ab904a224296 100644 --- a/drivers/pci/pcie/portdrv.c +++ b/drivers/pci/pcie/portdrv.c @@ -240,7 +240,7 @@ static int get_port_device_capability(struct pci_dev *d= ev) if ((pci_pcie_type(dev) =3D=3D PCI_EXP_TYPE_ROOT_PORT || pci_pcie_type(dev) =3D=3D PCI_EXP_TYPE_RC_EC) && dev->aer_cap && pci_aer_available() && - (pcie_ports_native || host->native_aer)) + (pcie_ports_native || host->native_aer) && !dev->no_aer) services |=3D PCIE_PORT_SERVICE_AER; #endif =20 diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index b9c252aa6fe0..d36dd3f8bbf6 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -6340,4 +6340,13 @@ static void pci_mask_replay_timer_timeout(struct pci= _dev *pdev) } DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_GLI, 0x9750, pci_mask_replay_timer_t= imeout); DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_GLI, 0x9755, pci_mask_replay_timer_t= imeout); + +static void pci_disable_aer(struct pci_dev *pdev) +{ + pdev->no_aer =3D 1; +} +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x15EA, pci_disable_aer); +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x15EB, pci_disable_aer); +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x15EC, pci_disable_aer); + #endif diff --git a/include/linux/pci.h b/include/linux/pci.h index 864775651c6f..f447f86c6bdf 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -440,6 +440,7 @@ struct pci_dev { unsigned int multifunction:1; /* Multi-function device */ =20 unsigned int is_busmaster:1; /* Is busmaster */ + unsigned int no_aer:1; /* May not use AER */ unsigned int no_msi:1; /* May not use MSI */ unsigned int no_64bit_msi:1; /* May only use 32-bit MSIs */ unsigned int block_cfg_access:1; /* Config space access blocked */ --=20 2.43.0